1 Qualcomm QUSB2 phy controller
2 =============================
4 QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
7 - compatible: compatible list, contains
8 "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
9 "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
11 - reg: offset and length of the PHY register set.
12 - #phy-cells: must be 0.
14 - clocks: a list of phandles and clock-specifier pairs,
15 one for each entry in clock-names.
16 - clock-names: must be "cfg_ahb" for phy config clock,
17 "ref" for 19.2 MHz ref clk,
18 "iface" for phy interface clock (Optional).
20 - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
21 - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
23 - resets: Phandle to reset to phy block.
26 - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim'
27 tuning parameter value for qusb2 phy.
29 - qcom,tcsr-syscon: Phandle to TCSR syscon register region.
30 - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
31 added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
32 tuning parameter that may vary for different boards of same SOC.
33 This property is applicable to only QUSB2 v2 PHY (sdm845).
34 - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
36 Possible range is - 15mA to 24mA (stepsize of 600 uA).
37 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
38 This property is applicable to only QUSB2 v2 PHY (sdm845).
39 Default value is 22.2mA for sdm845.
40 - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
41 Possible range is 0 to 15% (stepsize of 5%).
42 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
43 This property is applicable to only QUSB2 v2 PHY (sdm845).
44 Default value is 10% for sdm845.
45 - qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
46 pre-emphasis (specified using qcom,preemphasis-level) must be in
47 effect. Duration could be half-bit of full-bit.
48 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
49 This property is applicable to only QUSB2 v2 PHY (sdm845).
50 Default value is full-bit width for sdm845.
53 hsusb_phy: phy@7411000 {
54 compatible = "qcom,msm8996-qusb2-phy";
55 reg = <0x7411000 0x180>;
58 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
59 <&gcc GCC_RX1_USB2_CLKREF_CLK>,
60 clock-names = "cfg_ahb", "ref";
62 vdda-pll-supply = <&pm8994_l12>;
63 vdda-phy-dpdm-supply = <&pm8994_l24>;
65 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
66 nvmem-cells = <&qusb2p_hstx_trim>;