1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Driver for Analog Devices Industrial Ethernet T1L PHYs
5 * Copyright 2020 Analog Devices Inc.
7 #include <linux/kernel.h>
8 #include <linux/bitfield.h>
9 #include <linux/delay.h>
10 #include <linux/errno.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/mii.h>
14 #include <linux/phy.h>
15 #include <linux/property.h>
17 #define PHY_ID_ADIN1100 0x0283bc81
19 #define ADIN_FORCED_MODE 0x8000
20 #define ADIN_FORCED_MODE_EN BIT(0)
22 #define ADIN_CRSM_SFT_RST 0x8810
23 #define ADIN_CRSM_SFT_RST_EN BIT(0)
25 #define ADIN_CRSM_SFT_PD_CNTRL 0x8812
26 #define ADIN_CRSM_SFT_PD_CNTRL_EN BIT(0)
28 #define ADIN_AN_PHY_INST_STATUS 0x8030
29 #define ADIN_IS_CFG_SLV BIT(2)
30 #define ADIN_IS_CFG_MST BIT(3)
32 #define ADIN_CRSM_STAT 0x8818
33 #define ADIN_CRSM_SFT_PD_RDY BIT(1)
34 #define ADIN_CRSM_SYS_RDY BIT(0)
36 #define ADIN_MSE_VAL 0x830B
38 #define ADIN_SQI_MAX 7
40 struct adin_mse_sqi_range {
45 static const struct adin_mse_sqi_range adin_mse_sqi_map[] = {
57 * struct adin_priv - ADIN PHY driver private data
58 * @tx_level_2v4_able: set if the PHY supports 2.4V TX levels (10BASE-T1L)
59 * @tx_level_2v4: set if the PHY requests 2.4V TX levels (10BASE-T1L)
60 * @tx_level_prop_present: set if the TX level is specified in DT
63 unsigned int tx_level_2v4_able:1;
64 unsigned int tx_level_2v4:1;
65 unsigned int tx_level_prop_present:1;
68 static int adin_read_status(struct phy_device *phydev)
72 ret = genphy_c45_read_status(phydev);
76 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS);
80 if (ret & ADIN_IS_CFG_SLV)
81 phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
83 if (ret & ADIN_IS_CFG_MST)
84 phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
89 static int adin_config_aneg(struct phy_device *phydev)
91 struct adin_priv *priv = phydev->priv;
94 if (phydev->autoneg == AUTONEG_DISABLE) {
95 ret = genphy_c45_pma_setup_forced(phydev);
99 if (priv->tx_level_prop_present && priv->tx_level_2v4)
100 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL,
101 MDIO_PMA_10T1L_CTRL_2V4_EN);
103 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL,
104 MDIO_PMA_10T1L_CTRL_2V4_EN);
108 /* Force PHY to use above configurations */
109 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN);
112 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN);
116 /* Request increased transmit level from LP. */
117 if (priv->tx_level_prop_present && priv->tx_level_2v4) {
118 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H,
119 MDIO_AN_T1_ADV_H_10L_TX_HI |
120 MDIO_AN_T1_ADV_H_10L_TX_HI_REQ);
125 /* Disable 2.4 Vpp transmit level. */
126 if ((priv->tx_level_prop_present && !priv->tx_level_2v4) || !priv->tx_level_2v4_able) {
127 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H,
128 MDIO_AN_T1_ADV_H_10L_TX_HI |
129 MDIO_AN_T1_ADV_H_10L_TX_HI_REQ);
134 return genphy_c45_config_aneg(phydev);
137 static int adin_set_powerdown_mode(struct phy_device *phydev, bool en)
142 val = en ? ADIN_CRSM_SFT_PD_CNTRL_EN : 0;
143 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,
144 ADIN_CRSM_SFT_PD_CNTRL, val);
148 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret,
149 (ret & ADIN_CRSM_SFT_PD_RDY) == val,
153 static int adin_suspend(struct phy_device *phydev)
155 return adin_set_powerdown_mode(phydev, true);
158 static int adin_resume(struct phy_device *phydev)
160 return adin_set_powerdown_mode(phydev, false);
163 static int adin_set_loopback(struct phy_device *phydev, bool enable)
166 return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL,
169 /* PCS loopback (according to 10BASE-T1L spec) */
170 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL,
174 static int adin_soft_reset(struct phy_device *phydev)
178 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN_CRSM_SFT_RST, ADIN_CRSM_SFT_RST_EN);
182 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret,
183 (ret & ADIN_CRSM_SYS_RDY),
187 static int adin_get_features(struct phy_device *phydev)
189 struct adin_priv *priv = phydev->priv;
190 struct device *dev = &phydev->mdio.dev;
194 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT);
198 /* This depends on the voltage level from the power source */
199 priv->tx_level_2v4_able = !!(ret & MDIO_PMA_10T1L_STAT_2V4_ABLE);
201 phydev_dbg(phydev, "PHY supports 2.4V TX level: %s\n",
202 priv->tx_level_2v4_able ? "yes" : "no");
204 priv->tx_level_prop_present = device_property_present(dev, "phy-10base-t1l-2.4vpp");
205 if (priv->tx_level_prop_present) {
206 ret = device_property_read_u8(dev, "phy-10base-t1l-2.4vpp", &val);
210 priv->tx_level_2v4 = val;
211 if (!priv->tx_level_2v4 && priv->tx_level_2v4_able)
213 "PHY supports 2.4V TX level, but disabled via config\n");
216 linkmode_set_bit_array(phy_basic_ports_array, ARRAY_SIZE(phy_basic_ports_array),
219 return genphy_c45_pma_read_abilities(phydev);
222 static int adin_get_sqi(struct phy_device *phydev)
228 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1);
231 else if (!(ret & MDIO_STAT1_LSTATUS))
234 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL);
238 mse_val = 0xFFFF & ret;
239 for (sqi = 0; sqi < ARRAY_SIZE(adin_mse_sqi_map); sqi++) {
240 if (mse_val >= adin_mse_sqi_map[sqi].start && mse_val <= adin_mse_sqi_map[sqi].end)
247 static int adin_get_sqi_max(struct phy_device *phydev)
252 static int adin_probe(struct phy_device *phydev)
254 struct device *dev = &phydev->mdio.dev;
255 struct adin_priv *priv;
257 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
266 static struct phy_driver adin_driver[] = {
268 PHY_ID_MATCH_MODEL(PHY_ID_ADIN1100),
270 .get_features = adin_get_features,
271 .soft_reset = adin_soft_reset,
273 .config_aneg = adin_config_aneg,
274 .read_status = adin_read_status,
275 .set_loopback = adin_set_loopback,
276 .suspend = adin_suspend,
277 .resume = adin_resume,
278 .get_sqi = adin_get_sqi,
279 .get_sqi_max = adin_get_sqi_max,
283 module_phy_driver(adin_driver);
285 static struct mdio_device_id __maybe_unused adin_tbl[] = {
286 { PHY_ID_MATCH_MODEL(PHY_ID_ADIN1100) },
290 MODULE_DEVICE_TABLE(mdio, adin_tbl);
291 MODULE_DESCRIPTION("Analog Devices Industrial Ethernet T1L PHY driver");
292 MODULE_LICENSE("Dual BSD/GPL");