1 // SPDX-License-Identifier: GPL-2.0
3 * s390 specific pci instructions
5 * Copyright IBM Corp. 2013
8 #include <linux/export.h>
9 #include <linux/errno.h>
10 #include <linux/delay.h>
11 #include <asm/facility.h>
12 #include <asm/pci_insn.h>
13 #include <asm/pci_debug.h>
14 #include <asm/processor.h>
16 #define ZPCI_INSN_BUSY_DELAY 1 /* 1 microsecond */
18 static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset)
25 } __packed data = {req, offset, cc, status};
27 zpci_err_hex(&data, sizeof(data));
30 /* Modify PCI Function Controls */
31 static inline u8 __mpcifc(u64 req, struct zpci_fib *fib, u8 *status)
36 " .insn rxy,0xe300000000d0,%[req],%[fib]\n"
39 : [cc] "=d" (cc), [req] "+d" (req), [fib] "+Q" (*fib)
41 *status = req >> 24 & 0xff;
45 u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status)
50 cc = __mpcifc(req, fib, status);
52 msleep(ZPCI_INSN_BUSY_DELAY);
56 zpci_err_insn(cc, *status, req, 0);
61 /* Refresh PCI Translations */
62 static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status)
64 register u64 __addr asm("2") = addr;
65 register u64 __range asm("3") = range;
69 " .insn rre,0xb9d30000,%[fn],%[addr]\n"
72 : [cc] "=d" (cc), [fn] "+d" (fn)
73 : [addr] "d" (__addr), "d" (__range)
75 *status = fn >> 24 & 0xff;
79 int zpci_refresh_trans(u64 fn, u64 addr, u64 range)
84 cc = __rpcit(fn, addr, range, &status);
86 udelay(ZPCI_INSN_BUSY_DELAY);
90 zpci_err_insn(cc, status, addr, range);
92 if (cc == 1 && (status == 4 || status == 16))
95 return (cc) ? -EIO : 0;
98 /* Set Interruption Controls */
99 int zpci_set_irq_ctrl(u16 ctl, char *unused, u8 isc)
101 if (!test_facility(72))
104 " .insn rsy,0xeb00000000d1,%[ctl],%[isc],%[u]\n"
105 : : [ctl] "d" (ctl), [isc] "d" (isc << 27), [u] "Q" (*unused));
110 static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
112 register u64 __req asm("2") = req;
113 register u64 __offset asm("3") = offset;
118 " .insn rre,0xb9d20000,%[data],%[req]\n"
123 : [cc] "+d" (cc), [data] "=d" (__data), [req] "+d" (__req)
126 *status = __req >> 24 & 0xff;
131 static inline int __pcilg(u64 *data, u64 req, u64 offset, u8 *status)
136 cc = ____pcilg(&__data, req, offset, status);
143 int zpci_load(u64 *data, u64 req, u64 offset)
149 cc = __pcilg(data, req, offset, &status);
151 udelay(ZPCI_INSN_BUSY_DELAY);
155 zpci_err_insn(cc, status, req, offset);
157 return (cc > 0) ? -EIO : cc;
159 EXPORT_SYMBOL_GPL(zpci_load);
162 static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status)
164 register u64 __req asm("2") = req;
165 register u64 __offset asm("3") = offset;
169 " .insn rre,0xb9d00000,%[data],%[req]\n"
174 : [cc] "+d" (cc), [req] "+d" (__req)
175 : "d" (__offset), [data] "d" (data)
177 *status = __req >> 24 & 0xff;
181 int zpci_store(u64 data, u64 req, u64 offset)
187 cc = __pcistg(data, req, offset, &status);
189 udelay(ZPCI_INSN_BUSY_DELAY);
193 zpci_err_insn(cc, status, req, offset);
195 return (cc > 0) ? -EIO : cc;
197 EXPORT_SYMBOL_GPL(zpci_store);
199 /* PCI Store Block */
200 static inline int __pcistb(const u64 *data, u64 req, u64 offset, u8 *status)
205 " .insn rsy,0xeb00000000d0,%[req],%[offset],%[data]\n"
210 : [cc] "+d" (cc), [req] "+d" (req)
211 : [offset] "d" (offset), [data] "Q" (*data)
213 *status = req >> 24 & 0xff;
217 int zpci_store_block(const u64 *data, u64 req, u64 offset)
223 cc = __pcistb(data, req, offset, &status);
225 udelay(ZPCI_INSN_BUSY_DELAY);
229 zpci_err_insn(cc, status, req, offset);
231 return (cc > 0) ? -EIO : cc;
233 EXPORT_SYMBOL_GPL(zpci_store_block);