1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006 PA Semi, Inc
5 * Authors: Kip Walker, PA Semi
6 * Olof Johansson, PA Semi
8 * Maintained by: Olof Johansson <olof@lixom.net>
10 * Based on arch/powerpc/platforms/maple/pci.c
14 #include <linux/kernel.h>
15 #include <linux/of_address.h>
16 #include <linux/pci.h>
18 #include <asm/pci-bridge.h>
19 #include <asm/isa-bridge.h>
20 #include <asm/machdep.h>
22 #include <asm/ppc-pci.h>
26 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
28 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset)
30 /* Device 0 Function 0 is special: It's config space spans function 1 as
31 * well, so allow larger offset. It's really a two-function device but the
32 * second function does not probe.
34 if (bus == 0 && devfn == 0)
40 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose,
41 u8 bus, u8 devfn, int offset)
43 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
46 static inline int is_root_port(int busno, int devfn)
48 return ((busno == 0) && (PCI_FUNC(devfn) < 4) &&
49 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17)));
52 static inline int is_5945_reg(int reg)
54 return (((reg >= 0x18) && (reg < 0x34)) ||
55 ((reg >= 0x158) && (reg < 0x178)));
58 static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
59 int offset, int len, u32 *val)
61 struct pci_controller *hose;
62 void volatile __iomem *addr, *dummy;
66 if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset))
69 hose = pci_bus_to_host(bus);
71 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3);
74 /* Workaround bug 5945: write 0 to a dummy register before reading,
75 * and write back what we read. We must read/write the full 32-bit
76 * contents so we need to shift and mask by hand.
78 dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10);
85 *val = (tmp >> (8*byte)) & 0xff;
91 *val = (tmp >> 16) & 0xffff;
101 #ifdef CONFIG_PPC_PASEMI_NEMO
102 #define PXP_ERR_CFG_REG 0x4
103 #define PXP_IGNORE_PCIE_ERRORS 0x800
106 static void sb600_set_flag(int bus)
108 static void __iomem *iob_mapbase = NULL;
110 struct device_node *dn;
113 if (iob_mapbase == NULL) {
114 dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
116 pr_crit("NEMO SB600 missing iob node\n");
120 err = of_address_to_resource(dn, 0, &res);
124 pr_crit("NEMO SB600 missing resource\n");
128 pr_info("NEMO SB600 IOB base %08llx\n",res.start);
130 iob_mapbase = ioremap(res.start + 0x100, 0x94);
133 if (iob_mapbase != NULL) {
134 if (bus == SB600_BUS) {
136 * This is the SB600's bus, tell the PCI-e root port
137 * to allow non-zero devices to enumerate.
139 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) | PXP_IGNORE_PCIE_ERRORS);
142 * Only scan device 0 on other busses
144 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) & ~PXP_IGNORE_PCIE_ERRORS);
151 static void sb600_set_flag(int bus)
156 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
157 int offset, int len, u32 *val)
159 struct pci_controller *hose;
160 void volatile __iomem *addr;
162 hose = pci_bus_to_host(bus);
164 return PCIBIOS_DEVICE_NOT_FOUND;
166 if (!pa_pxp_offset_valid(bus->number, devfn, offset))
167 return PCIBIOS_BAD_REGISTER_NUMBER;
169 if (workaround_5945(bus, devfn, offset, len, val))
170 return PCIBIOS_SUCCESSFUL;
172 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
174 sb600_set_flag(bus->number);
177 * Note: the caller has already checked that offset is
178 * suitably aligned and that len is 1, 2 or 4.
185 *val = in_le16(addr);
188 *val = in_le32(addr);
192 return PCIBIOS_SUCCESSFUL;
195 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
196 int offset, int len, u32 val)
198 struct pci_controller *hose;
199 void volatile __iomem *addr;
201 hose = pci_bus_to_host(bus);
203 return PCIBIOS_DEVICE_NOT_FOUND;
205 if (!pa_pxp_offset_valid(bus->number, devfn, offset))
206 return PCIBIOS_BAD_REGISTER_NUMBER;
208 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
210 sb600_set_flag(bus->number);
213 * Note: the caller has already checked that offset is
214 * suitably aligned and that len is 1, 2 or 4.
227 return PCIBIOS_SUCCESSFUL;
230 static struct pci_ops pa_pxp_ops = {
231 .read = pa_pxp_read_config,
232 .write = pa_pxp_write_config,
235 static void __init setup_pa_pxp(struct pci_controller *hose)
237 hose->ops = &pa_pxp_ops;
238 hose->cfg_data = ioremap(0xe0000000, 0x10000000);
241 static int __init pas_add_bridge(struct device_node *dev)
243 struct pci_controller *hose;
245 pr_debug("Adding PCI host bridge %pOF\n", dev);
247 hose = pcibios_alloc_controller(dev);
251 hose->first_busno = 0;
252 hose->last_busno = 0xff;
253 hose->controller_ops = pasemi_pci_controller_ops;
257 pr_info("Found PA-PXP PCI host bridge.\n");
259 /* Interpret the "ranges" property */
260 pci_process_bridge_OF_ranges(hose, dev, 1);
263 * Scan for an isa bridge. This is needed to find the SB600 on the nemo
264 * and does nothing on machines without one.
266 isa_bridge_find_early(hose);
271 void __init pas_pci_init(void)
273 struct device_node *np;
276 pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
278 np = of_find_compatible_node(of_root, NULL, "pasemi,rootbus");
280 res = pas_add_bridge(np);
285 void __iomem *__init pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
287 struct pci_controller *hose;
289 hose = pci_bus_to_host(dev->bus);
291 return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset);
294 struct pci_controller_ops pasemi_pci_controller_ops;