pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/delay.h>
  36 #include <linux/init.h>
  37 #include <linux/module.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/iommu.h>
  40 #include <linux/pci.h>
  41 #include <linux/slab.h>
  42 #include <linux/vmalloc.h>
  43 #include <linux/mutex.h>
  44
  45
  46 #include <sound/core.h>
  47 #include <sound/emu10k1.h>
  48 #include <linux/firmware.h>
  49 #include "p16v.h"
  50 #include "tina2.h"
  51 #include "p17v.h"
  52
  53
  54 #define HANA_FILENAME "/*(DEBLOBBED)*/"
  55 #define DOCK_FILENAME "/*(DEBLOBBED)*/"
  56 #define EMU1010B_FILENAME "/*(DEBLOBBED)*/"
  57 #define MICRO_DOCK_FILENAME "/*(DEBLOBBED)*/"
  58 #define EMU0404_FILENAME "/*(DEBLOBBED)*/"
  59 #define EMU1010_NOTEBOOK_FILENAME "/*(DEBLOBBED)*/"
  60
  61 /*(DEBLOBBED)*/
  62
  63
  64 /*************************************************************************
  65  * EMU10K1 init / done
  66  *************************************************************************/
  67
  68 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
  69 {
  70         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  71         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  72         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  73         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  74         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  75         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  76         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  77
  78         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  79         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  80         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  81         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  82         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  83         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  84
  85         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  86         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  87         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  88         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  89         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  90         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  91         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  92         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  93
  94         /*** these are last so OFF prevents writing ***/
  95         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
  96         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
  97         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
  98         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
  99         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 100
 101         /* Audigy extra stuffs */
 102         if (emu->audigy) {
 103                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 104                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 105                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 106                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 107                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 108                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 109                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 110         }
 111 }
 112
 113 static unsigned int spi_dac_init[] = {
 114                 0x00ff,
 115                 0x02ff,
 116                 0x0400,
 117                 0x0520,
 118                 0x0600,
 119                 0x08ff,
 120                 0x0aff,
 121                 0x0cff,
 122                 0x0eff,
 123                 0x10ff,
 124                 0x1200,
 125                 0x1400,
 126                 0x1480,
 127                 0x1800,
 128                 0x1aff,
 129                 0x1cff,
 130                 0x1e00,
 131                 0x0530,
 132                 0x0602,
 133                 0x0622,
 134                 0x1400,
 135 };
 136
 137 static unsigned int i2c_adc_init[][2] = {
 138         { 0x17, 0x00 }, /* Reset */
 139         { 0x07, 0x00 }, /* Timeout */
 140         { 0x0b, 0x22 },  /* Interface control */
 141         { 0x0c, 0x22 },  /* Master mode control */
 142         { 0x0d, 0x08 },  /* Powerdown control */
 143         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 144         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 145         { 0x10, 0x7b },  /* ALC Control 1 */
 146         { 0x11, 0x00 },  /* ALC Control 2 */
 147         { 0x12, 0x32 },  /* ALC Control 3 */
 148         { 0x13, 0x00 },  /* Noise gate control */
 149         { 0x14, 0xa6 },  /* Limiter control */
 150         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
 151 };
 152
 153 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 154 {
 155         unsigned int silent_page;
 156         int ch;
 157         u32 tmp;
 158
 159         /* disable audio and lock cache */
 160         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
 161                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 162
 163         /* reset recording buffers */
 164         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 165         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 166         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 167         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 168         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 169         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 170
 171         /* disable channel interrupt */
 172         outl(0, emu->port + INTE);
 173         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 174         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 175         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 176         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 177
 178         if (emu->audigy) {
 179                 /* set SPDIF bypass mode */
 180                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 181                 /* enable rear left + rear right AC97 slots */
 182                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 183                                       AC97SLOT_REAR_LEFT);
 184         }
 185
 186         /* init envelope engine */
 187         for (ch = 0; ch < NUM_G; ch++)
 188                 snd_emu10k1_voice_init(emu, ch);
 189
 190         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 191         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 192         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 193
 194         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 195                 /* Hacks for Alice3 to work independent of haP16V driver */
 196                 /* Setup SRCMulti_I2S SamplingRate */
 197                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 198                 tmp &= 0xfffff1ff;
 199                 tmp |= (0x2<<9);
 200                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 201
 202                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 203                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 204                 /* Setup SRCMulti Input Audio Enable */
 205                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 206                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 207
 208                 /* Enabled Phased (8-channel) P16V playback */
 209                 outl(0x0201, emu->port + HCFG2);
 210                 /* Set playback routing. */
 211                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 212         }
 213         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 214                 /* Hacks for Alice3 to work independent of haP16V driver */
 215                 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
 216                 /* Setup SRCMulti_I2S SamplingRate */
 217                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 218                 tmp &= 0xfffff1ff;
 219                 tmp |= (0x2<<9);
 220                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 221
 222                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 223                 outl(0x600000, emu->port + 0x20);
 224                 outl(0x14, emu->port + 0x24);
 225
 226                 /* Setup SRCMulti Input Audio Enable */
 227                 outl(0x7b0000, emu->port + 0x20);
 228                 outl(0xFF000000, emu->port + 0x24);
 229
 230                 /* Setup SPDIF Out Audio Enable */
 231                 /* The Audigy 2 Value has a separate SPDIF out,
 232                  * so no need for a mixer switch
 233                  */
 234                 outl(0x7a0000, emu->port + 0x20);
 235                 outl(0xFF000000, emu->port + 0x24);
 236                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 237                 outl(tmp, emu->port + A_IOCFG);
 238         }
 239         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 240                 int size, n;
 241
 242                 size = ARRAY_SIZE(spi_dac_init);
 243                 for (n = 0; n < size; n++)
 244                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 245
 246                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 247                 /* Enable GPIOs
 248                  * GPIO0: Unknown
 249                  * GPIO1: Speakers-enabled.
 250                  * GPIO2: Unknown
 251                  * GPIO3: Unknown
 252                  * GPIO4: IEC958 Output on.
 253                  * GPIO5: Unknown
 254                  * GPIO6: Unknown
 255                  * GPIO7: Unknown
 256                  */
 257                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 258         }
 259         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 260                 int size, n;
 261
 262                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 263                 tmp = inl(emu->port + A_IOCFG);
 264                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 265                 tmp = inl(emu->port + A_IOCFG);
 266                 size = ARRAY_SIZE(i2c_adc_init);
 267                 for (n = 0; n < size; n++)
 268                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 269                 for (n = 0; n < 4; n++) {
 270                         emu->i2c_capture_volume[n][0] = 0xcf;
 271                         emu->i2c_capture_volume[n][1] = 0xcf;
 272                 }
 273         }
 274
 275
 276         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 277         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 278         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 279
 280         silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
 281         for (ch = 0; ch < NUM_G; ch++) {
 282                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 283                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 284         }
 285
 286         if (emu->card_capabilities->emu_model) {
 287                 outl(HCFG_AUTOMUTE_ASYNC |
 288                         HCFG_EMU32_SLAVE |
 289                         HCFG_AUDIOENABLE, emu->port + HCFG);
 290         /*
 291          *  Hokay, setup HCFG
 292          *   Mute Disable Audio = 0
 293          *   Lock Tank Memory = 1
 294          *   Lock Sound Memory = 0
 295          *   Auto Mute = 1
 296          */
 297         } else if (emu->audigy) {
 298                 if (emu->revision == 4) /* audigy2 */
 299                         outl(HCFG_AUDIOENABLE |
 300                              HCFG_AC3ENABLE_CDSPDIF |
 301                              HCFG_AC3ENABLE_GPSPDIF |
 302                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 303                 else
 304                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 305         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 306          * e.g. card_capabilities->joystick */
 307         } else if (emu->model == 0x20 ||
 308             emu->model == 0xc400 ||
 309             (emu->model == 0x21 && emu->revision < 6))
 310                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 311         else
 312                 /* With on-chip joystick */
 313                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 314
 315         if (enable_ir) {        /* enable IR for SB Live */
 316                 if (emu->card_capabilities->emu_model) {
 317                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 318                 } else if (emu->card_capabilities->i2c_adc) {
 319                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 320                 } else if (emu->audigy) {
 321                         unsigned int reg = inl(emu->port + A_IOCFG);
 322                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 323                         udelay(500);
 324                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 325                         udelay(100);
 326                         outl(reg, emu->port + A_IOCFG);
 327                 } else {
 328                         unsigned int reg = inl(emu->port + HCFG);
 329                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 330                         udelay(500);
 331                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 332                         udelay(100);
 333                         outl(reg, emu->port + HCFG);
 334                 }
 335         }
 336
 337         if (emu->card_capabilities->emu_model) {
 338                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 339         } else if (emu->card_capabilities->i2c_adc) {
 340                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 341         } else if (emu->audigy) {       /* enable analog output */
 342                 unsigned int reg = inl(emu->port + A_IOCFG);
 343                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 344         }
 345
 346         if (emu->address_mode == 0) {
 347                 /* use 16M in 4G */
 348                 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 355 {
 356         /*
 357          *  Enable the audio bit
 358          */
 359         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 360
 361         /* Enable analog/digital outs on audigy */
 362         if (emu->card_capabilities->emu_model) {
 363                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 364         } else if (emu->card_capabilities->i2c_adc) {
 365                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 366         } else if (emu->audigy) {
 367                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 368
 369                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 370                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 371                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 372                          * So, sequence is important. */
 373                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 374                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 375                         /* Unmute Analog now. */
 376                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 377                 } else {
 378                         /* Disable routing from AC97 line out to Front speakers */
 379                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 380                 }
 381         }
 382
 383 #if 0
 384         {
 385         unsigned int tmp;
 386         /* FIXME: the following routine disables LiveDrive-II !! */
 387         /* TOSLink detection */
 388         emu->tos_link = 0;
 389         tmp = inl(emu->port + HCFG);
 390         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 391                 outl(tmp|0x800, emu->port + HCFG);
 392                 udelay(50);
 393                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 394                         emu->tos_link = 1;
 395                         outl(tmp, emu->port + HCFG);
 396                 }
 397         }
 398         }
 399 #endif
 400
 401         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 402 }
 403
 404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
 405 {
 406         int ch;
 407
 408         outl(0, emu->port + INTE);
 409
 410         /*
 411          *  Shutdown the chip
 412          */
 413         for (ch = 0; ch < NUM_G; ch++)
 414                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 415         for (ch = 0; ch < NUM_G; ch++) {
 416                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 417                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 419                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 420         }
 421
 422         /* reset recording buffers */
 423         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 424         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 425         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 427         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 428         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 429         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 430         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 431         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 432         if (emu->audigy)
 433                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 434         else
 435                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 436
 437         /* disable channel interrupt */
 438         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 439         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 440         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 441         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 442
 443         /* disable audio and lock cache */
 444         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 445         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 446
 447         return 0;
 448 }
 449
 450 /*************************************************************************
 451  * ECARD functional implementation
 452  *************************************************************************/
 453
 454 /* In A1 Silicon, these bits are in the HC register */
 455 #define HOOKN_BIT               (1L << 12)
 456 #define HANDN_BIT               (1L << 11)
 457 #define PULSEN_BIT              (1L << 10)
 458
 459 #define EC_GDI1                 (1 << 13)
 460 #define EC_GDI0                 (1 << 14)
 461
 462 #define EC_NUM_CONTROL_BITS     20
 463
 464 #define EC_AC3_DATA_SELN        0x0001L
 465 #define EC_EE_DATA_SEL          0x0002L
 466 #define EC_EE_CNTRL_SELN        0x0004L
 467 #define EC_EECLK                0x0008L
 468 #define EC_EECS                 0x0010L
 469 #define EC_EESDO                0x0020L
 470 #define EC_TRIM_CSN             0x0040L
 471 #define EC_TRIM_SCLK            0x0080L
 472 #define EC_TRIM_SDATA           0x0100L
 473 #define EC_TRIM_MUTEN           0x0200L
 474 #define EC_ADCCAL               0x0400L
 475 #define EC_ADCRSTN              0x0800L
 476 #define EC_DACCAL               0x1000L
 477 #define EC_DACMUTEN             0x2000L
 478 #define EC_LEDN                 0x4000L
 479
 480 #define EC_SPDIF0_SEL_SHIFT     15
 481 #define EC_SPDIF1_SEL_SHIFT     17
 482 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 483 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 484 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 485 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 486 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 487                                          * be incremented any time the EEPROM's
 488                                          * format is changed.  */
 489
 490 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 491
 492 /* Addresses for special values stored in to EEPROM */
 493 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 494 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 495 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 496
 497 #define EC_LAST_PROMFILE_ADDR   0x2f
 498
 499 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 500                                          * can be up to 30 characters in length
 501                                          * and is stored as a NULL-terminated
 502                                          * ASCII string.  Any unused bytes must be
 503                                          * filled with zeros */
 504 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 505
 506
 507 /* Most of this stuff is pretty self-evident.  According to the hardware
 508  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 509  * offset problem.  Weird.
 510  */
 511 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 512                                  EC_TRIM_CSN)
 513
 514
 515 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 516 #define EC_DEFAULT_SPDIF0_SEL   0x0
 517 #define EC_DEFAULT_SPDIF1_SEL   0x4
 518
 519 /**************************************************************************
 520  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 521  *  control latch will is loaded bit-serially by toggling the Modem control
 522  *  lines from function 2 on the E8010.  This function hides these details
 523  *  and presents the illusion that we are actually writing to a distinct
 524  *  register.
 525  */
 526
 527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
 528 {
 529         unsigned short count;
 530         unsigned int data;
 531         unsigned long hc_port;
 532         unsigned int hc_value;
 533
 534         hc_port = emu->port + HCFG;
 535         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 536         outl(hc_value, hc_port);
 537
 538         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 539
 540                 /* Set up the value */
 541                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 542                 value >>= 1;
 543
 544                 outl(hc_value | data, hc_port);
 545
 546                 /* Clock the shift register */
 547                 outl(hc_value | data | HANDN_BIT, hc_port);
 548                 outl(hc_value | data, hc_port);
 549         }
 550
 551         /* Latch the bits */
 552         outl(hc_value | HOOKN_BIT, hc_port);
 553         outl(hc_value, hc_port);
 554 }
 555
 556 /**************************************************************************
 557  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 558  * trim value consists of a 16bit value which is composed of two
 559  * 8 bit gain/trim values, one for the left channel and one for the
 560  * right channel.  The following table maps from the Gain/Attenuation
 561  * value in decibels into the corresponding bit pattern for a single
 562  * channel.
 563  */
 564
 565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
 566                                          unsigned short gain)
 567 {
 568         unsigned int bit;
 569
 570         /* Enable writing to the TRIM registers */
 571         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 572
 573         /* Do it again to insure that we meet hold time requirements */
 574         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 575
 576         for (bit = (1 << 15); bit; bit >>= 1) {
 577                 unsigned int value;
 578
 579                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 580
 581                 if (gain & bit)
 582                         value |= EC_TRIM_SDATA;
 583
 584                 /* Clock the bit */
 585                 snd_emu10k1_ecard_write(emu, value);
 586                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 587                 snd_emu10k1_ecard_write(emu, value);
 588         }
 589
 590         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 591 }
 592
 593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
 594 {
 595         unsigned int hc_value;
 596
 597         /* Set up the initial settings */
 598         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 599                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 600                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 601
 602         /* Step 0: Set the codec type in the hardware control register
 603          * and enable audio output */
 604         hc_value = inl(emu->port + HCFG);
 605         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 606         inl(emu->port + HCFG);
 607
 608         /* Step 1: Turn off the led and deassert TRIM_CS */
 609         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 610
 611         /* Step 2: Calibrate the ADC and DAC */
 612         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 613
 614         /* Step 3: Wait for awhile;   XXX We can't get away with this
 615          * under a real operating system; we'll need to block and wait that
 616          * way. */
 617         snd_emu10k1_wait(emu, 48000);
 618
 619         /* Step 4: Switch off the DAC and ADC calibration.  Note
 620          * That ADC_CAL is actually an inverted signal, so we assert
 621          * it here to stop calibration.  */
 622         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 623
 624         /* Step 4: Switch into run mode */
 625         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 626
 627         /* Step 5: Set the analog input gain */
 628         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 629
 630         return 0;
 631 }
 632
 633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
 634 {
 635         unsigned long special_port;
 636         unsigned int value;
 637
 638         /* Special initialisation routine
 639          * before the rest of the IO-Ports become active.
 640          */
 641         special_port = emu->port + 0x38;
 642         value = inl(special_port);
 643         outl(0x00d00000, special_port);
 644         value = inl(special_port);
 645         outl(0x00d00001, special_port);
 646         value = inl(special_port);
 647         outl(0x00d0005f, special_port);
 648         value = inl(special_port);
 649         outl(0x00d0007f, special_port);
 650         value = inl(special_port);
 651         outl(0x0090007f, special_port);
 652         value = inl(special_port);
 653
 654         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 655         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 656         msleep(200);
 657         return 0;
 658 }
 659
 660 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
 661                                      const struct firmware *fw_entry)
 662 {
 663         int n, i;
 664         int reg;
 665         int value;
 666         unsigned int write_post;
 667         unsigned long flags;
 668
 669         if (!fw_entry)
 670                 return -EIO;
 671
 672         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 673         /* GPIO7 -> FPGA PGMN
 674          * GPIO6 -> FPGA CCLK
 675          * GPIO5 -> FPGA DIN
 676          * FPGA CONFIG OFF -> FPGA PGMN
 677          */
 678         spin_lock_irqsave(&emu->emu_lock, flags);
 679         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 680         write_post = inl(emu->port + A_IOCFG);
 681         udelay(100);
 682         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 683         write_post = inl(emu->port + A_IOCFG);
 684         udelay(100); /* Allow FPGA memory to clean */
 685         for (n = 0; n < fw_entry->size; n++) {
 686                 value = fw_entry->data[n];
 687                 for (i = 0; i < 8; i++) {
 688                         reg = 0x80;
 689                         if (value & 0x1)
 690                                 reg = reg | 0x20;
 691                         value = value >> 1;
 692                         outl(reg, emu->port + A_IOCFG);
 693                         write_post = inl(emu->port + A_IOCFG);
 694                         outl(reg | 0x40, emu->port + A_IOCFG);
 695                         write_post = inl(emu->port + A_IOCFG);
 696                 }
 697         }
 698         /* After programming, set GPIO bit 4 high again. */
 699         outl(0x10, emu->port + A_IOCFG);
 700         write_post = inl(emu->port + A_IOCFG);
 701         spin_unlock_irqrestore(&emu->emu_lock, flags);
 702
 703         return 0;
 704 }
 705
 706 /* firmware file names, per model, init-fw and dock-fw (optional) */
 707 static const char * const firmware_names[5][2] = {
 708         [EMU_MODEL_EMU1010] = {
 709                 HANA_FILENAME, DOCK_FILENAME
 710         },
 711         [EMU_MODEL_EMU1010B] = {
 712                 EMU1010B_FILENAME, MICRO_DOCK_FILENAME
 713         },
 714         [EMU_MODEL_EMU1616] = {
 715                 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
 716         },
 717         [EMU_MODEL_EMU0404] = {
 718                 EMU0404_FILENAME, NULL
 719         },
 720 };
 721
 722 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
 723                                      const struct firmware **fw)
 724 {
 725         const char *filename;
 726         int err;
 727
 728         if (!*fw) {
 729                 filename = firmware_names[emu->card_capabilities->emu_model][dock];
 730                 if (!filename)
 731                         return 0;
 732                 err = reject_firmware(fw, filename, &emu->pci->dev);
 733                 if (err)
 734                         return err;
 735         }
 736
 737         return snd_emu1010_load_firmware_entry(emu, *fw);
 738 }
 739
 740 static void emu1010_firmware_work(struct work_struct *work)
 741 {
 742         struct snd_emu10k1 *emu;
 743         u32 tmp, tmp2, reg;
 744         int err;
 745
 746         emu = container_of(work, struct snd_emu10k1,
 747                            emu1010.firmware_work.work);
 748         if (emu->card->shutdown)
 749                 return;
 750 #ifdef CONFIG_PM_SLEEP
 751         if (emu->suspend)
 752                 return;
 753 #endif
 754         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
 755         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
 756         if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 757                 /* Audio Dock attached */
 758                 /* Return to Audio Dock programming mode */
 759                 dev_info(emu->card->dev,
 760                          "emu1010: Loading Audio Dock Firmware\n");
 761                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
 762                                        EMU_HANA_FPGA_CONFIG_AUDIODOCK);
 763                 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
 764                 if (err < 0)
 765                         goto next;
 766
 767                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
 768                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp);
 769                 dev_info(emu->card->dev,
 770                          "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp);
 771                 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 772                 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
 773                 dev_info(emu->card->dev,
 774                          "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
 775                 if ((tmp & 0x1f) != 0x15) {
 776                         /* FPGA failed to be programmed */
 777                         dev_info(emu->card->dev,
 778                                  "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
 779                                  tmp);
 780                         goto next;
 781                 }
 782                 dev_info(emu->card->dev,
 783                          "emu1010: Audio Dock Firmware loaded\n");
 784                 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
 785                 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
 786                 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
 787                 /* Sync clocking between 1010 and Dock */
 788                 /* Allow DLL to settle */
 789                 msleep(10);
 790                 /* Unmute all. Default is muted after a firmware load */
 791                 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 792         } else if (!reg && emu->emu1010.last_reg) {
 793                 /* Audio Dock removed */
 794                 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
 795                 /* Unmute all */
 796                 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 797         }
 798
 799  next:
 800         emu->emu1010.last_reg = reg;
 801         if (!emu->card->shutdown)
 802                 schedule_delayed_work(&emu->emu1010.firmware_work,
 803                                       msecs_to_jiffies(1000));
 804 }
 805
 806 /*
 807  * EMU-1010 - details found out from this driver, official MS Win drivers,
 808  * testing the card:
 809  *
 810  * Audigy2 (aka Alice2):
 811  * ---------------------
 812  *      * communication over PCI
 813  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 814  *        to 2 x 16-bit, using internal DSP instructions
 815  *      * slave mode, clock supplied by HANA
 816  *      * linked to HANA using:
 817  *              32 x 32-bit serial EMU32 output channels
 818  *              16 x EMU32 input channels
 819  *              (?) x I2S I/O channels (?)
 820  *
 821  * FPGA (aka HANA):
 822  * ---------------
 823  *      * provides all (?) physical inputs and outputs of the card
 824  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 825  *      * provides clock signal for the card and Alice2
 826  *      * two crystals - for 44.1kHz and 48kHz multiples
 827  *      * provides internal routing of signal sources to signal destinations
 828  *      * inputs/outputs to Alice2 - see above
 829  *
 830  * Current status of the driver:
 831  * ----------------------------
 832  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 833  *      * PCM device nb. 2:
 834  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 835  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 836  */
 837 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
 838 {
 839         unsigned int i;
 840         u32 tmp, tmp2, reg;
 841         int err;
 842
 843         dev_info(emu->card->dev, "emu1010: Special config.\n");
 844         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 845          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 846          * Mute all codecs.
 847          */
 848         outl(0x0005a00c, emu->port + HCFG);
 849         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 850          * Lock Tank Memory Cache,
 851          * Mute all codecs.
 852          */
 853         outl(0x0005a004, emu->port + HCFG);
 854         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 855          * Mute all codecs.
 856          */
 857         outl(0x0005a000, emu->port + HCFG);
 858         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 859          * Mute all codecs.
 860          */
 861         outl(0x0005a000, emu->port + HCFG);
 862
 863         /* Disable 48Volt power to Audio Dock */
 864         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
 865
 866         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 867         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 868         dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
 869         if ((reg & 0x3f) == 0x15) {
 870                 /* FPGA netlist already present so clear it */
 871                 /* Return to programming mode */
 872
 873                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
 874         }
 875         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 876         dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
 877         if ((reg & 0x3f) == 0x15) {
 878                 /* FPGA failed to return to programming mode */
 879                 dev_info(emu->card->dev,
 880                          "emu1010: FPGA failed to return to programming mode\n");
 881                 return -ENODEV;
 882         }
 883         dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
 884
 885         err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
 886         if (err < 0) {
 887                 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
 888                 return err;
 889         }
 890
 891         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 892         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 893         if ((reg & 0x3f) != 0x15) {
 894                 /* FPGA failed to be programmed */
 895                 dev_info(emu->card->dev,
 896                          "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
 897                          reg);
 898                 return -ENODEV;
 899         }
 900
 901         dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
 902         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
 903         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
 904         dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
 905         /* Enable 48Volt power to Audio Dock */
 906         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
 907
 908         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 909         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 910         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 911         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 912         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
 913         /* Optical -> ADAT I/O  */
 914         /* 0 : SPDIF
 915          * 1 : ADAT
 916          */
 917         emu->emu1010.optical_in = 1; /* IN_ADAT */
 918         emu->emu1010.optical_out = 1; /* IN_ADAT */
 919         tmp = 0;
 920         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 921                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 922         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
 923         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
 924         /* Set no attenuation on Audio Dock pads. */
 925         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
 926         emu->emu1010.adc_pads = 0x00;
 927         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 928         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 929         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 930         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 931         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
 932         /* DAC PADs. */
 933         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
 934         emu->emu1010.dac_pads = 0x0f;
 935         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 936         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 937         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
 938         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 939         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
 940         /* MIDI routing */
 941         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
 942         /* Unknown. */
 943         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
 944         /* IRQ Enable: All on */
 945         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
 946         /* IRQ Enable: All off */
 947         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
 948
 949         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 950         dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
 951         /* Default WCLK set to 48kHz. */
 952         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
 953         /* Word Clock source, Internal 48kHz x1 */
 954         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
 955         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
 956         /* Audio Dock LEDs. */
 957         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 958
 959 #if 0
 960         /* For 96kHz */
 961         snd_emu1010_fpga_link_dst_src_write(emu,
 962                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 963         snd_emu1010_fpga_link_dst_src_write(emu,
 964                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 965         snd_emu1010_fpga_link_dst_src_write(emu,
 966                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 967         snd_emu1010_fpga_link_dst_src_write(emu,
 968                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 969 #endif
 970 #if 0
 971         /* For 192kHz */
 972         snd_emu1010_fpga_link_dst_src_write(emu,
 973                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 974         snd_emu1010_fpga_link_dst_src_write(emu,
 975                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 976         snd_emu1010_fpga_link_dst_src_write(emu,
 977                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 978         snd_emu1010_fpga_link_dst_src_write(emu,
 979                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 980         snd_emu1010_fpga_link_dst_src_write(emu,
 981                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 982         snd_emu1010_fpga_link_dst_src_write(emu,
 983                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 984         snd_emu1010_fpga_link_dst_src_write(emu,
 985                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 986         snd_emu1010_fpga_link_dst_src_write(emu,
 987                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 988 #endif
 989 #if 1
 990         /* For 48kHz */
 991         snd_emu1010_fpga_link_dst_src_write(emu,
 992                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 993         snd_emu1010_fpga_link_dst_src_write(emu,
 994                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 995         snd_emu1010_fpga_link_dst_src_write(emu,
 996                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 997         snd_emu1010_fpga_link_dst_src_write(emu,
 998                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 999         snd_emu1010_fpga_link_dst_src_write(emu,
1000                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1001         snd_emu1010_fpga_link_dst_src_write(emu,
1002                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1003         snd_emu1010_fpga_link_dst_src_write(emu,
1004                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1005         snd_emu1010_fpga_link_dst_src_write(emu,
1006                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1007         /* Pavel Hofman - setting defaults for 8 more capture channels
1008          * Defaults only, users will set their own values anyways, let's
1009          * just copy/paste.
1010          */
1011
1012         snd_emu1010_fpga_link_dst_src_write(emu,
1013                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1014         snd_emu1010_fpga_link_dst_src_write(emu,
1015                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1016         snd_emu1010_fpga_link_dst_src_write(emu,
1017                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1018         snd_emu1010_fpga_link_dst_src_write(emu,
1019                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1020         snd_emu1010_fpga_link_dst_src_write(emu,
1021                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1022         snd_emu1010_fpga_link_dst_src_write(emu,
1023                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1024         snd_emu1010_fpga_link_dst_src_write(emu,
1025                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1026         snd_emu1010_fpga_link_dst_src_write(emu,
1027                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1028 #endif
1029 #if 0
1030         /* Original */
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1035         snd_emu1010_fpga_link_dst_src_write(emu,
1036                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1037         snd_emu1010_fpga_link_dst_src_write(emu,
1038                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1039         snd_emu1010_fpga_link_dst_src_write(emu,
1040                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1041         snd_emu1010_fpga_link_dst_src_write(emu,
1042                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1043         snd_emu1010_fpga_link_dst_src_write(emu,
1044                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1045         snd_emu1010_fpga_link_dst_src_write(emu,
1046                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1047         snd_emu1010_fpga_link_dst_src_write(emu,
1048                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1049         snd_emu1010_fpga_link_dst_src_write(emu,
1050                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1051         snd_emu1010_fpga_link_dst_src_write(emu,
1052                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1053         snd_emu1010_fpga_link_dst_src_write(emu,
1054                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1055 #endif
1056         for (i = 0; i < 0x20; i++) {
1057                 /* AudioDock Elink <- Silence */
1058                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1059         }
1060         for (i = 0; i < 4; i++) {
1061                 /* Hana SPDIF Out <- Silence */
1062                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1063         }
1064         for (i = 0; i < 7; i++) {
1065                 /* Hamoa DAC <- Silence */
1066                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1067         }
1068         for (i = 0; i < 7; i++) {
1069                 /* Hana ADAT Out <- Silence */
1070                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1071         }
1072         snd_emu1010_fpga_link_dst_src_write(emu,
1073                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1074         snd_emu1010_fpga_link_dst_src_write(emu,
1075                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1076         snd_emu1010_fpga_link_dst_src_write(emu,
1077                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1078         snd_emu1010_fpga_link_dst_src_write(emu,
1079                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1080         snd_emu1010_fpga_link_dst_src_write(emu,
1081                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1082         snd_emu1010_fpga_link_dst_src_write(emu,
1083                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1084         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1085
1086         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1087
1088         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1089          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1090          * Mute all codecs.
1091          */
1092         outl(0x0000a000, emu->port + HCFG);
1093         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1094          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1095          * Un-Mute all codecs.
1096          */
1097         outl(0x0000a001, emu->port + HCFG);
1098
1099         /* Initial boot complete. Now patches */
1100
1101         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1102         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1103         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1104         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1105         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1106         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1107         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1108
1109 #if 0
1110         snd_emu1010_fpga_link_dst_src_write(emu,
1111                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1112         snd_emu1010_fpga_link_dst_src_write(emu,
1113                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1114         snd_emu1010_fpga_link_dst_src_write(emu,
1115                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1116         snd_emu1010_fpga_link_dst_src_write(emu,
1117                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1118 #endif
1119         /* Default outputs */
1120         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1121                 /* 1616(M) cardbus default outputs */
1122                 /* ALICE2 bus 0xa0 */
1123                 snd_emu1010_fpga_link_dst_src_write(emu,
1124                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1125                 emu->emu1010.output_source[0] = 17;
1126                 snd_emu1010_fpga_link_dst_src_write(emu,
1127                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1128                 emu->emu1010.output_source[1] = 18;
1129                 snd_emu1010_fpga_link_dst_src_write(emu,
1130                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1131                 emu->emu1010.output_source[2] = 19;
1132                 snd_emu1010_fpga_link_dst_src_write(emu,
1133                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1134                 emu->emu1010.output_source[3] = 20;
1135                 snd_emu1010_fpga_link_dst_src_write(emu,
1136                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1137                 emu->emu1010.output_source[4] = 21;
1138                 snd_emu1010_fpga_link_dst_src_write(emu,
1139                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1140                 emu->emu1010.output_source[5] = 22;
1141                 /* ALICE2 bus 0xa0 */
1142                 snd_emu1010_fpga_link_dst_src_write(emu,
1143                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1144                 emu->emu1010.output_source[16] = 17;
1145                 snd_emu1010_fpga_link_dst_src_write(emu,
1146                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1147                 emu->emu1010.output_source[17] = 18;
1148         } else {
1149                 /* ALICE2 bus 0xa0 */
1150                 snd_emu1010_fpga_link_dst_src_write(emu,
1151                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1152                 emu->emu1010.output_source[0] = 21;
1153                 snd_emu1010_fpga_link_dst_src_write(emu,
1154                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1155                 emu->emu1010.output_source[1] = 22;
1156                 snd_emu1010_fpga_link_dst_src_write(emu,
1157                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1158                 emu->emu1010.output_source[2] = 23;
1159                 snd_emu1010_fpga_link_dst_src_write(emu,
1160                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1161                 emu->emu1010.output_source[3] = 24;
1162                 snd_emu1010_fpga_link_dst_src_write(emu,
1163                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1164                 emu->emu1010.output_source[4] = 25;
1165                 snd_emu1010_fpga_link_dst_src_write(emu,
1166                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1167                 emu->emu1010.output_source[5] = 26;
1168                 snd_emu1010_fpga_link_dst_src_write(emu,
1169                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1170                 emu->emu1010.output_source[6] = 27;
1171                 snd_emu1010_fpga_link_dst_src_write(emu,
1172                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1173                 emu->emu1010.output_source[7] = 28;
1174                 /* ALICE2 bus 0xa0 */
1175                 snd_emu1010_fpga_link_dst_src_write(emu,
1176                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1177                 emu->emu1010.output_source[8] = 21;
1178                 snd_emu1010_fpga_link_dst_src_write(emu,
1179                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1180                 emu->emu1010.output_source[9] = 22;
1181                 /* ALICE2 bus 0xa0 */
1182                 snd_emu1010_fpga_link_dst_src_write(emu,
1183                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1184                 emu->emu1010.output_source[10] = 21;
1185                 snd_emu1010_fpga_link_dst_src_write(emu,
1186                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1187                 emu->emu1010.output_source[11] = 22;
1188                 /* ALICE2 bus 0xa0 */
1189                 snd_emu1010_fpga_link_dst_src_write(emu,
1190                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1191                 emu->emu1010.output_source[12] = 21;
1192                 snd_emu1010_fpga_link_dst_src_write(emu,
1193                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1194                 emu->emu1010.output_source[13] = 22;
1195                 /* ALICE2 bus 0xa0 */
1196                 snd_emu1010_fpga_link_dst_src_write(emu,
1197                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1198                 emu->emu1010.output_source[14] = 21;
1199                 snd_emu1010_fpga_link_dst_src_write(emu,
1200                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1201                 emu->emu1010.output_source[15] = 22;
1202                 /* ALICE2 bus 0xa0 */
1203                 snd_emu1010_fpga_link_dst_src_write(emu,
1204                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1205                 emu->emu1010.output_source[16] = 21;
1206                 snd_emu1010_fpga_link_dst_src_write(emu,
1207                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1208                 emu->emu1010.output_source[17] = 22;
1209                 snd_emu1010_fpga_link_dst_src_write(emu,
1210                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1211                 emu->emu1010.output_source[18] = 23;
1212                 snd_emu1010_fpga_link_dst_src_write(emu,
1213                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1214                 emu->emu1010.output_source[19] = 24;
1215                 snd_emu1010_fpga_link_dst_src_write(emu,
1216                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1217                 emu->emu1010.output_source[20] = 25;
1218                 snd_emu1010_fpga_link_dst_src_write(emu,
1219                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1220                 emu->emu1010.output_source[21] = 26;
1221                 snd_emu1010_fpga_link_dst_src_write(emu,
1222                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1223                 emu->emu1010.output_source[22] = 27;
1224                 snd_emu1010_fpga_link_dst_src_write(emu,
1225                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1226                 emu->emu1010.output_source[23] = 28;
1227         }
1228         /* TEMP: Select SPDIF in/out */
1229         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1230
1231         /* TEMP: Select 48kHz SPDIF out */
1232         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1233         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1234         /* Word Clock source, Internal 48kHz x1 */
1235         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1236         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1237         emu->emu1010.internal_clock = 1; /* 48000 */
1238         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1239         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1240         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1241         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1242         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1243
1244         return 0;
1245 }
1246 /*
1247  *  Create the EMU10K1 instance
1248  */
1249
1250 #ifdef CONFIG_PM_SLEEP
1251 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1252 static void free_pm_buffer(struct snd_emu10k1 *emu);
1253 #endif
1254
1255 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1256 {
1257         if (emu->port) {        /* avoid access to already used hardware */
1258                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1259                 snd_emu10k1_done(emu);
1260                 snd_emu10k1_free_efx(emu);
1261         }
1262         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1263                 /* Disable 48Volt power to Audio Dock */
1264                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1265         }
1266         cancel_delayed_work_sync(&emu->emu1010.firmware_work);
1267         release_firmware(emu->firmware);
1268         release_firmware(emu->dock_fw);
1269         if (emu->irq >= 0)
1270                 free_irq(emu->irq, emu);
1271         snd_util_memhdr_free(emu->memhdr);
1272         if (emu->silent_page.area)
1273                 snd_dma_free_pages(&emu->silent_page);
1274         if (emu->ptb_pages.area)
1275                 snd_dma_free_pages(&emu->ptb_pages);
1276         vfree(emu->page_ptr_table);
1277         vfree(emu->page_addr_table);
1278 #ifdef CONFIG_PM_SLEEP
1279         free_pm_buffer(emu);
1280 #endif
1281         if (emu->port)
1282                 pci_release_regions(emu->pci);
1283         if (emu->card_capabilities->ca0151_chip) /* P16V */
1284                 snd_p16v_free(emu);
1285         pci_disable_device(emu->pci);
1286         kfree(emu);
1287         return 0;
1288 }
1289
1290 static int snd_emu10k1_dev_free(struct snd_device *device)
1291 {
1292         struct snd_emu10k1 *emu = device->device_data;
1293         return snd_emu10k1_free(emu);
1294 }
1295
1296 static struct snd_emu_chip_details emu_chip_details[] = {
1297         /* Audigy 5/Rx SB1550 */
1298         /* Tested by michael@gernoth.net 28 Mar 2015 */
1299         /* DSP: CA10300-IAT LF
1300          * DAC: Cirrus Logic CS4382-KQZ
1301          * ADC: Philips 1361T
1302          * AC97: Sigmatel STAC9750
1303          * CA0151: None
1304          */
1305         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1306          .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1307          .id = "Audigy2",
1308          .emu10k2_chip = 1,
1309          .ca0108_chip = 1,
1310          .spk71 = 1,
1311          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1312          .ac97_chip = 1},
1313         /* Audigy4 (Not PRO) SB0610 */
1314         /* Tested by James@superbug.co.uk 4th April 2006 */
1315         /* A_IOCFG bits
1316          * Output
1317          * 0: ?
1318          * 1: ?
1319          * 2: ?
1320          * 3: 0 - Digital Out, 1 - Line in
1321          * 4: ?
1322          * 5: ?
1323          * 6: ?
1324          * 7: ?
1325          * Input
1326          * 8: ?
1327          * 9: ?
1328          * A: Green jack sense (Front)
1329          * B: ?
1330          * C: Black jack sense (Rear/Side Right)
1331          * D: Yellow jack sense (Center/LFE/Side Left)
1332          * E: ?
1333          * F: ?
1334          *
1335          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1336          * 0 - Digital Out
1337          * 1 - Line in
1338          */
1339         /* Mic input not tested.
1340          * Analog CD input not tested
1341          * Digital Out not tested.
1342          * Line in working.
1343          * Audio output 5.1 working. Side outputs not working.
1344          */
1345         /* DSP: CA10300-IAT LF
1346          * DAC: Cirrus Logic CS4382-KQZ
1347          * ADC: Philips 1361T
1348          * AC97: Sigmatel STAC9750
1349          * CA0151: None
1350          */
1351         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1352          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1353          .id = "Audigy2",
1354          .emu10k2_chip = 1,
1355          .ca0108_chip = 1,
1356          .spk71 = 1,
1357          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1358          .ac97_chip = 1} ,
1359         /* Audigy 2 Value AC3 out does not work yet.
1360          * Need to find out how to turn off interpolators.
1361          */
1362         /* Tested by James@superbug.co.uk 3rd July 2005 */
1363         /* DSP: CA0108-IAT
1364          * DAC: CS4382-KQ
1365          * ADC: Philips 1361T
1366          * AC97: STAC9750
1367          * CA0151: None
1368          */
1369         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1370          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1371          .id = "Audigy2",
1372          .emu10k2_chip = 1,
1373          .ca0108_chip = 1,
1374          .spk71 = 1,
1375          .ac97_chip = 1} ,
1376         /* Audigy 2 ZS Notebook Cardbus card.*/
1377         /* Tested by James@superbug.co.uk 6th November 2006 */
1378         /* Audio output 7.1/Headphones working.
1379          * Digital output working. (AC3 not checked, only PCM)
1380          * Audio Mic/Line inputs working.
1381          * Digital input not tested.
1382          */
1383         /* DSP: Tina2
1384          * DAC: Wolfson WM8768/WM8568
1385          * ADC: Wolfson WM8775
1386          * AC97: None
1387          * CA0151: None
1388          */
1389         /* Tested by James@superbug.co.uk 4th April 2006 */
1390         /* A_IOCFG bits
1391          * Output
1392          * 0: Not Used
1393          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1394          * 2: Analog input 0 = line in, 1 = mic in
1395          * 3: Not Used
1396          * 4: Digital output 0 = off, 1 = on.
1397          * 5: Not Used
1398          * 6: Not Used
1399          * 7: Not Used
1400          * Input
1401          *      All bits 1 (0x3fxx) means nothing plugged in.
1402          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1403          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1404          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1405          * E-F: Always 0
1406          *
1407          */
1408         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1409          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1410          .id = "Audigy2",
1411          .emu10k2_chip = 1,
1412          .ca0108_chip = 1,
1413          .ca_cardbus_chip = 1,
1414          .spi_dac = 1,
1415          .i2c_adc = 1,
1416          .spk71 = 1} ,
1417         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1418         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1419          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1420          .id = "EMU1010",
1421          .emu10k2_chip = 1,
1422          .ca0108_chip = 1,
1423          .ca_cardbus_chip = 1,
1424          .spk71 = 1 ,
1425          .emu_model = EMU_MODEL_EMU1616},
1426         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1427         /* This is MAEM8960, 0202 is MAEM 8980 */
1428         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1429          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1430          .id = "EMU1010",
1431          .emu10k2_chip = 1,
1432          .ca0108_chip = 1,
1433          .spk71 = 1,
1434          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1435         /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1436         /* This is MAEM8986, 0202 is MAEM8980 */
1437         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1438          .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1439          .id = "EMU1010",
1440          .emu10k2_chip = 1,
1441          .ca0108_chip = 1,
1442          .spk71 = 1,
1443          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1444         /* Tested by James@superbug.co.uk 8th July 2005. */
1445         /* This is MAEM8810, 0202 is MAEM8820 */
1446         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1447          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1448          .id = "EMU1010",
1449          .emu10k2_chip = 1,
1450          .ca0102_chip = 1,
1451          .spk71 = 1,
1452          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1453         /* EMU0404b */
1454         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1455          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1456          .id = "EMU0404",
1457          .emu10k2_chip = 1,
1458          .ca0108_chip = 1,
1459          .spk71 = 1,
1460          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1461         /* Tested by James@superbug.co.uk 20-3-2007. */
1462         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1463          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1464          .id = "EMU0404",
1465          .emu10k2_chip = 1,
1466          .ca0102_chip = 1,
1467          .spk71 = 1,
1468          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1469         /* EMU0404 PCIe */
1470         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1471          .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1472          .id = "EMU0404",
1473          .emu10k2_chip = 1,
1474          .ca0108_chip = 1,
1475          .spk71 = 1,
1476          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1477         /* Note that all E-mu cards require kernel 2.6 or newer. */
1478         {.vendor = 0x1102, .device = 0x0008,
1479          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1480          .id = "Audigy2",
1481          .emu10k2_chip = 1,
1482          .ca0108_chip = 1,
1483          .ac97_chip = 1} ,
1484         /* Tested by James@superbug.co.uk 3rd July 2005 */
1485         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1486          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1487          .id = "Audigy2",
1488          .emu10k2_chip = 1,
1489          .ca0102_chip = 1,
1490          .ca0151_chip = 1,
1491          .spk71 = 1,
1492          .spdif_bug = 1,
1493          .ac97_chip = 1} ,
1494         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1495         /* The 0x20061102 does have SB0350 written on it
1496          * Just like 0x20021102
1497          */
1498         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1499          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1500          .id = "Audigy2",
1501          .emu10k2_chip = 1,
1502          .ca0102_chip = 1,
1503          .ca0151_chip = 1,
1504          .spk71 = 1,
1505          .spdif_bug = 1,
1506          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1507          .ac97_chip = 1} ,
1508         /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1509            Creative's Windows driver */
1510         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1511          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1512          .id = "Audigy2",
1513          .emu10k2_chip = 1,
1514          .ca0102_chip = 1,
1515          .ca0151_chip = 1,
1516          .spk71 = 1,
1517          .spdif_bug = 1,
1518          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1519          .ac97_chip = 1} ,
1520         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1521          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1522          .id = "Audigy2",
1523          .emu10k2_chip = 1,
1524          .ca0102_chip = 1,
1525          .ca0151_chip = 1,
1526          .spk71 = 1,
1527          .spdif_bug = 1,
1528          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1529          .ac97_chip = 1} ,
1530         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1531          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1532          .id = "Audigy2",
1533          .emu10k2_chip = 1,
1534          .ca0102_chip = 1,
1535          .ca0151_chip = 1,
1536          .spk71 = 1,
1537          .spdif_bug = 1,
1538          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1539          .ac97_chip = 1} ,
1540         /* Audigy 2 */
1541         /* Tested by James@superbug.co.uk 3rd July 2005 */
1542         /* DSP: CA0102-IAT
1543          * DAC: CS4382-KQ
1544          * ADC: Philips 1361T
1545          * AC97: STAC9721
1546          * CA0151: Yes
1547          */
1548         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1549          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1550          .id = "Audigy2",
1551          .emu10k2_chip = 1,
1552          .ca0102_chip = 1,
1553          .ca0151_chip = 1,
1554          .spk71 = 1,
1555          .spdif_bug = 1,
1556          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1557          .ac97_chip = 1} ,
1558         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1559          .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1560          .id = "Audigy2",
1561          .emu10k2_chip = 1,
1562          .ca0102_chip = 1,
1563          .ca0151_chip = 1,
1564          .spk71 = 1,
1565          .spdif_bug = 1} ,
1566         /* Dell OEM/Creative Labs Audigy 2 ZS */
1567         /* See ALSA bug#1365 */
1568         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1569          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1570          .id = "Audigy2",
1571          .emu10k2_chip = 1,
1572          .ca0102_chip = 1,
1573          .ca0151_chip = 1,
1574          .spk71 = 1,
1575          .spdif_bug = 1,
1576          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1577          .ac97_chip = 1} ,
1578         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1579          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1580          .id = "Audigy2",
1581          .emu10k2_chip = 1,
1582          .ca0102_chip = 1,
1583          .ca0151_chip = 1,
1584          .spk71 = 1,
1585          .spdif_bug = 1,
1586          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1587          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1588          .ac97_chip = 1} ,
1589         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1590          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1591          .id = "Audigy2",
1592          .emu10k2_chip = 1,
1593          .ca0102_chip = 1,
1594          .ca0151_chip = 1,
1595          .spdif_bug = 1,
1596          .ac97_chip = 1} ,
1597         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1598          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1599          .id = "Audigy",
1600          .emu10k2_chip = 1,
1601          .ca0102_chip = 1,
1602          .ac97_chip = 1} ,
1603         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1604          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1605          .id = "Audigy",
1606          .emu10k2_chip = 1,
1607          .ca0102_chip = 1,
1608          .spdif_bug = 1,
1609          .ac97_chip = 1} ,
1610         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1611          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1612          .id = "Audigy",
1613          .emu10k2_chip = 1,
1614          .ca0102_chip = 1,
1615          .ac97_chip = 1} ,
1616         {.vendor = 0x1102, .device = 0x0004,
1617          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1618          .id = "Audigy",
1619          .emu10k2_chip = 1,
1620          .ca0102_chip = 1,
1621          .ac97_chip = 1} ,
1622         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1623          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1624          .id = "Live",
1625          .emu10k1_chip = 1,
1626          .ac97_chip = 1,
1627          .sblive51 = 1} ,
1628         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1629          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1630          .id = "Live",
1631          .emu10k1_chip = 1,
1632          .ac97_chip = 1,
1633          .sblive51 = 1} ,
1634         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1635          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1636          .id = "Live",
1637          .emu10k1_chip = 1,
1638          .ac97_chip = 1,
1639          .sblive51 = 1} ,
1640         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1641          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1642          .id = "Live",
1643          .emu10k1_chip = 1,
1644          .ac97_chip = 1,
1645          .sblive51 = 1} ,
1646         /* Tested by ALSA bug#1680 26th December 2005 */
1647         /* note: It really has SB0220 written on the card, */
1648         /* but it's SB0228 according to kx.inf */
1649         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1650          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1651          .id = "Live",
1652          .emu10k1_chip = 1,
1653          .ac97_chip = 1,
1654          .sblive51 = 1} ,
1655         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1656         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1657          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1658          .id = "Live",
1659          .emu10k1_chip = 1,
1660          .ac97_chip = 1,
1661          .sblive51 = 1} ,
1662         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1663          .driver = "EMU10K1", .name = "SB Live! 5.1",
1664          .id = "Live",
1665          .emu10k1_chip = 1,
1666          .ac97_chip = 1,
1667          .sblive51 = 1} ,
1668         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1669         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1670          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1671          .id = "Live",
1672          .emu10k1_chip = 1,
1673          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1674                           * share the same IDs!
1675                           */
1676          .sblive51 = 1} ,
1677         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1678          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1679          .id = "Live",
1680          .emu10k1_chip = 1,
1681          .ac97_chip = 1,
1682          .sblive51 = 1} ,
1683         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1684          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1685          .id = "Live",
1686          .emu10k1_chip = 1,
1687          .ac97_chip = 1} ,
1688         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1689          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1690          .id = "Live",
1691          .emu10k1_chip = 1,
1692          .ac97_chip = 1,
1693          .sblive51 = 1} ,
1694         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1695          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1696          .id = "Live",
1697          .emu10k1_chip = 1,
1698          .ac97_chip = 1,
1699          .sblive51 = 1} ,
1700         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1701          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1702          .id = "Live",
1703          .emu10k1_chip = 1,
1704          .ac97_chip = 1,
1705          .sblive51 = 1} ,
1706         /* Tested by James@superbug.co.uk 3rd July 2005 */
1707         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1708          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1709          .id = "Live",
1710          .emu10k1_chip = 1,
1711          .ac97_chip = 1,
1712          .sblive51 = 1} ,
1713         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1714          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1715          .id = "Live",
1716          .emu10k1_chip = 1,
1717          .ac97_chip = 1,
1718          .sblive51 = 1} ,
1719         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1720          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1721          .id = "Live",
1722          .emu10k1_chip = 1,
1723          .ac97_chip = 1,
1724          .sblive51 = 1} ,
1725         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1726          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1727          .id = "Live",
1728          .emu10k1_chip = 1,
1729          .ac97_chip = 1,
1730          .sblive51 = 1} ,
1731         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1732          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1733          .id = "APS",
1734          .emu10k1_chip = 1,
1735          .ecard = 1} ,
1736         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1737          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1738          .id = "Live",
1739          .emu10k1_chip = 1,
1740          .ac97_chip = 1,
1741          .sblive51 = 1} ,
1742         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1743          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1744          .id = "Live",
1745          .emu10k1_chip = 1,
1746          .ac97_chip = 1,
1747          .sblive51 = 1} ,
1748         {.vendor = 0x1102, .device = 0x0002,
1749          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1750          .id = "Live",
1751          .emu10k1_chip = 1,
1752          .ac97_chip = 1,
1753          .sblive51 = 1} ,
1754         { } /* terminator */
1755 };
1756
1757 /*
1758  * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1759  * has a problem that from time to time it likes to do few DMA reads a bit
1760  * beyond its normal allocation and gets very confused if these reads get
1761  * blocked by a IOMMU.
1762  *
1763  * This behaviour has been observed for the first (reserved) page
1764  * (for which it happens multiple times at every playback), often for various
1765  * synth pages and sometimes for PCM playback buffers and the page table
1766  * memory itself.
1767  *
1768  * As a workaround let's widen these DMA allocations by an extra page if we
1769  * detect that the device is behind a non-passthrough IOMMU.
1770  */
1771 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1772 {
1773         struct iommu_domain *domain;
1774
1775         emu->iommu_workaround = false;
1776
1777         if (!iommu_present(emu->card->dev->bus))
1778                 return;
1779
1780         domain = iommu_get_domain_for_dev(emu->card->dev);
1781         if (domain && domain->type == IOMMU_DOMAIN_IDENTITY)
1782                 return;
1783
1784         dev_notice(emu->card->dev,
1785                    "non-passthrough IOMMU detected, widening DMA allocations");
1786         emu->iommu_workaround = true;
1787 }
1788
1789 int snd_emu10k1_create(struct snd_card *card,
1790                        struct pci_dev *pci,
1791                        unsigned short extin_mask,
1792                        unsigned short extout_mask,
1793                        long max_cache_bytes,
1794                        int enable_ir,
1795                        uint subsystem,
1796                        struct snd_emu10k1 **remu)
1797 {
1798         struct snd_emu10k1 *emu;
1799         int idx, err;
1800         int is_audigy;
1801         size_t page_table_size;
1802         unsigned int silent_page;
1803         const struct snd_emu_chip_details *c;
1804         static struct snd_device_ops ops = {
1805                 .dev_free =     snd_emu10k1_dev_free,
1806         };
1807
1808         *remu = NULL;
1809
1810         /* enable PCI device */
1811         err = pci_enable_device(pci);
1812         if (err < 0)
1813                 return err;
1814
1815         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1816         if (emu == NULL) {
1817                 pci_disable_device(pci);
1818                 return -ENOMEM;
1819         }
1820         emu->card = card;
1821         spin_lock_init(&emu->reg_lock);
1822         spin_lock_init(&emu->emu_lock);
1823         spin_lock_init(&emu->spi_lock);
1824         spin_lock_init(&emu->i2c_lock);
1825         spin_lock_init(&emu->voice_lock);
1826         spin_lock_init(&emu->synth_lock);
1827         spin_lock_init(&emu->memblk_lock);
1828         mutex_init(&emu->fx8010.lock);
1829         INIT_LIST_HEAD(&emu->mapped_link_head);
1830         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1831         emu->pci = pci;
1832         emu->irq = -1;
1833         emu->synth = NULL;
1834         emu->get_synth_voice = NULL;
1835         INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1836         /* read revision & serial */
1837         emu->revision = pci->revision;
1838         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1839         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1840         dev_dbg(card->dev,
1841                 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1842                 pci->vendor, pci->device, emu->serial, emu->model);
1843
1844         for (c = emu_chip_details; c->vendor; c++) {
1845                 if (c->vendor == pci->vendor && c->device == pci->device) {
1846                         if (subsystem) {
1847                                 if (c->subsystem && (c->subsystem == subsystem))
1848                                         break;
1849                                 else
1850                                         continue;
1851                         } else {
1852                                 if (c->subsystem && (c->subsystem != emu->serial))
1853                                         continue;
1854                                 if (c->revision && c->revision != emu->revision)
1855                                         continue;
1856                         }
1857                         break;
1858                 }
1859         }
1860         if (c->vendor == 0) {
1861                 dev_err(card->dev, "emu10k1: Card not recognised\n");
1862                 kfree(emu);
1863                 pci_disable_device(pci);
1864                 return -ENOENT;
1865         }
1866         emu->card_capabilities = c;
1867         if (c->subsystem && !subsystem)
1868                 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1869         else if (subsystem)
1870                 dev_dbg(card->dev, "Sound card name = %s, "
1871                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1872                         "Forced to subsystem = 0x%x\n", c->name,
1873                         pci->vendor, pci->device, emu->serial, c->subsystem);
1874         else
1875                 dev_dbg(card->dev, "Sound card name = %s, "
1876                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1877                         c->name, pci->vendor, pci->device,
1878                         emu->serial);
1879
1880         if (!*card->id && c->id) {
1881                 int i, n = 0;
1882                 strlcpy(card->id, c->id, sizeof(card->id));
1883                 for (;;) {
1884                         for (i = 0; i < snd_ecards_limit; i++) {
1885                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1886                                         break;
1887                         }
1888                         if (i >= snd_ecards_limit)
1889                                 break;
1890                         n++;
1891                         if (n >= SNDRV_CARDS)
1892                                 break;
1893                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1894                 }
1895         }
1896
1897         is_audigy = emu->audigy = c->emu10k2_chip;
1898
1899         snd_emu10k1_detect_iommu(emu);
1900
1901         /* set addressing mode */
1902         emu->address_mode = is_audigy ? 0 : 1;
1903         /* set the DMA transfer mask */
1904         emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1905         if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1906                 dev_err(card->dev,
1907                         "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1908                         emu->dma_mask);
1909                 kfree(emu);
1910                 pci_disable_device(pci);
1911                 return -ENXIO;
1912         }
1913         if (is_audigy)
1914                 emu->gpr_base = A_FXGPREGBASE;
1915         else
1916                 emu->gpr_base = FXGPREGBASE;
1917
1918         err = pci_request_regions(pci, "EMU10K1");
1919         if (err < 0) {
1920                 kfree(emu);
1921                 pci_disable_device(pci);
1922                 return err;
1923         }
1924         emu->port = pci_resource_start(pci, 0);
1925
1926         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1927
1928         page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1929                                          MAXPAGES0);
1930         if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1931                                                 &emu->ptb_pages) < 0) {
1932                 err = -ENOMEM;
1933                 goto error;
1934         }
1935         dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1936                 (unsigned long)emu->ptb_pages.addr,
1937                 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1938
1939         emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1940                                                  emu->max_cache_pages));
1941         emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1942                                                   emu->max_cache_pages));
1943         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1944                 err = -ENOMEM;
1945                 goto error;
1946         }
1947
1948         if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1949                                                 &emu->silent_page) < 0) {
1950                 err = -ENOMEM;
1951                 goto error;
1952         }
1953         dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1954                 (unsigned long)emu->silent_page.addr,
1955                 (unsigned long)(emu->silent_page.addr +
1956                                 emu->silent_page.bytes));
1957
1958         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1959         if (emu->memhdr == NULL) {
1960                 err = -ENOMEM;
1961                 goto error;
1962         }
1963         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1964                 sizeof(struct snd_util_memblk);
1965
1966         pci_set_master(pci);
1967
1968         emu->fx8010.fxbus_mask = 0x303f;
1969         if (extin_mask == 0)
1970                 extin_mask = 0x3fcf;
1971         if (extout_mask == 0)
1972                 extout_mask = 0x7fff;
1973         emu->fx8010.extin_mask = extin_mask;
1974         emu->fx8010.extout_mask = extout_mask;
1975         emu->enable_ir = enable_ir;
1976
1977         if (emu->card_capabilities->ca_cardbus_chip) {
1978                 err = snd_emu10k1_cardbus_init(emu);
1979                 if (err < 0)
1980                         goto error;
1981         }
1982         if (emu->card_capabilities->ecard) {
1983                 err = snd_emu10k1_ecard_init(emu);
1984                 if (err < 0)
1985                         goto error;
1986         } else if (emu->card_capabilities->emu_model) {
1987                 err = snd_emu10k1_emu1010_init(emu);
1988                 if (err < 0) {
1989                         snd_emu10k1_free(emu);
1990                         return err;
1991                 }
1992         } else {
1993                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1994                         does not support this, it shouldn't do any harm */
1995                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1996                                         AC97SLOT_CNTR|AC97SLOT_LFE);
1997         }
1998
1999         /* initialize TRAM setup */
2000         emu->fx8010.itram_size = (16 * 1024)/2;
2001         emu->fx8010.etram_pages.area = NULL;
2002         emu->fx8010.etram_pages.bytes = 0;
2003
2004         /* irq handler must be registered after I/O ports are activated */
2005         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
2006                         KBUILD_MODNAME, emu)) {
2007                 err = -EBUSY;
2008                 goto error;
2009         }
2010         emu->irq = pci->irq;
2011
2012         /*
2013          *  Init to 0x02109204 :
2014          *  Clock accuracy    = 0     (1000ppm)
2015          *  Sample Rate       = 2     (48kHz)
2016          *  Audio Channel     = 1     (Left of 2)
2017          *  Source Number     = 0     (Unspecified)
2018          *  Generation Status = 1     (Original for Cat Code 12)
2019          *  Cat Code          = 12    (Digital Signal Mixer)
2020          *  Mode              = 0     (Mode 0)
2021          *  Emphasis          = 0     (None)
2022          *  CP                = 1     (Copyright unasserted)
2023          *  AN                = 0     (Audio data)
2024          *  P                 = 0     (Consumer)
2025          */
2026         emu->spdif_bits[0] = emu->spdif_bits[1] =
2027                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2028                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2029                 SPCS_GENERATIONSTATUS | 0x00001200 |
2030                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2031
2032         /* Clear silent pages and set up pointers */
2033         memset(emu->silent_page.area, 0, emu->silent_page.bytes);
2034         silent_page = emu->silent_page.addr << emu->address_mode;
2035         for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
2036                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2037
2038         /* set up voice indices */
2039         for (idx = 0; idx < NUM_G; idx++) {
2040                 emu->voices[idx].emu = emu;
2041                 emu->voices[idx].number = idx;
2042         }
2043
2044         err = snd_emu10k1_init(emu, enable_ir, 0);
2045         if (err < 0)
2046                 goto error;
2047 #ifdef CONFIG_PM_SLEEP
2048         err = alloc_pm_buffer(emu);
2049         if (err < 0)
2050                 goto error;
2051 #endif
2052
2053         /*  Initialize the effect engine */
2054         err = snd_emu10k1_init_efx(emu);
2055         if (err < 0)
2056                 goto error;
2057         snd_emu10k1_audio_enable(emu);
2058
2059         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2060         if (err < 0)
2061                 goto error;
2062
2063 #ifdef CONFIG_SND_PROC_FS
2064         snd_emu10k1_proc_init(emu);
2065 #endif
2066
2067         *remu = emu;
2068         return 0;
2069
2070  error:
2071         snd_emu10k1_free(emu);
2072         return err;
2073 }
2074
2075 #ifdef CONFIG_PM_SLEEP
2076 static unsigned char saved_regs[] = {
2077         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2078         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2079         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2080         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2081         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2082         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2083         0xff /* end */
2084 };
2085 static unsigned char saved_regs_audigy[] = {
2086         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2087         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2088         0xff /* end */
2089 };
2090
2091 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2092 {
2093         int size;
2094
2095         size = ARRAY_SIZE(saved_regs);
2096         if (emu->audigy)
2097                 size += ARRAY_SIZE(saved_regs_audigy);
2098         emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
2099         if (!emu->saved_ptr)
2100                 return -ENOMEM;
2101         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2102                 return -ENOMEM;
2103         if (emu->card_capabilities->ca0151_chip &&
2104             snd_p16v_alloc_pm_buffer(emu) < 0)
2105                 return -ENOMEM;
2106         return 0;
2107 }
2108
2109 static void free_pm_buffer(struct snd_emu10k1 *emu)
2110 {
2111         vfree(emu->saved_ptr);
2112         snd_emu10k1_efx_free_pm_buffer(emu);
2113         if (emu->card_capabilities->ca0151_chip)
2114                 snd_p16v_free_pm_buffer(emu);
2115 }
2116
2117 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2118 {
2119         int i;
2120         unsigned char *reg;
2121         unsigned int *val;
2122
2123         val = emu->saved_ptr;
2124         for (reg = saved_regs; *reg != 0xff; reg++)
2125                 for (i = 0; i < NUM_G; i++, val++)
2126                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2127         if (emu->audigy) {
2128                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2129                         for (i = 0; i < NUM_G; i++, val++)
2130                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2131         }
2132         if (emu->audigy)
2133                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2134         emu->saved_hcfg = inl(emu->port + HCFG);
2135 }
2136
2137 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2138 {
2139         if (emu->card_capabilities->ca_cardbus_chip)
2140                 snd_emu10k1_cardbus_init(emu);
2141         if (emu->card_capabilities->ecard)
2142                 snd_emu10k1_ecard_init(emu);
2143         else if (emu->card_capabilities->emu_model)
2144                 snd_emu10k1_emu1010_init(emu);
2145         else
2146                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2147         snd_emu10k1_init(emu, emu->enable_ir, 1);
2148 }
2149
2150 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2151 {
2152         int i;
2153         unsigned char *reg;
2154         unsigned int *val;
2155
2156         snd_emu10k1_audio_enable(emu);
2157
2158         /* resore for spdif */
2159         if (emu->audigy)
2160                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2161         outl(emu->saved_hcfg, emu->port + HCFG);
2162
2163         val = emu->saved_ptr;
2164         for (reg = saved_regs; *reg != 0xff; reg++)
2165                 for (i = 0; i < NUM_G; i++, val++)
2166                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2167         if (emu->audigy) {
2168                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2169                         for (i = 0; i < NUM_G; i++, val++)
2170                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2171         }
2172 }
2173 #endif