1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * This file contains the routines for initializing the MMU
4 * on the 8xx series of chips.
7 * Derived from arch/powerpc/mm/40x_mmu.c:
10 #include <linux/memblock.h>
11 #include <linux/hugetlb.h>
13 #include <asm/fixmap.h>
15 #include <mm/mmu_decl.h>
17 #define IMMR_SIZE (FIX_IMMR_SIZE << PAGE_SHIFT)
19 static unsigned long block_mapped_ram;
22 * Return PA for this VA if it is in an area mapped with LTLBs or fixmap.
23 * Otherwise, returns 0
25 phys_addr_t v_block_mapped(unsigned long va)
27 unsigned long p = PHYS_IMMR_BASE;
29 if (va >= VIRT_IMMR_BASE && va < VIRT_IMMR_BASE + IMMR_SIZE)
30 return p + va - VIRT_IMMR_BASE;
31 if (va >= PAGE_OFFSET && va < PAGE_OFFSET + block_mapped_ram)
37 * Return VA for a given PA mapped with LTLBs or fixmap
38 * Return 0 if not mapped
40 unsigned long p_block_mapped(phys_addr_t pa)
42 unsigned long p = PHYS_IMMR_BASE;
44 if (pa >= p && pa < p + IMMR_SIZE)
45 return VIRT_IMMR_BASE + pa - p;
46 if (pa < block_mapped_ram)
47 return (unsigned long)__va(pa);
51 static pte_t __init *early_hugepd_alloc_kernel(hugepd_t *pmdp, unsigned long va)
53 if (hpd_val(*pmdp) == 0) {
54 pte_t *ptep = memblock_alloc(sizeof(pte_basic_t), SZ_4K);
59 hugepd_populate_kernel((hugepd_t *)pmdp, ptep, PAGE_SHIFT_8M);
60 hugepd_populate_kernel((hugepd_t *)pmdp + 1, ptep, PAGE_SHIFT_8M);
62 return hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT);
65 static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
66 pgprot_t prot, int psize, bool new)
68 pmd_t *pmdp = pmd_off_k(va);
71 if (WARN_ON(psize != MMU_PAGE_512K && psize != MMU_PAGE_8M))
75 if (WARN_ON(slab_is_available()))
78 if (psize == MMU_PAGE_512K)
79 ptep = early_pte_alloc_kernel(pmdp, va);
81 ptep = early_hugepd_alloc_kernel((hugepd_t *)pmdp, va);
83 if (psize == MMU_PAGE_512K)
84 ptep = pte_offset_kernel(pmdp, va);
86 ptep = hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT);
92 /* The PTE should never be already present */
93 if (new && WARN_ON(pte_present(*ptep) && pgprot_val(prot)))
96 set_huge_pte_at(&init_mm, va, ptep,
97 pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize);
103 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
105 void __init MMU_init_hw(void)
109 static bool immr_is_mapped __initdata;
111 void __init mmu_mapin_immr(void)
116 immr_is_mapped = true;
118 __early_map_kernel_hugepage(VIRT_IMMR_BASE, PHYS_IMMR_BASE,
119 PAGE_KERNEL_NCG, MMU_PAGE_512K, true);
122 static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top,
123 pgprot_t prot, bool new)
125 unsigned long v = PAGE_OFFSET + offset;
126 unsigned long p = offset;
128 WARN_ON(!IS_ALIGNED(offset, SZ_512K) || !IS_ALIGNED(top, SZ_512K));
130 for (; p < ALIGN(p, SZ_8M) && p < top; p += SZ_512K, v += SZ_512K)
131 __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
132 for (; p < ALIGN_DOWN(top, SZ_8M) && p < top; p += SZ_8M, v += SZ_8M)
133 __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new);
134 for (; p < ALIGN_DOWN(top, SZ_512K) && p < top; p += SZ_512K, v += SZ_512K)
135 __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
138 flush_tlb_kernel_range(PAGE_OFFSET + v, PAGE_OFFSET + top);
141 unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
143 unsigned long etext8 = ALIGN(__pa(_etext), SZ_8M);
144 unsigned long sinittext = __pa(_sinittext);
145 bool strict_boundary = strict_kernel_rwx_enabled() || debug_pagealloc_enabled_or_kfence();
146 unsigned long boundary = strict_boundary ? sinittext : etext8;
147 unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M);
149 WARN_ON(top < einittext8);
153 mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, true);
154 if (debug_pagealloc_enabled_or_kfence()) {
157 mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL_TEXT, true);
158 mmu_mapin_ram_chunk(einittext8, top, PAGE_KERNEL, true);
162 memblock_set_current_limit(top);
164 block_mapped_ram = top;
169 void mmu_mark_initmem_nx(void)
171 unsigned long etext8 = ALIGN(__pa(_etext), SZ_8M);
172 unsigned long sinittext = __pa(_sinittext);
173 unsigned long boundary = strict_kernel_rwx_enabled() ? sinittext : etext8;
174 unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M);
176 if (!debug_pagealloc_enabled_or_kfence())
177 mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL, false);
179 mmu_pin_tlb(block_mapped_ram, false);
182 #ifdef CONFIG_STRICT_KERNEL_RWX
183 void mmu_mark_rodata_ro(void)
185 unsigned long sinittext = __pa(_sinittext);
187 mmu_mapin_ram_chunk(0, sinittext, PAGE_KERNEL_ROX, false);
188 if (IS_ENABLED(CONFIG_PIN_TLB_DATA))
189 mmu_pin_tlb(block_mapped_ram, true);
193 void __init setup_initial_memory_limit(phys_addr_t first_memblock_base,
194 phys_addr_t first_memblock_size)
196 /* We don't currently support the first MEMBLOCK not mapping 0
197 * physical on those processors
199 BUG_ON(first_memblock_base != 0);
201 /* 8xx can only access 32MB at the moment */
202 memblock_set_current_limit(min_t(u64, first_memblock_size, SZ_32M));
205 int pud_clear_huge(pud_t *pud)
210 int pmd_clear_huge(pmd_t *pmd)