4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
21 * IMPORTANT INFORMATION
23 * There are currently three types of spinlocks:
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
29 * These must NEVER be grabbed in reverse order.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/skbuff.h>
38 #include <linux/atmdev.h>
39 #include <linux/atm.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/types.h>
43 #include <linux/string.h>
44 #include <linux/delay.h>
45 #include <linux/init.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/interrupt.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <linux/idr.h>
53 #include <linux/uaccess.h>
54 #include <linux/atomic.h>
55 #include <linux/etherdevice.h>
57 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
59 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
60 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
62 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
66 #include "nicstarmac.c"
68 /* Configurable parameters */
76 /* Do not touch these */
79 #define TXPRINTK(args...) printk(args)
81 #define TXPRINTK(args...)
85 #define RXPRINTK(args...) printk(args)
87 #define RXPRINTK(args...)
91 #define PRINTK(args...) printk(args)
93 #define PRINTK(args...)
94 #endif /* GENERAL_DEBUG */
97 #define XPRINTK(args...) printk(args)
99 #define XPRINTK(args...)
100 #endif /* EXTRA_DEBUG */
104 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
106 #define NS_DELAY mdelay(1)
108 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
111 #define ATM_SKB(s) (&(s)->atm)
114 #define scq_virt_to_bus(scq, p) \
115 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
117 /* Function declarations */
119 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
120 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
122 static int ns_init_card(int i, struct pci_dev *pcidev);
123 static void ns_init_card_error(ns_dev * card, int error);
124 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
125 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
126 static void push_rxbufs(ns_dev *, struct sk_buff *);
127 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
128 static int ns_open(struct atm_vcc *vcc);
129 static void ns_close(struct atm_vcc *vcc);
130 static void fill_tst(ns_dev * card, int n, vc_map * vc);
131 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
132 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
133 struct sk_buff *skb);
134 static void process_tsq(ns_dev * card);
135 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
136 static void process_rsq(ns_dev * card);
137 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
138 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
139 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
140 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
141 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
142 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
143 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
144 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
146 static void which_list(ns_dev * card, struct sk_buff *skb);
148 static void ns_poll(unsigned long arg);
149 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
151 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
153 /* Global variables */
155 static struct ns_dev *cards[NS_MAX_CARDS];
156 static unsigned num_cards;
157 static const struct atmdev_ops atm_ops = {
162 .phy_put = ns_phy_put,
163 .phy_get = ns_phy_get,
164 .proc_read = ns_proc_read,
165 .owner = THIS_MODULE,
168 static struct timer_list ns_timer;
169 static char *mac[NS_MAX_CARDS];
170 module_param_array(mac, charp, NULL, 0);
171 MODULE_LICENSE("GPL");
175 static int nicstar_init_one(struct pci_dev *pcidev,
176 const struct pci_device_id *ent)
178 static int index = -1;
184 error = ns_init_card(index, pcidev);
186 cards[index--] = NULL; /* don't increment index */
195 static void nicstar_remove_one(struct pci_dev *pcidev)
198 ns_dev *card = pci_get_drvdata(pcidev);
200 struct sk_buff *iovb;
206 if (cards[i] == NULL)
209 if (card->atmdev->phy && card->atmdev->phy->stop)
210 card->atmdev->phy->stop(card->atmdev);
212 /* Stop everything */
213 writel(0x00000000, card->membase + CFG);
215 /* De-register device */
216 atm_dev_deregister(card->atmdev);
218 /* Disable PCI device */
219 pci_disable_device(pcidev);
221 /* Free up resources */
223 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
224 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
225 dev_kfree_skb_any(hb);
228 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
230 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
231 card->iovpool.count);
232 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
233 dev_kfree_skb_any(iovb);
236 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
237 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
238 dev_kfree_skb_any(lb);
239 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
240 dev_kfree_skb_any(sb);
241 free_scq(card, card->scq0, NULL);
242 for (j = 0; j < NS_FRSCD_NUM; j++) {
243 if (card->scd2vc[j] != NULL)
244 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
246 idr_destroy(&card->idr);
247 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
248 card->rsq.org, card->rsq.dma);
249 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
250 card->tsq.org, card->tsq.dma);
251 free_irq(card->pcidev->irq, card);
252 iounmap(card->membase);
256 static const struct pci_device_id nicstar_pci_tbl[] = {
257 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
258 {0,} /* terminate list */
261 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
263 static struct pci_driver nicstar_driver = {
265 .id_table = nicstar_pci_tbl,
266 .probe = nicstar_init_one,
267 .remove = nicstar_remove_one,
270 static int __init nicstar_init(void)
272 unsigned error = 0; /* Initialized to remove compile warning */
274 XPRINTK("nicstar: nicstar_init() called.\n");
276 error = pci_register_driver(&nicstar_driver);
278 TXPRINTK("nicstar: TX debug enabled.\n");
279 RXPRINTK("nicstar: RX debug enabled.\n");
280 PRINTK("nicstar: General debug enabled.\n");
282 printk("nicstar: using PHY loopback.\n");
283 #endif /* PHY_LOOPBACK */
284 XPRINTK("nicstar: nicstar_init() returned.\n");
287 init_timer(&ns_timer);
288 ns_timer.expires = jiffies + NS_POLL_PERIOD;
290 ns_timer.function = ns_poll;
291 add_timer(&ns_timer);
297 static void __exit nicstar_cleanup(void)
299 XPRINTK("nicstar: nicstar_cleanup() called.\n");
301 del_timer_sync(&ns_timer);
303 pci_unregister_driver(&nicstar_driver);
305 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
308 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
313 sram_address &= 0x0007FFFC; /* address must be dword aligned */
314 sram_address |= 0x50000000; /* SRAM read command */
315 spin_lock_irqsave(&card->res_lock, flags);
316 while (CMD_BUSY(card)) ;
317 writel(sram_address, card->membase + CMD);
318 while (CMD_BUSY(card)) ;
319 data = readl(card->membase + DR0);
320 spin_unlock_irqrestore(&card->res_lock, flags);
324 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
329 count--; /* count range now is 0..3 instead of 1..4 */
331 c <<= 2; /* to use increments of 4 */
332 spin_lock_irqsave(&card->res_lock, flags);
333 while (CMD_BUSY(card)) ;
334 for (i = 0; i <= c; i += 4)
335 writel(*(value++), card->membase + i);
336 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
337 so card->membase + DR0 == card->membase */
339 sram_address &= 0x0007FFFC;
340 sram_address |= (0x40000000 | count);
341 writel(sram_address, card->membase + CMD);
342 spin_unlock_irqrestore(&card->res_lock, flags);
345 static int ns_init_card(int i, struct pci_dev *pcidev)
348 struct ns_dev *card = NULL;
349 unsigned char pci_latency;
355 unsigned long membase;
359 if (pci_enable_device(pcidev)) {
360 printk("nicstar%d: can't enable PCI device\n", i);
362 ns_init_card_error(card, error);
365 if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
367 "nicstar%d: No suitable DMA available.\n", i);
369 ns_init_card_error(card, error);
373 card = kmalloc(sizeof(*card), GFP_KERNEL);
376 ("nicstar%d: can't allocate memory for device structure.\n",
379 ns_init_card_error(card, error);
383 spin_lock_init(&card->int_lock);
384 spin_lock_init(&card->res_lock);
386 pci_set_drvdata(pcidev, card);
390 card->pcidev = pcidev;
391 membase = pci_resource_start(pcidev, 1);
392 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
393 if (!card->membase) {
394 printk("nicstar%d: can't ioremap() membase.\n", i);
396 ns_init_card_error(card, error);
399 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
401 pci_set_master(pcidev);
403 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
404 printk("nicstar%d: can't read PCI latency timer.\n", i);
406 ns_init_card_error(card, error);
409 #ifdef NS_PCI_LATENCY
410 if (pci_latency < NS_PCI_LATENCY) {
411 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
413 for (j = 1; j < 4; j++) {
414 if (pci_write_config_byte
415 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
420 ("nicstar%d: can't set PCI latency timer to %d.\n",
423 ns_init_card_error(card, error);
427 #endif /* NS_PCI_LATENCY */
429 /* Clear timer overflow */
430 data = readl(card->membase + STAT);
431 if (data & NS_STAT_TMROF)
432 writel(NS_STAT_TMROF, card->membase + STAT);
435 writel(NS_CFG_SWRST, card->membase + CFG);
437 writel(0x00000000, card->membase + CFG);
440 writel(0x00000008, card->membase + GP);
442 writel(0x00000001, card->membase + GP);
444 while (CMD_BUSY(card)) ;
445 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
448 /* Detect PHY type */
449 while (CMD_BUSY(card)) ;
450 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
451 while (CMD_BUSY(card)) ;
452 data = readl(card->membase + DR0);
455 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
456 card->max_pcr = ATM_25_PCR;
457 while (CMD_BUSY(card)) ;
458 writel(0x00000008, card->membase + DR0);
459 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
460 /* Clear an eventual pending interrupt */
461 writel(NS_STAT_SFBQF, card->membase + STAT);
463 while (CMD_BUSY(card)) ;
464 writel(0x00000022, card->membase + DR0);
465 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
466 #endif /* PHY_LOOPBACK */
470 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
471 card->max_pcr = ATM_OC3_PCR;
473 while (CMD_BUSY(card)) ;
474 writel(0x00000002, card->membase + DR0);
475 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
476 #endif /* PHY_LOOPBACK */
479 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
481 ns_init_card_error(card, error);
484 writel(0x00000000, card->membase + GP);
486 /* Determine SRAM size */
488 ns_write_sram(card, 0x1C003, &data, 1);
490 ns_write_sram(card, 0x14003, &data, 1);
491 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
492 ns_read_sram(card, 0x1C003) == 0x76543210)
493 card->sram_size = 128;
495 card->sram_size = 32;
496 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
498 card->rct_size = NS_MAX_RCTSIZE;
500 #if (NS_MAX_RCTSIZE == 4096)
501 if (card->sram_size == 128)
503 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
505 #elif (NS_MAX_RCTSIZE == 16384)
506 if (card->sram_size == 32) {
508 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
510 card->rct_size = 4096;
513 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
516 card->vpibits = NS_VPIBITS;
517 if (card->rct_size == 4096)
518 card->vcibits = 12 - NS_VPIBITS;
519 else /* card->rct_size == 16384 */
520 card->vcibits = 14 - NS_VPIBITS;
522 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
524 nicstar_init_eprom(card->membase);
526 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
527 writel(0x00000000, card->membase + VPM);
531 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
532 pr_err("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
534 ns_init_card_error(card, error);
539 card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
540 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
541 &card->tsq.dma, GFP_KERNEL);
542 if (card->tsq.org == NULL) {
543 printk("nicstar%d: can't allocate TSQ.\n", i);
545 ns_init_card_error(card, error);
548 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
549 card->tsq.next = card->tsq.base;
550 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
551 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
552 ns_tsi_init(card->tsq.base + j);
553 writel(0x00000000, card->membase + TSQH);
554 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
555 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
558 card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
559 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
560 &card->rsq.dma, GFP_KERNEL);
561 if (card->rsq.org == NULL) {
562 printk("nicstar%d: can't allocate RSQ.\n", i);
564 ns_init_card_error(card, error);
567 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
568 card->rsq.next = card->rsq.base;
569 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
570 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
571 ns_rsqe_init(card->rsq.base + j);
572 writel(0x00000000, card->membase + RSQH);
573 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
574 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
576 /* Initialize SCQ0, the only VBR SCQ used */
579 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
580 if (card->scq0 == NULL) {
581 printk("nicstar%d: can't get SCQ0.\n", i);
583 ns_init_card_error(card, error);
586 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
587 u32d[1] = (u32) 0x00000000;
588 u32d[2] = (u32) 0xffffffff;
589 u32d[3] = (u32) 0x00000000;
590 ns_write_sram(card, NS_VRSCD0, u32d, 4);
591 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
592 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
593 card->scq0->scd = NS_VRSCD0;
594 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
596 /* Initialize TSTs */
597 card->tst_addr = NS_TST0;
598 card->tst_free_entries = NS_TST_NUM_ENTRIES;
599 data = NS_TST_OPCODE_VARIABLE;
600 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
601 ns_write_sram(card, NS_TST0 + j, &data, 1);
602 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
603 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
604 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
605 ns_write_sram(card, NS_TST1 + j, &data, 1);
606 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
607 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
608 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
609 card->tste2vc[j] = NULL;
610 writel(NS_TST0 << 2, card->membase + TSTB);
612 /* Initialize RCT. AAL type is set on opening the VC. */
614 u32d[0] = NS_RCTE_RAWCELLINTEN;
616 u32d[0] = 0x00000000;
617 #endif /* RCQ_SUPPORT */
618 u32d[1] = 0x00000000;
619 u32d[2] = 0x00000000;
620 u32d[3] = 0xFFFFFFFF;
621 for (j = 0; j < card->rct_size; j++)
622 ns_write_sram(card, j * 4, u32d, 4);
624 memset(card->vcmap, 0, sizeof(card->vcmap));
626 for (j = 0; j < NS_FRSCD_NUM; j++)
627 card->scd2vc[j] = NULL;
629 /* Initialize buffer levels */
630 card->sbnr.min = MIN_SB;
631 card->sbnr.init = NUM_SB;
632 card->sbnr.max = MAX_SB;
633 card->lbnr.min = MIN_LB;
634 card->lbnr.init = NUM_LB;
635 card->lbnr.max = MAX_LB;
636 card->iovnr.min = MIN_IOVB;
637 card->iovnr.init = NUM_IOVB;
638 card->iovnr.max = MAX_IOVB;
639 card->hbnr.min = MIN_HB;
640 card->hbnr.init = NUM_HB;
641 card->hbnr.max = MAX_HB;
643 card->sm_handle = NULL;
644 card->sm_addr = 0x00000000;
645 card->lg_handle = NULL;
646 card->lg_addr = 0x00000000;
648 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
650 idr_init(&card->idr);
652 /* Pre-allocate some huge buffers */
653 skb_queue_head_init(&card->hbpool.queue);
654 card->hbpool.count = 0;
655 for (j = 0; j < NUM_HB; j++) {
657 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
660 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
663 ns_init_card_error(card, error);
666 NS_PRV_BUFTYPE(hb) = BUF_NONE;
667 skb_queue_tail(&card->hbpool.queue, hb);
668 card->hbpool.count++;
671 /* Allocate large buffers */
672 skb_queue_head_init(&card->lbpool.queue);
673 card->lbpool.count = 0; /* Not used */
674 for (j = 0; j < NUM_LB; j++) {
676 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
679 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
682 ns_init_card_error(card, error);
685 NS_PRV_BUFTYPE(lb) = BUF_LG;
686 skb_queue_tail(&card->lbpool.queue, lb);
687 skb_reserve(lb, NS_SMBUFSIZE);
688 push_rxbufs(card, lb);
689 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
692 card->rawcell = (struct ns_rcqe *) lb->data;
693 card->rawch = NS_PRV_DMA(lb);
696 /* Test for strange behaviour which leads to crashes */
698 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
700 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
703 ns_init_card_error(card, error);
707 /* Allocate small buffers */
708 skb_queue_head_init(&card->sbpool.queue);
709 card->sbpool.count = 0; /* Not used */
710 for (j = 0; j < NUM_SB; j++) {
712 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
715 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
718 ns_init_card_error(card, error);
721 NS_PRV_BUFTYPE(sb) = BUF_SM;
722 skb_queue_tail(&card->sbpool.queue, sb);
723 skb_reserve(sb, NS_AAL0_HEADER);
724 push_rxbufs(card, sb);
726 /* Test for strange behaviour which leads to crashes */
728 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
730 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
733 ns_init_card_error(card, error);
737 /* Allocate iovec buffers */
738 skb_queue_head_init(&card->iovpool.queue);
739 card->iovpool.count = 0;
740 for (j = 0; j < NUM_IOVB; j++) {
741 struct sk_buff *iovb;
742 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
745 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
748 ns_init_card_error(card, error);
751 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
752 skb_queue_tail(&card->iovpool.queue, iovb);
753 card->iovpool.count++;
756 /* Configure NICStAR */
757 if (card->rct_size == 4096)
758 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
759 else /* (card->rct_size == 16384) */
760 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
764 /* Register device */
765 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
767 if (card->atmdev == NULL) {
768 printk("nicstar%d: can't register device.\n", i);
770 ns_init_card_error(card, error);
774 if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
775 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
776 card->atmdev->esi, 6);
777 if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
778 nicstar_read_eprom(card->membase,
779 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
780 card->atmdev->esi, 6);
784 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
786 card->atmdev->dev_data = card;
787 card->atmdev->ci_range.vpi_bits = card->vpibits;
788 card->atmdev->ci_range.vci_bits = card->vcibits;
789 card->atmdev->link_rate = card->max_pcr;
790 card->atmdev->phy = NULL;
792 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
793 if (card->max_pcr == ATM_OC3_PCR)
794 suni_init(card->atmdev);
795 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
797 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
798 if (card->max_pcr == ATM_25_PCR)
799 idt77105_init(card->atmdev);
800 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
802 if (card->atmdev->phy && card->atmdev->phy->start)
803 card->atmdev->phy->start(card->atmdev);
805 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
806 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
807 NS_CFG_PHYIE, card->membase + CFG);
814 static void ns_init_card_error(ns_dev *card, int error)
817 writel(0x00000000, card->membase + CFG);
820 struct sk_buff *iovb;
821 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
822 dev_kfree_skb_any(iovb);
826 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
827 dev_kfree_skb_any(sb);
828 free_scq(card, card->scq0, NULL);
832 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
833 dev_kfree_skb_any(lb);
837 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
838 dev_kfree_skb_any(hb);
841 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
842 card->rsq.org, card->rsq.dma);
845 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
846 card->tsq.org, card->tsq.dma);
849 free_irq(card->pcidev->irq, card);
852 iounmap(card->membase);
855 pci_disable_device(card->pcidev);
860 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
865 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
868 scq = kmalloc(sizeof(*scq), GFP_KERNEL);
871 scq->org = dma_alloc_coherent(&card->pcidev->dev,
872 2 * size, &scq->dma, GFP_KERNEL);
877 scq->skb = kmalloc_array(size / NS_SCQE_SIZE,
881 dma_free_coherent(&card->pcidev->dev,
882 2 * size, scq->org, scq->dma);
886 scq->num_entries = size / NS_SCQE_SIZE;
887 scq->base = PTR_ALIGN(scq->org, size);
888 scq->next = scq->base;
889 scq->last = scq->base + (scq->num_entries - 1);
890 scq->tail = scq->last;
892 scq->num_entries = size / NS_SCQE_SIZE;
894 init_waitqueue_head(&scq->scqfull_waitq);
896 spin_lock_init(&scq->lock);
898 for (i = 0; i < scq->num_entries; i++)
904 /* For variable rate SCQ vcc must be NULL */
905 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
909 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
910 for (i = 0; i < scq->num_entries; i++) {
911 if (scq->skb[i] != NULL) {
912 vcc = ATM_SKB(scq->skb[i])->vcc;
913 if (vcc->pop != NULL)
914 vcc->pop(vcc, scq->skb[i]);
916 dev_kfree_skb_any(scq->skb[i]);
918 } else { /* vcc must be != NULL */
922 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
923 for (i = 0; i < scq->num_entries; i++)
924 dev_kfree_skb_any(scq->skb[i]);
926 for (i = 0; i < scq->num_entries; i++) {
927 if (scq->skb[i] != NULL) {
928 if (vcc->pop != NULL)
929 vcc->pop(vcc, scq->skb[i]);
931 dev_kfree_skb_any(scq->skb[i]);
936 dma_free_coherent(&card->pcidev->dev,
937 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
938 VBR_SCQSIZE : CBR_SCQSIZE),
943 /* The handles passed must be pointers to the sk_buff containing the small
944 or large buffer(s) cast to u32. */
945 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
947 struct sk_buff *handle1, *handle2;
957 addr1 = dma_map_single(&card->pcidev->dev,
959 (NS_PRV_BUFTYPE(skb) == BUF_SM
960 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
962 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
966 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
968 #endif /* GENERAL_DEBUG */
970 stat = readl(card->membase + STAT);
971 card->sbfqc = ns_stat_sfbqc_get(stat);
972 card->lbfqc = ns_stat_lfbqc_get(stat);
973 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
976 addr2 = card->sm_addr;
977 handle2 = card->sm_handle;
978 card->sm_addr = 0x00000000;
979 card->sm_handle = NULL;
980 } else { /* (!sm_addr) */
982 card->sm_addr = addr1;
983 card->sm_handle = handle1;
986 } else { /* buf_type == BUF_LG */
990 addr2 = card->lg_addr;
991 handle2 = card->lg_handle;
992 card->lg_addr = 0x00000000;
993 card->lg_handle = NULL;
994 } else { /* (!lg_addr) */
996 card->lg_addr = addr1;
997 card->lg_handle = handle1;
1003 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1004 if (card->sbfqc >= card->sbnr.max) {
1005 skb_unlink(handle1, &card->sbpool.queue);
1006 dev_kfree_skb_any(handle1);
1007 skb_unlink(handle2, &card->sbpool.queue);
1008 dev_kfree_skb_any(handle2);
1012 } else { /* (buf_type == BUF_LG) */
1014 if (card->lbfqc >= card->lbnr.max) {
1015 skb_unlink(handle1, &card->lbpool.queue);
1016 dev_kfree_skb_any(handle1);
1017 skb_unlink(handle2, &card->lbpool.queue);
1018 dev_kfree_skb_any(handle2);
1024 id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1028 id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1032 spin_lock_irqsave(&card->res_lock, flags);
1033 while (CMD_BUSY(card)) ;
1034 writel(addr2, card->membase + DR3);
1035 writel(id2, card->membase + DR2);
1036 writel(addr1, card->membase + DR1);
1037 writel(id1, card->membase + DR0);
1038 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1039 card->membase + CMD);
1040 spin_unlock_irqrestore(&card->res_lock, flags);
1042 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1044 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1048 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1049 card->lbfqc >= card->lbnr.min) {
1051 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1052 card->membase + CFG);
1059 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1063 struct atm_dev *dev;
1064 unsigned long flags;
1066 card = (ns_dev *) dev_id;
1070 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1072 spin_lock_irqsave(&card->int_lock, flags);
1074 stat_r = readl(card->membase + STAT);
1076 /* Transmit Status Indicator has been written to T. S. Queue */
1077 if (stat_r & NS_STAT_TSIF) {
1078 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1080 writel(NS_STAT_TSIF, card->membase + STAT);
1083 /* Incomplete CS-PDU has been transmitted */
1084 if (stat_r & NS_STAT_TXICP) {
1085 writel(NS_STAT_TXICP, card->membase + STAT);
1086 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1090 /* Transmit Status Queue 7/8 full */
1091 if (stat_r & NS_STAT_TSQF) {
1092 writel(NS_STAT_TSQF, card->membase + STAT);
1093 PRINTK("nicstar%d: TSQ full.\n", card->index);
1097 /* Timer overflow */
1098 if (stat_r & NS_STAT_TMROF) {
1099 writel(NS_STAT_TMROF, card->membase + STAT);
1100 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1103 /* PHY device interrupt signal active */
1104 if (stat_r & NS_STAT_PHYI) {
1105 writel(NS_STAT_PHYI, card->membase + STAT);
1106 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1107 if (dev->phy && dev->phy->interrupt) {
1108 dev->phy->interrupt(dev);
1112 /* Small Buffer Queue is full */
1113 if (stat_r & NS_STAT_SFBQF) {
1114 writel(NS_STAT_SFBQF, card->membase + STAT);
1115 printk("nicstar%d: Small free buffer queue is full.\n",
1119 /* Large Buffer Queue is full */
1120 if (stat_r & NS_STAT_LFBQF) {
1121 writel(NS_STAT_LFBQF, card->membase + STAT);
1122 printk("nicstar%d: Large free buffer queue is full.\n",
1126 /* Receive Status Queue is full */
1127 if (stat_r & NS_STAT_RSQF) {
1128 writel(NS_STAT_RSQF, card->membase + STAT);
1129 printk("nicstar%d: RSQ full.\n", card->index);
1133 /* Complete CS-PDU received */
1134 if (stat_r & NS_STAT_EOPDU) {
1135 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1137 writel(NS_STAT_EOPDU, card->membase + STAT);
1140 /* Raw cell received */
1141 if (stat_r & NS_STAT_RAWCF) {
1142 writel(NS_STAT_RAWCF, card->membase + STAT);
1144 printk("nicstar%d: Raw cell received and no support yet...\n",
1146 #endif /* RCQ_SUPPORT */
1147 /* NOTE: the following procedure may keep a raw cell pending until the
1148 next interrupt. As this preliminary support is only meant to
1149 avoid buffer leakage, this is not an issue. */
1150 while (readl(card->membase + RAWCT) != card->rawch) {
1152 if (ns_rcqe_islast(card->rawcell)) {
1153 struct sk_buff *oldbuf;
1155 oldbuf = card->rcbuf;
1156 card->rcbuf = idr_find(&card->idr,
1157 ns_rcqe_nextbufhandle(card->rawcell));
1158 card->rawch = NS_PRV_DMA(card->rcbuf);
1159 card->rawcell = (struct ns_rcqe *)
1161 recycle_rx_buf(card, oldbuf);
1163 card->rawch += NS_RCQE_SIZE;
1169 /* Small buffer queue is empty */
1170 if (stat_r & NS_STAT_SFBQE) {
1174 writel(NS_STAT_SFBQE, card->membase + STAT);
1175 printk("nicstar%d: Small free buffer queue empty.\n",
1177 for (i = 0; i < card->sbnr.min; i++) {
1178 sb = dev_alloc_skb(NS_SMSKBSIZE);
1180 writel(readl(card->membase + CFG) &
1181 ~NS_CFG_EFBIE, card->membase + CFG);
1185 NS_PRV_BUFTYPE(sb) = BUF_SM;
1186 skb_queue_tail(&card->sbpool.queue, sb);
1187 skb_reserve(sb, NS_AAL0_HEADER);
1188 push_rxbufs(card, sb);
1194 /* Large buffer queue empty */
1195 if (stat_r & NS_STAT_LFBQE) {
1199 writel(NS_STAT_LFBQE, card->membase + STAT);
1200 printk("nicstar%d: Large free buffer queue empty.\n",
1202 for (i = 0; i < card->lbnr.min; i++) {
1203 lb = dev_alloc_skb(NS_LGSKBSIZE);
1205 writel(readl(card->membase + CFG) &
1206 ~NS_CFG_EFBIE, card->membase + CFG);
1210 NS_PRV_BUFTYPE(lb) = BUF_LG;
1211 skb_queue_tail(&card->lbpool.queue, lb);
1212 skb_reserve(lb, NS_SMBUFSIZE);
1213 push_rxbufs(card, lb);
1219 /* Receive Status Queue is 7/8 full */
1220 if (stat_r & NS_STAT_RSQAF) {
1221 writel(NS_STAT_RSQAF, card->membase + STAT);
1222 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1226 spin_unlock_irqrestore(&card->int_lock, flags);
1227 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1231 static int ns_open(struct atm_vcc *vcc)
1235 unsigned long tmpl, modl;
1236 int tcr, tcra; /* target cell rate, and absolute value */
1237 int n = 0; /* Number of entries in the TST. Initialized to remove
1238 the compiler warning. */
1240 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1241 warning. How I wish compilers were clever enough to
1242 tell which variables can truly be used
1244 int inuse; /* tx or rx vc already in use by another vcc */
1245 short vpi = vcc->vpi;
1248 card = (ns_dev *) vcc->dev->dev_data;
1249 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1251 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1252 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1256 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1260 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1262 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1265 printk("nicstar%d: %s vci already in use.\n", card->index,
1266 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1270 set_bit(ATM_VF_ADDR, &vcc->flags);
1272 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1273 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1274 needed to do that. */
1275 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1278 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1279 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1280 /* Check requested cell rate and availability of SCD */
1281 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1282 && vcc->qos.txtp.min_pcr == 0) {
1284 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1286 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1287 clear_bit(ATM_VF_ADDR, &vcc->flags);
1291 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1292 tcra = tcr >= 0 ? tcr : -tcr;
1294 PRINTK("nicstar%d: target cell rate = %d.\n",
1295 card->index, vcc->qos.txtp.max_pcr);
1298 (unsigned long)tcra *(unsigned long)
1300 modl = tmpl % card->max_pcr;
1302 n = (int)(tmpl / card->max_pcr);
1306 } else if (tcr == 0) {
1308 (card->tst_free_entries -
1309 NS_TST_RESERVED)) <= 0) {
1311 ("nicstar%d: no CBR bandwidth free.\n",
1313 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1314 clear_bit(ATM_VF_ADDR, &vcc->flags);
1321 ("nicstar%d: selected bandwidth < granularity.\n",
1323 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1324 clear_bit(ATM_VF_ADDR, &vcc->flags);
1328 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1330 ("nicstar%d: not enough free CBR bandwidth.\n",
1332 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1333 clear_bit(ATM_VF_ADDR, &vcc->flags);
1336 card->tst_free_entries -= n;
1338 XPRINTK("nicstar%d: writing %d tst entries.\n",
1340 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1341 if (card->scd2vc[frscdi] == NULL) {
1342 card->scd2vc[frscdi] = vc;
1346 if (frscdi == NS_FRSCD_NUM) {
1348 ("nicstar%d: no SCD available for CBR channel.\n",
1350 card->tst_free_entries += n;
1351 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1352 clear_bit(ATM_VF_ADDR, &vcc->flags);
1356 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1358 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1360 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1362 card->scd2vc[frscdi] = NULL;
1363 card->tst_free_entries += n;
1364 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1365 clear_bit(ATM_VF_ADDR, &vcc->flags);
1369 u32d[0] = scq_virt_to_bus(scq, scq->base);
1370 u32d[1] = (u32) 0x00000000;
1371 u32d[2] = (u32) 0xffffffff;
1372 u32d[3] = (u32) 0x00000000;
1373 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1375 fill_tst(card, n, vc);
1376 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1377 vc->cbr_scd = 0x00000000;
1378 vc->scq = card->scq0;
1381 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1386 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1393 /* Open the connection in hardware */
1394 if (vcc->qos.aal == ATM_AAL5)
1395 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1396 else /* vcc->qos.aal == ATM_AAL0 */
1397 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1399 status |= NS_RCTE_RAWCELLINTEN;
1400 #endif /* RCQ_SUPPORT */
1403 (vpi << card->vcibits | vci) *
1404 NS_RCT_ENTRY_SIZE, &status, 1);
1409 set_bit(ATM_VF_READY, &vcc->flags);
1413 static void ns_close(struct atm_vcc *vcc)
1421 card = vcc->dev->dev_data;
1422 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1423 (int)vcc->vpi, vcc->vci);
1425 clear_bit(ATM_VF_READY, &vcc->flags);
1427 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1429 unsigned long flags;
1433 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1434 spin_lock_irqsave(&card->res_lock, flags);
1435 while (CMD_BUSY(card)) ;
1436 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1437 card->membase + CMD);
1438 spin_unlock_irqrestore(&card->res_lock, flags);
1441 if (vc->rx_iov != NULL) {
1442 struct sk_buff *iovb;
1445 stat = readl(card->membase + STAT);
1446 card->sbfqc = ns_stat_sfbqc_get(stat);
1447 card->lbfqc = ns_stat_lfbqc_get(stat);
1450 ("nicstar%d: closing a VC with pending rx buffers.\n",
1453 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1454 NS_PRV_IOVCNT(iovb));
1455 NS_PRV_IOVCNT(iovb) = 0;
1456 spin_lock_irqsave(&card->int_lock, flags);
1457 recycle_iov_buf(card, iovb);
1458 spin_unlock_irqrestore(&card->int_lock, flags);
1463 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1467 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1468 unsigned long flags;
1475 spin_lock_irqsave(&scq->lock, flags);
1477 if (scqep == scq->base)
1481 if (scqep == scq->tail) {
1482 spin_unlock_irqrestore(&scq->lock, flags);
1485 /* If the last entry is not a TSR, place one in the SCQ in order to
1486 be able to completely drain it and then close. */
1487 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1493 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1494 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1495 scqi = scq->next - scq->base;
1496 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1497 tsr.word_3 = 0x00000000;
1498 tsr.word_4 = 0x00000000;
1501 scq->skb[index] = NULL;
1502 if (scq->next == scq->last)
1503 scq->next = scq->base;
1506 data = scq_virt_to_bus(scq, scq->next);
1507 ns_write_sram(card, scq->scd, &data, 1);
1509 spin_unlock_irqrestore(&scq->lock, flags);
1513 /* Free all TST entries */
1514 data = NS_TST_OPCODE_VARIABLE;
1515 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1516 if (card->tste2vc[i] == vc) {
1517 ns_write_sram(card, card->tst_addr + i, &data,
1519 card->tste2vc[i] = NULL;
1520 card->tst_free_entries++;
1524 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1525 free_scq(card, vc->scq, vcc);
1528 /* remove all references to vcc before deleting it */
1529 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1530 unsigned long flags;
1531 scq_info *scq = card->scq0;
1533 spin_lock_irqsave(&scq->lock, flags);
1535 for (i = 0; i < scq->num_entries; i++) {
1536 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1537 ATM_SKB(scq->skb[i])->vcc = NULL;
1538 atm_return(vcc, scq->skb[i]->truesize);
1540 ("nicstar: deleted pending vcc mapping\n");
1544 spin_unlock_irqrestore(&scq->lock, flags);
1547 vcc->dev_data = NULL;
1548 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1549 clear_bit(ATM_VF_ADDR, &vcc->flags);
1554 stat = readl(card->membase + STAT);
1555 cfg = readl(card->membase + CFG);
1556 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1558 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1559 card->tsq.base, card->tsq.next,
1560 card->tsq.last, readl(card->membase + TSQT));
1562 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1563 card->rsq.base, card->rsq.next,
1564 card->rsq.last, readl(card->membase + RSQT));
1565 printk("Empty free buffer queue interrupt %s \n",
1566 card->efbie ? "enabled" : "disabled");
1567 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1568 ns_stat_sfbqc_get(stat), card->sbpool.count,
1569 ns_stat_lfbqc_get(stat), card->lbpool.count);
1570 printk("hbpool.count = %d iovpool.count = %d \n",
1571 card->hbpool.count, card->iovpool.count);
1573 #endif /* RX_DEBUG */
1576 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1583 /* It would be very complicated to keep the two TSTs synchronized while
1584 assuring that writes are only made to the inactive TST. So, for now I
1585 will use only one TST. If problems occur, I will change this again */
1587 new_tst = card->tst_addr;
1589 /* Fill procedure */
1591 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1592 if (card->tste2vc[e] == NULL)
1595 if (e == NS_TST_NUM_ENTRIES) {
1596 printk("nicstar%d: No free TST entries found. \n", card->index);
1601 cl = NS_TST_NUM_ENTRIES;
1602 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1605 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1606 card->tste2vc[e] = vc;
1607 ns_write_sram(card, new_tst + e, &data, 1);
1608 cl -= NS_TST_NUM_ENTRIES;
1612 if (++e == NS_TST_NUM_ENTRIES) {
1618 /* End of fill procedure */
1620 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1621 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1622 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1623 card->tst_addr = new_tst;
1626 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1631 unsigned long buflen;
1633 u32 flags; /* TBD flags, not CPU flags */
1635 card = vcc->dev->dev_data;
1636 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1637 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1638 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1640 atomic_inc(&vcc->stats->tx_err);
1641 dev_kfree_skb_any(skb);
1646 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1648 atomic_inc(&vcc->stats->tx_err);
1649 dev_kfree_skb_any(skb);
1653 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1654 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1656 atomic_inc(&vcc->stats->tx_err);
1657 dev_kfree_skb_any(skb);
1661 if (skb_shinfo(skb)->nr_frags != 0) {
1662 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1663 atomic_inc(&vcc->stats->tx_err);
1664 dev_kfree_skb_any(skb);
1668 ATM_SKB(skb)->vcc = vcc;
1670 NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1671 skb->len, DMA_TO_DEVICE);
1673 if (vcc->qos.aal == ATM_AAL5) {
1674 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1675 flags = NS_TBD_AAL5;
1676 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1677 scqe.word_3 = cpu_to_le32(skb->len);
1679 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1681 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1682 flags |= NS_TBD_EOPDU;
1683 } else { /* (vcc->qos.aal == ATM_AAL0) */
1685 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1686 flags = NS_TBD_AAL0;
1687 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1688 scqe.word_3 = cpu_to_le32(0x00000000);
1689 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1690 flags |= NS_TBD_EOPDU;
1692 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1693 /* Force the VPI/VCI to be the same as in VCC struct */
1695 cpu_to_le32((((u32) vcc->
1696 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1698 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1701 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1702 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1703 scq = ((vc_map *) vcc->dev_data)->scq;
1706 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1710 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1711 atomic_inc(&vcc->stats->tx_err);
1712 dma_unmap_single(&card->pcidev->dev, NS_PRV_DMA(skb), skb->len,
1714 dev_kfree_skb_any(skb);
1717 atomic_inc(&vcc->stats->tx);
1722 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1723 struct sk_buff *skb)
1725 unsigned long flags;
1732 spin_lock_irqsave(&scq->lock, flags);
1733 while (scq->tail == scq->next) {
1734 if (in_interrupt()) {
1735 spin_unlock_irqrestore(&scq->lock, flags);
1736 printk("nicstar%d: Error pushing TBD.\n", card->index);
1741 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1742 scq->tail != scq->next,
1747 spin_unlock_irqrestore(&scq->lock, flags);
1748 printk("nicstar%d: Timeout pushing TBD.\n",
1754 index = (int)(scq->next - scq->base);
1755 scq->skb[index] = skb;
1756 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1757 card->index, skb, index);
1758 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1759 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1760 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1762 if (scq->next == scq->last)
1763 scq->next = scq->base;
1768 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1774 if (vc->tbd_count >= MAX_TBD_PER_VC
1775 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1778 while (scq->tail == scq->next) {
1779 if (in_interrupt()) {
1780 data = scq_virt_to_bus(scq, scq->next);
1781 ns_write_sram(card, scq->scd, &data, 1);
1782 spin_unlock_irqrestore(&scq->lock, flags);
1783 printk("nicstar%d: Error pushing TSR.\n",
1791 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1792 scq->tail != scq->next,
1798 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1800 scdi = NS_TSR_SCDISVBR;
1802 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1803 scqi = scq->next - scq->base;
1804 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1805 tsr.word_3 = 0x00000000;
1806 tsr.word_4 = 0x00000000;
1810 scq->skb[index] = NULL;
1812 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1813 card->index, le32_to_cpu(tsr.word_1),
1814 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1815 le32_to_cpu(tsr.word_4), scq->next);
1816 if (scq->next == scq->last)
1817 scq->next = scq->base;
1823 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1826 data = scq_virt_to_bus(scq, scq->next);
1827 ns_write_sram(card, scq->scd, &data, 1);
1829 spin_unlock_irqrestore(&scq->lock, flags);
1834 static void process_tsq(ns_dev * card)
1838 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1839 int serviced_entries; /* flag indicating at least on entry was serviced */
1841 serviced_entries = 0;
1843 if (card->tsq.next == card->tsq.last)
1844 one_ahead = card->tsq.base;
1846 one_ahead = card->tsq.next + 1;
1848 if (one_ahead == card->tsq.last)
1849 two_ahead = card->tsq.base;
1851 two_ahead = one_ahead + 1;
1853 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1854 !ns_tsi_isempty(two_ahead))
1855 /* At most two empty, as stated in the 77201 errata */
1857 serviced_entries = 1;
1859 /* Skip the one or two possible empty entries */
1860 while (ns_tsi_isempty(card->tsq.next)) {
1861 if (card->tsq.next == card->tsq.last)
1862 card->tsq.next = card->tsq.base;
1867 if (!ns_tsi_tmrof(card->tsq.next)) {
1868 scdi = ns_tsi_getscdindex(card->tsq.next);
1869 if (scdi == NS_TSI_SCDISVBR)
1872 if (card->scd2vc[scdi] == NULL) {
1874 ("nicstar%d: could not find VC from SCD index.\n",
1876 ns_tsi_init(card->tsq.next);
1879 scq = card->scd2vc[scdi]->scq;
1881 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1883 wake_up_interruptible(&(scq->scqfull_waitq));
1886 ns_tsi_init(card->tsq.next);
1887 previous = card->tsq.next;
1888 if (card->tsq.next == card->tsq.last)
1889 card->tsq.next = card->tsq.base;
1893 if (card->tsq.next == card->tsq.last)
1894 one_ahead = card->tsq.base;
1896 one_ahead = card->tsq.next + 1;
1898 if (one_ahead == card->tsq.last)
1899 two_ahead = card->tsq.base;
1901 two_ahead = one_ahead + 1;
1904 if (serviced_entries)
1905 writel(PTR_DIFF(previous, card->tsq.base),
1906 card->membase + TSQH);
1909 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1911 struct atm_vcc *vcc;
1912 struct sk_buff *skb;
1914 unsigned long flags;
1916 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1917 card->index, scq, pos);
1918 if (pos >= scq->num_entries) {
1919 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1923 spin_lock_irqsave(&scq->lock, flags);
1924 i = (int)(scq->tail - scq->base);
1925 if (++i == scq->num_entries)
1929 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1930 card->index, skb, i);
1932 dma_unmap_single(&card->pcidev->dev,
1936 vcc = ATM_SKB(skb)->vcc;
1937 if (vcc && vcc->pop != NULL) {
1940 dev_kfree_skb_irq(skb);
1944 if (++i == scq->num_entries)
1947 scq->tail = scq->base + pos;
1948 spin_unlock_irqrestore(&scq->lock, flags);
1951 static void process_rsq(ns_dev * card)
1955 if (!ns_rsqe_valid(card->rsq.next))
1958 dequeue_rx(card, card->rsq.next);
1959 ns_rsqe_init(card->rsq.next);
1960 previous = card->rsq.next;
1961 if (card->rsq.next == card->rsq.last)
1962 card->rsq.next = card->rsq.base;
1965 } while (ns_rsqe_valid(card->rsq.next));
1966 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1969 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1973 struct sk_buff *iovb;
1975 struct atm_vcc *vcc;
1976 struct sk_buff *skb;
1977 unsigned short aal5_len;
1982 stat = readl(card->membase + STAT);
1983 card->sbfqc = ns_stat_sfbqc_get(stat);
1984 card->lbfqc = ns_stat_lfbqc_get(stat);
1986 id = le32_to_cpu(rsqe->buffer_handle);
1987 skb = idr_remove(&card->idr, id);
1990 "nicstar%d: skb not found!\n", card->index);
1993 dma_sync_single_for_cpu(&card->pcidev->dev,
1995 (NS_PRV_BUFTYPE(skb) == BUF_SM
1996 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
1998 dma_unmap_single(&card->pcidev->dev,
2000 (NS_PRV_BUFTYPE(skb) == BUF_SM
2001 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2003 vpi = ns_rsqe_vpi(rsqe);
2004 vci = ns_rsqe_vci(rsqe);
2005 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2006 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2007 card->index, vpi, vci);
2008 recycle_rx_buf(card, skb);
2012 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2014 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2015 card->index, vpi, vci);
2016 recycle_rx_buf(card, skb);
2022 if (vcc->qos.aal == ATM_AAL0) {
2024 unsigned char *cell;
2028 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2029 sb = dev_alloc_skb(NS_SMSKBSIZE);
2032 ("nicstar%d: Can't allocate buffers for aal0.\n",
2034 atomic_add(i, &vcc->stats->rx_drop);
2037 if (!atm_charge(vcc, sb->truesize)) {
2039 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2041 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2042 dev_kfree_skb_any(sb);
2045 /* Rebuild the header */
2046 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2047 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2048 if (i == 1 && ns_rsqe_eopdu(rsqe))
2049 *((u32 *) sb->data) |= 0x00000002;
2050 skb_put(sb, NS_AAL0_HEADER);
2051 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2052 skb_put(sb, ATM_CELL_PAYLOAD);
2053 ATM_SKB(sb)->vcc = vcc;
2054 __net_timestamp(sb);
2056 atomic_inc(&vcc->stats->rx);
2057 cell += ATM_CELL_PAYLOAD;
2060 recycle_rx_buf(card, skb);
2064 /* To reach this point, the AAL layer can only be AAL5 */
2066 if ((iovb = vc->rx_iov) == NULL) {
2067 iovb = skb_dequeue(&(card->iovpool.queue));
2068 if (iovb == NULL) { /* No buffers in the queue */
2069 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2071 printk("nicstar%d: Out of iovec buffers.\n",
2073 atomic_inc(&vcc->stats->rx_drop);
2074 recycle_rx_buf(card, skb);
2077 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2078 } else if (--card->iovpool.count < card->iovnr.min) {
2079 struct sk_buff *new_iovb;
2081 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2082 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2083 skb_queue_tail(&card->iovpool.queue, new_iovb);
2084 card->iovpool.count++;
2088 NS_PRV_IOVCNT(iovb) = 0;
2090 iovb->data = iovb->head;
2091 skb_reset_tail_pointer(iovb);
2092 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2093 buffer is stored as iovec base, NOT a pointer to the
2094 small or large buffer itself. */
2095 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2096 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2097 atomic_inc(&vcc->stats->rx_err);
2098 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2100 NS_PRV_IOVCNT(iovb) = 0;
2102 iovb->data = iovb->head;
2103 skb_reset_tail_pointer(iovb);
2105 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2106 iov->iov_base = (void *)skb;
2107 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2108 iovb->len += iov->iov_len;
2111 if (NS_PRV_IOVCNT(iovb) == 1) {
2112 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2114 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2116 which_list(card, skb);
2117 atomic_inc(&vcc->stats->rx_err);
2118 recycle_rx_buf(card, skb);
2120 recycle_iov_buf(card, iovb);
2123 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2125 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2127 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2129 which_list(card, skb);
2130 atomic_inc(&vcc->stats->rx_err);
2131 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2132 NS_PRV_IOVCNT(iovb));
2134 recycle_iov_buf(card, iovb);
2138 #endif /* EXTRA_DEBUG */
2140 if (ns_rsqe_eopdu(rsqe)) {
2141 /* This works correctly regardless of the endianness of the host */
2142 unsigned char *L1L2 = (unsigned char *)
2143 (skb->data + iov->iov_len - 6);
2144 aal5_len = L1L2[0] << 8 | L1L2[1];
2145 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2146 if (ns_rsqe_crcerr(rsqe) ||
2147 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2148 printk("nicstar%d: AAL5 CRC error", card->index);
2149 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2150 printk(" - PDU size mismatch.\n");
2153 atomic_inc(&vcc->stats->rx_err);
2154 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2155 NS_PRV_IOVCNT(iovb));
2157 recycle_iov_buf(card, iovb);
2161 /* By this point we (hopefully) have a complete SDU without errors. */
2163 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2164 /* skb points to a small buffer */
2165 if (!atm_charge(vcc, skb->truesize)) {
2166 push_rxbufs(card, skb);
2167 atomic_inc(&vcc->stats->rx_drop);
2170 dequeue_sm_buf(card, skb);
2171 ATM_SKB(skb)->vcc = vcc;
2172 __net_timestamp(skb);
2173 vcc->push(vcc, skb);
2174 atomic_inc(&vcc->stats->rx);
2176 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2179 sb = (struct sk_buff *)(iov - 1)->iov_base;
2180 /* skb points to a large buffer */
2182 if (len <= NS_SMBUFSIZE) {
2183 if (!atm_charge(vcc, sb->truesize)) {
2184 push_rxbufs(card, sb);
2185 atomic_inc(&vcc->stats->rx_drop);
2188 dequeue_sm_buf(card, sb);
2189 ATM_SKB(sb)->vcc = vcc;
2190 __net_timestamp(sb);
2192 atomic_inc(&vcc->stats->rx);
2195 push_rxbufs(card, skb);
2197 } else { /* len > NS_SMBUFSIZE, the usual case */
2199 if (!atm_charge(vcc, skb->truesize)) {
2200 push_rxbufs(card, skb);
2201 atomic_inc(&vcc->stats->rx_drop);
2203 dequeue_lg_buf(card, skb);
2204 skb_push(skb, NS_SMBUFSIZE);
2205 skb_copy_from_linear_data(sb, skb->data,
2207 skb_put(skb, len - NS_SMBUFSIZE);
2208 ATM_SKB(skb)->vcc = vcc;
2209 __net_timestamp(skb);
2210 vcc->push(vcc, skb);
2211 atomic_inc(&vcc->stats->rx);
2214 push_rxbufs(card, sb);
2218 } else { /* Must push a huge buffer */
2220 struct sk_buff *hb, *sb, *lb;
2221 int remaining, tocopy;
2224 hb = skb_dequeue(&(card->hbpool.queue));
2225 if (hb == NULL) { /* No buffers in the queue */
2227 hb = dev_alloc_skb(NS_HBUFSIZE);
2230 ("nicstar%d: Out of huge buffers.\n",
2232 atomic_inc(&vcc->stats->rx_drop);
2233 recycle_iovec_rx_bufs(card,
2236 NS_PRV_IOVCNT(iovb));
2238 recycle_iov_buf(card, iovb);
2240 } else if (card->hbpool.count < card->hbnr.min) {
2241 struct sk_buff *new_hb;
2243 dev_alloc_skb(NS_HBUFSIZE)) !=
2245 skb_queue_tail(&card->hbpool.
2247 card->hbpool.count++;
2250 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2251 } else if (--card->hbpool.count < card->hbnr.min) {
2252 struct sk_buff *new_hb;
2254 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2255 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2256 skb_queue_tail(&card->hbpool.queue,
2258 card->hbpool.count++;
2260 if (card->hbpool.count < card->hbnr.min) {
2262 dev_alloc_skb(NS_HBUFSIZE)) !=
2264 NS_PRV_BUFTYPE(new_hb) =
2266 skb_queue_tail(&card->hbpool.
2268 card->hbpool.count++;
2273 iov = (struct iovec *)iovb->data;
2275 if (!atm_charge(vcc, hb->truesize)) {
2276 recycle_iovec_rx_bufs(card, iov,
2277 NS_PRV_IOVCNT(iovb));
2278 if (card->hbpool.count < card->hbnr.max) {
2279 skb_queue_tail(&card->hbpool.queue, hb);
2280 card->hbpool.count++;
2282 dev_kfree_skb_any(hb);
2283 atomic_inc(&vcc->stats->rx_drop);
2285 /* Copy the small buffer to the huge buffer */
2286 sb = (struct sk_buff *)iov->iov_base;
2287 skb_copy_from_linear_data(sb, hb->data,
2289 skb_put(hb, iov->iov_len);
2290 remaining = len - iov->iov_len;
2292 /* Free the small buffer */
2293 push_rxbufs(card, sb);
2295 /* Copy all large buffers to the huge buffer and free them */
2296 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2297 lb = (struct sk_buff *)iov->iov_base;
2299 min_t(int, remaining, iov->iov_len);
2300 skb_copy_from_linear_data(lb,
2303 skb_put(hb, tocopy);
2305 remaining -= tocopy;
2306 push_rxbufs(card, lb);
2309 if (remaining != 0 || hb->len != len)
2311 ("nicstar%d: Huge buffer len mismatch.\n",
2313 #endif /* EXTRA_DEBUG */
2314 ATM_SKB(hb)->vcc = vcc;
2315 __net_timestamp(hb);
2317 atomic_inc(&vcc->stats->rx);
2322 recycle_iov_buf(card, iovb);
2327 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2329 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2330 printk("nicstar%d: What kind of rx buffer is this?\n",
2332 dev_kfree_skb_any(skb);
2334 push_rxbufs(card, skb);
2337 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2340 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2343 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2345 if (card->iovpool.count < card->iovnr.max) {
2346 skb_queue_tail(&card->iovpool.queue, iovb);
2347 card->iovpool.count++;
2349 dev_kfree_skb_any(iovb);
2352 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2354 skb_unlink(sb, &card->sbpool.queue);
2355 if (card->sbfqc < card->sbnr.init) {
2356 struct sk_buff *new_sb;
2357 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2358 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2359 skb_queue_tail(&card->sbpool.queue, new_sb);
2360 skb_reserve(new_sb, NS_AAL0_HEADER);
2361 push_rxbufs(card, new_sb);
2364 if (card->sbfqc < card->sbnr.init)
2366 struct sk_buff *new_sb;
2367 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2368 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2369 skb_queue_tail(&card->sbpool.queue, new_sb);
2370 skb_reserve(new_sb, NS_AAL0_HEADER);
2371 push_rxbufs(card, new_sb);
2376 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2378 skb_unlink(lb, &card->lbpool.queue);
2379 if (card->lbfqc < card->lbnr.init) {
2380 struct sk_buff *new_lb;
2381 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2382 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2383 skb_queue_tail(&card->lbpool.queue, new_lb);
2384 skb_reserve(new_lb, NS_SMBUFSIZE);
2385 push_rxbufs(card, new_lb);
2388 if (card->lbfqc < card->lbnr.init)
2390 struct sk_buff *new_lb;
2391 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2392 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2393 skb_queue_tail(&card->lbpool.queue, new_lb);
2394 skb_reserve(new_lb, NS_SMBUFSIZE);
2395 push_rxbufs(card, new_lb);
2400 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2407 card = (ns_dev *) dev->dev_data;
2408 stat = readl(card->membase + STAT);
2410 return sprintf(page, "Pool count min init max \n");
2412 return sprintf(page, "Small %5d %5d %5d %5d \n",
2413 ns_stat_sfbqc_get(stat), card->sbnr.min,
2414 card->sbnr.init, card->sbnr.max);
2416 return sprintf(page, "Large %5d %5d %5d %5d \n",
2417 ns_stat_lfbqc_get(stat), card->lbnr.min,
2418 card->lbnr.init, card->lbnr.max);
2420 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2421 card->hbpool.count, card->hbnr.min,
2422 card->hbnr.init, card->hbnr.max);
2424 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2425 card->iovpool.count, card->iovnr.min,
2426 card->iovnr.init, card->iovnr.max);
2430 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2435 /* Dump 25.6 Mbps PHY registers */
2436 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2437 here just in case it's needed for debugging. */
2438 if (card->max_pcr == ATM_25_PCR && !left--) {
2442 for (i = 0; i < 4; i++) {
2443 while (CMD_BUSY(card)) ;
2444 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2445 card->membase + CMD);
2446 while (CMD_BUSY(card)) ;
2447 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2450 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2451 phy_regs[0], phy_regs[1], phy_regs[2],
2454 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2457 if (left-- < NS_TST_NUM_ENTRIES) {
2458 if (card->tste2vc[left + 1] == NULL)
2459 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2461 return sprintf(page, "%5d - %d %d \n", left + 1,
2462 card->tste2vc[left + 1]->tx_vcc->vpi,
2463 card->tste2vc[left + 1]->tx_vcc->vci);
2469 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2474 unsigned long flags;
2476 card = dev->dev_data;
2480 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2482 switch (pl.buftype) {
2483 case NS_BUFTYPE_SMALL:
2485 ns_stat_sfbqc_get(readl(card->membase + STAT));
2486 pl.level.min = card->sbnr.min;
2487 pl.level.init = card->sbnr.init;
2488 pl.level.max = card->sbnr.max;
2491 case NS_BUFTYPE_LARGE:
2493 ns_stat_lfbqc_get(readl(card->membase + STAT));
2494 pl.level.min = card->lbnr.min;
2495 pl.level.init = card->lbnr.init;
2496 pl.level.max = card->lbnr.max;
2499 case NS_BUFTYPE_HUGE:
2500 pl.count = card->hbpool.count;
2501 pl.level.min = card->hbnr.min;
2502 pl.level.init = card->hbnr.init;
2503 pl.level.max = card->hbnr.max;
2506 case NS_BUFTYPE_IOVEC:
2507 pl.count = card->iovpool.count;
2508 pl.level.min = card->iovnr.min;
2509 pl.level.init = card->iovnr.init;
2510 pl.level.max = card->iovnr.max;
2514 return -ENOIOCTLCMD;
2517 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2518 return (sizeof(pl));
2523 if (!capable(CAP_NET_ADMIN))
2525 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2527 if (pl.level.min >= pl.level.init
2528 || pl.level.init >= pl.level.max)
2530 if (pl.level.min == 0)
2532 switch (pl.buftype) {
2533 case NS_BUFTYPE_SMALL:
2534 if (pl.level.max > TOP_SB)
2536 card->sbnr.min = pl.level.min;
2537 card->sbnr.init = pl.level.init;
2538 card->sbnr.max = pl.level.max;
2541 case NS_BUFTYPE_LARGE:
2542 if (pl.level.max > TOP_LB)
2544 card->lbnr.min = pl.level.min;
2545 card->lbnr.init = pl.level.init;
2546 card->lbnr.max = pl.level.max;
2549 case NS_BUFTYPE_HUGE:
2550 if (pl.level.max > TOP_HB)
2552 card->hbnr.min = pl.level.min;
2553 card->hbnr.init = pl.level.init;
2554 card->hbnr.max = pl.level.max;
2557 case NS_BUFTYPE_IOVEC:
2558 if (pl.level.max > TOP_IOVB)
2560 card->iovnr.min = pl.level.min;
2561 card->iovnr.init = pl.level.init;
2562 card->iovnr.max = pl.level.max;
2572 if (!capable(CAP_NET_ADMIN))
2574 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2576 case NS_BUFTYPE_SMALL:
2577 while (card->sbfqc < card->sbnr.init) {
2580 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2583 NS_PRV_BUFTYPE(sb) = BUF_SM;
2584 skb_queue_tail(&card->sbpool.queue, sb);
2585 skb_reserve(sb, NS_AAL0_HEADER);
2586 push_rxbufs(card, sb);
2590 case NS_BUFTYPE_LARGE:
2591 while (card->lbfqc < card->lbnr.init) {
2594 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2597 NS_PRV_BUFTYPE(lb) = BUF_LG;
2598 skb_queue_tail(&card->lbpool.queue, lb);
2599 skb_reserve(lb, NS_SMBUFSIZE);
2600 push_rxbufs(card, lb);
2604 case NS_BUFTYPE_HUGE:
2605 while (card->hbpool.count > card->hbnr.init) {
2608 spin_lock_irqsave(&card->int_lock, flags);
2609 hb = skb_dequeue(&card->hbpool.queue);
2610 card->hbpool.count--;
2611 spin_unlock_irqrestore(&card->int_lock, flags);
2614 ("nicstar%d: huge buffer count inconsistent.\n",
2617 dev_kfree_skb_any(hb);
2620 while (card->hbpool.count < card->hbnr.init) {
2623 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2626 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2627 spin_lock_irqsave(&card->int_lock, flags);
2628 skb_queue_tail(&card->hbpool.queue, hb);
2629 card->hbpool.count++;
2630 spin_unlock_irqrestore(&card->int_lock, flags);
2634 case NS_BUFTYPE_IOVEC:
2635 while (card->iovpool.count > card->iovnr.init) {
2636 struct sk_buff *iovb;
2638 spin_lock_irqsave(&card->int_lock, flags);
2639 iovb = skb_dequeue(&card->iovpool.queue);
2640 card->iovpool.count--;
2641 spin_unlock_irqrestore(&card->int_lock, flags);
2644 ("nicstar%d: iovec buffer count inconsistent.\n",
2647 dev_kfree_skb_any(iovb);
2650 while (card->iovpool.count < card->iovnr.init) {
2651 struct sk_buff *iovb;
2653 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2656 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2657 spin_lock_irqsave(&card->int_lock, flags);
2658 skb_queue_tail(&card->iovpool.queue, iovb);
2659 card->iovpool.count++;
2660 spin_unlock_irqrestore(&card->int_lock, flags);
2671 if (dev->phy && dev->phy->ioctl) {
2672 return dev->phy->ioctl(dev, cmd, arg);
2674 printk("nicstar%d: %s == NULL \n", card->index,
2675 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2676 return -ENOIOCTLCMD;
2682 static void which_list(ns_dev * card, struct sk_buff *skb)
2684 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2686 #endif /* EXTRA_DEBUG */
2688 static void ns_poll(unsigned long arg)
2692 unsigned long flags;
2695 PRINTK("nicstar: Entering ns_poll().\n");
2696 for (i = 0; i < num_cards; i++) {
2698 if (spin_is_locked(&card->int_lock)) {
2699 /* Probably it isn't worth spinning */
2702 spin_lock_irqsave(&card->int_lock, flags);
2705 stat_r = readl(card->membase + STAT);
2706 if (stat_r & NS_STAT_TSIF)
2707 stat_w |= NS_STAT_TSIF;
2708 if (stat_r & NS_STAT_EOPDU)
2709 stat_w |= NS_STAT_EOPDU;
2714 writel(stat_w, card->membase + STAT);
2715 spin_unlock_irqrestore(&card->int_lock, flags);
2717 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2718 PRINTK("nicstar: Leaving ns_poll().\n");
2721 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2725 unsigned long flags;
2727 card = dev->dev_data;
2728 spin_lock_irqsave(&card->res_lock, flags);
2729 while (CMD_BUSY(card)) ;
2730 writel((u32) value, card->membase + DR0);
2731 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2732 card->membase + CMD);
2733 spin_unlock_irqrestore(&card->res_lock, flags);
2736 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2739 unsigned long flags;
2742 card = dev->dev_data;
2743 spin_lock_irqsave(&card->res_lock, flags);
2744 while (CMD_BUSY(card)) ;
2745 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2746 card->membase + CMD);
2747 while (CMD_BUSY(card)) ;
2748 data = readl(card->membase + DR0) & 0x000000FF;
2749 spin_unlock_irqrestore(&card->res_lock, flags);
2750 return (unsigned char)data;
2753 module_init(nicstar_init);
2754 module_exit(nicstar_cleanup);