2 * bpf_jit.h: BPF JIT compiler for PPC
4 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
5 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
17 #include <asm/types.h>
18 #include <asm/code-patching.h>
20 #ifdef PPC64_ELF_ABI_v1
21 #define FUNCTION_DESCR_SIZE 24
23 #define FUNCTION_DESCR_SIZE 0
27 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs
28 * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the
29 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
31 #define IMM_H(i) ((uintptr_t)(i)>>16)
32 #define IMM_HA(i) (((uintptr_t)(i)>>16) + \
33 (((uintptr_t)(i) & 0x8000) >> 15))
34 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
36 #define PLANT_INSTR(d, idx, instr) \
37 do { if (d) { (d)[idx] = instr; } idx++; } while (0)
38 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr)
40 #define PPC_NOP() EMIT(PPC_INST_NOP)
41 #define PPC_BLR() EMIT(PPC_INST_BLR)
42 #define PPC_BLRL() EMIT(PPC_INST_BLRL)
43 #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r))
44 #define PPC_BCTR() EMIT(PPC_INST_BCTR)
45 #define PPC_MTCTR(r) EMIT(PPC_INST_MTCTR | ___PPC_RT(r))
46 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \
47 ___PPC_RA(a) | IMM_L(i))
48 #define PPC_MR(d, a) PPC_OR(d, a, a)
49 #define PPC_LI(r, i) PPC_ADDI(r, 0, i)
50 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \
51 ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
52 #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i)
53 #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \
54 ___PPC_RA(base) | ((i) & 0xfffc))
55 #define PPC_STDX(r, base, b) EMIT(PPC_INST_STDX | ___PPC_RS(r) | \
56 ___PPC_RA(base) | ___PPC_RB(b))
57 #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \
58 ___PPC_RA(base) | ((i) & 0xfffc))
59 #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \
60 ___PPC_RA(base) | IMM_L(i))
61 #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \
62 ___PPC_RA(base) | IMM_L(i))
63 #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \
64 ___PPC_RA(base) | IMM_L(i))
65 #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \
66 ___PPC_RA(base) | IMM_L(i))
68 #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \
69 ___PPC_RA(base) | IMM_L(i))
70 #define PPC_LD(r, base, i) EMIT(PPC_INST_LD | ___PPC_RT(r) | \
71 ___PPC_RA(base) | ((i) & 0xfffc))
72 #define PPC_LDX(r, base, b) EMIT(PPC_INST_LDX | ___PPC_RT(r) | \
73 ___PPC_RA(base) | ___PPC_RB(b))
74 #define PPC_LWZ(r, base, i) EMIT(PPC_INST_LWZ | ___PPC_RT(r) | \
75 ___PPC_RA(base) | IMM_L(i))
76 #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \
77 ___PPC_RA(base) | IMM_L(i))
78 #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \
79 ___PPC_RA(base) | ___PPC_RB(b))
80 #define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \
81 ___PPC_RA(base) | ___PPC_RB(b))
83 #define PPC_BPF_LDARX(t, a, b, eh) EMIT(PPC_INST_LDARX | ___PPC_RT(t) | \
84 ___PPC_RA(a) | ___PPC_RB(b) | \
86 #define PPC_BPF_LWARX(t, a, b, eh) EMIT(PPC_INST_LWARX | ___PPC_RT(t) | \
87 ___PPC_RA(a) | ___PPC_RB(b) | \
89 #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \
90 ___PPC_RA(a) | ___PPC_RB(b))
91 #define PPC_BPF_STDCX(s, a, b) EMIT(PPC_INST_STDCX | ___PPC_RS(s) | \
92 ___PPC_RA(a) | ___PPC_RB(b))
93 #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))
94 #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))
95 #define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \
97 #define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \
99 #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))
100 #define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i))
101 #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \
103 #define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \
106 #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \
107 ___PPC_RB(a) | ___PPC_RA(b))
108 #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \
109 ___PPC_RA(a) | ___PPC_RB(b))
110 #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \
111 ___PPC_RA(a) | ___PPC_RB(b))
112 #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \
113 ___PPC_RA(a) | ___PPC_RB(b))
114 #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \
115 ___PPC_RA(a) | ___PPC_RB(b))
116 #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \
117 ___PPC_RA(a) | IMM_L(i))
118 #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \
119 ___PPC_RA(a) | ___PPC_RB(b))
120 #define PPC_DIVDU(d, a, b) EMIT(PPC_INST_DIVDU | ___PPC_RT(d) | \
121 ___PPC_RA(a) | ___PPC_RB(b))
122 #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \
123 ___PPC_RS(a) | ___PPC_RB(b))
124 #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \
125 ___PPC_RS(a) | IMM_L(i))
126 #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \
127 ___PPC_RS(a) | ___PPC_RB(b))
128 #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \
129 ___PPC_RS(a) | ___PPC_RB(b))
130 #define PPC_MR(d, a) PPC_OR(d, a, a)
131 #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \
132 ___PPC_RS(a) | IMM_L(i))
133 #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \
134 ___PPC_RS(a) | IMM_L(i))
135 #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \
136 ___PPC_RS(a) | ___PPC_RB(b))
137 #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \
138 ___PPC_RS(a) | IMM_L(i))
139 #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \
140 ___PPC_RS(a) | IMM_L(i))
141 #define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \
143 #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \
144 ___PPC_RS(a) | ___PPC_RB(s))
145 #define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \
146 ___PPC_RS(a) | ___PPC_RB(s))
147 #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \
148 ___PPC_RS(a) | ___PPC_RB(s))
149 #define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \
150 ___PPC_RS(a) | ___PPC_RB(s))
151 #define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \
152 ___PPC_RS(a) | ___PPC_RB(s))
153 #define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \
154 ___PPC_RS(a) | __PPC_SH64(i))
155 #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
156 ___PPC_RS(a) | __PPC_SH(i) | \
157 __PPC_MB(mb) | __PPC_ME(me))
158 #define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \
159 ___PPC_RS(a) | __PPC_SH(i) | \
160 __PPC_MB(mb) | __PPC_ME(me))
161 #define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \
162 ___PPC_RS(a) | __PPC_SH64(i) | \
164 #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
165 ___PPC_RS(a) | __PPC_SH64(i) | \
168 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */
169 #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i))
170 /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */
171 #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31)
172 /* sldi = rldicr Rx, Ry, n, 63-n */
173 #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i))
174 /* sldi = rldicl Rx, Ry, 64-n, n */
175 #define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i)
177 #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))
179 /* Long jump; (unconditional 'branch') */
180 #define PPC_JMP(dest) \
182 long offset = (long)(dest) - (ctx->idx * 4); \
183 if (!is_offset_in_branch_range(offset)) { \
184 pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
187 EMIT(PPC_INST_BRANCH | (offset & 0x03fffffc)); \
189 /* "cond" here covers BO:BI fields. */
190 #define PPC_BCC_SHORT(cond, dest) \
192 long offset = (long)(dest) - (ctx->idx * 4); \
193 if (!is_offset_in_cond_branch_range(offset)) { \
194 pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
197 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \
200 /* Sign-extended 32-bit immediate load */
201 #define PPC_LI32(d, i) do { \
202 if ((int)(uintptr_t)(i) >= -32768 && \
203 (int)(uintptr_t)(i) < 32768) \
206 PPC_LIS(d, IMM_H(i)); \
208 PPC_ORI(d, d, IMM_L(i)); \
211 #define PPC_LI64(d, i) do { \
212 if ((long)(i) >= -2147483648 && \
213 (long)(i) < 2147483648) \
216 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \
217 PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \
219 PPC_LIS(d, ((uintptr_t)(i) >> 48)); \
220 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \
222 ((uintptr_t)(i) >> 32) & 0xffff); \
224 PPC_SLDI(d, d, 32); \
225 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \
227 ((uintptr_t)(i) >> 16) & 0xffff); \
228 if ((uintptr_t)(i) & 0x000000000000ffffULL) \
229 PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \
233 #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0)
235 #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0)
239 * The fly in the ointment of code size changing from pass to pass is
240 * avoided by padding the short branch case with a NOP. If code size differs
241 * with different branch reaches we will have the issue of code moving from
242 * one pass to the next and will need a few passes to converge on a stable
245 #define PPC_BCC(cond, dest) do { \
246 if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \
247 PPC_BCC_SHORT(cond, dest); \
250 /* Flip the 'T or F' bit to invert comparison */ \
251 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \
255 /* To create a branch condition, select a bit of cr0... */
259 /* ...and modify BO[3] */
260 #define COND_CMP_TRUE 0x100
261 #define COND_CMP_FALSE 0x000
262 /* Together, they make all required comparisons: */
263 #define COND_GT (CR0_GT | COND_CMP_TRUE)
264 #define COND_GE (CR0_LT | COND_CMP_FALSE)
265 #define COND_EQ (CR0_EQ | COND_CMP_TRUE)
266 #define COND_NE (CR0_EQ | COND_CMP_FALSE)
267 #define COND_LT (CR0_LT | COND_CMP_TRUE)
268 #define COND_LE (CR0_GT | COND_CMP_FALSE)