2 * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/ethtool.h>
39 #include <linux/mii.h>
40 #include <linux/if_vlan.h>
41 #include <linux/slab.h>
42 #include <linux/crc32.h>
45 #include <linux/tcp.h>
46 #include <linux/init.h>
47 #include <linux/kernel.h>
51 #include <asm/byteorder.h>
55 static u16 nes_read16_eeprom(void __iomem *addr, u16 offset);
60 static u32 nes_set_pau(struct nes_device *nesdev)
65 nes_write_indexed(nesdev, NES_IDX_GPR2, NES_ENABLE_PAU);
66 nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1);
68 for (counter = 0; counter < NES_PAU_COUNTER; counter++) {
70 if (!nes_read_indexed(nesdev, NES_IDX_GPR2)) {
71 printk(KERN_INFO PFX "PAU is supported.\n");
74 nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1);
76 if (counter == NES_PAU_COUNTER) {
77 printk(KERN_INFO PFX "PAU is not supported.\n");
84 * nes_read_eeprom_values -
86 int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter)
92 u16 next_section_address;
97 /* TODO: deal with EEPROM endian issues */
98 if (nesadapter->firmware_eeprom_offset == 0) {
99 /* Read the EEPROM Parameters */
100 eeprom_data = nes_read16_eeprom(nesdev->regs, 0);
101 nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data);
102 eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) <<
103 ((eeprom_data & 0x0080) >> 7));
104 nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset);
105 nesadapter->firmware_eeprom_offset = eeprom_offset;
106 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
107 if (eeprom_data != 0x5746) {
108 nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data);
112 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
113 nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n",
114 eeprom_offset + 2, eeprom_data);
115 eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8);
116 nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset);
117 nesadapter->software_eeprom_offset = eeprom_offset;
118 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
119 if (eeprom_data != 0x5753) {
120 printk("Not a valid Software Image = 0x%04X\n", eeprom_data);
123 sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6);
124 nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n",
127 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
128 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
129 eeprom_offset + 2, eeprom_data);
130 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
131 ((eeprom_data & 0x0100) >> 8));
132 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
133 if (eeprom_data != 0x414d) {
134 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
138 eeprom_offset = next_section_address;
140 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
141 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
142 eeprom_offset + 2, eeprom_data);
143 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
144 ((eeprom_data & 0x0100) >> 8));
145 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
146 if (eeprom_data != 0x4f52) {
147 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n",
151 eeprom_offset = next_section_address;
153 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
154 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
155 eeprom_offset + 2, eeprom_data);
156 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
157 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
158 if (eeprom_data != 0x5746) {
159 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n",
163 eeprom_offset = next_section_address;
165 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
166 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
167 eeprom_offset + 2, eeprom_data);
168 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
169 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
170 if (eeprom_data != 0x5753) {
171 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n",
175 eeprom_offset = next_section_address;
177 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
178 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
179 eeprom_offset + 2, eeprom_data);
180 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
181 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
182 if (eeprom_data != 0x414d) {
183 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
187 eeprom_offset = next_section_address;
189 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
190 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
191 eeprom_offset + 2, eeprom_data);
192 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
193 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
194 if (eeprom_data != 0x464e) {
195 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n",
199 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8);
200 printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
201 major_ver = (u8)(eeprom_data >> 8);
202 minor_ver = (u8)(eeprom_data);
204 if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) {
205 nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n");
206 } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) {
207 nesadapter->virtwq = 1;
209 if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3))
210 nesadapter->send_term_ok = 1;
212 if (nes_drv_opt & NES_DRV_OPT_ENABLE_PAU) {
213 if (!nes_set_pau(nesdev))
214 nesadapter->allow_unaligned_fpdus = 1;
217 nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
218 (u32)((u8)eeprom_data);
220 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 10);
221 printk(PFX "EEPROM version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
222 nesadapter->eeprom_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
223 (u32)((u8)eeprom_data);
226 /* eeprom is valid */
227 eeprom_offset = nesadapter->software_eeprom_offset;
229 nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset);
231 mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset);
233 mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
236 mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
237 nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n",
238 mac_addr_high, mac_addr_low);
239 nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max);
241 nesadapter->mac_addr_low = mac_addr_low;
242 nesadapter->mac_addr_high = mac_addr_high;
244 /* Read the Phy Type array */
246 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
247 nesadapter->phy_type[0] = (u8)(eeprom_data >> 8);
248 nesadapter->phy_type[1] = (u8)eeprom_data;
250 /* Read the port array */
252 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
253 nesadapter->phy_type[2] = (u8)(eeprom_data >> 8);
254 nesadapter->phy_type[3] = (u8)eeprom_data;
255 /* port_count is set by soft reset reg */
256 nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u,"
257 " port 2 -> %u, port 3 -> %u\n",
258 nesadapter->port_count,
259 nesadapter->phy_type[0], nesadapter->phy_type[1],
260 nesadapter->phy_type[2], nesadapter->phy_type[3]);
262 /* Read PD config array */
264 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
265 nesadapter->pd_config_size[0] = eeprom_data;
267 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
268 nesadapter->pd_config_base[0] = eeprom_data;
269 nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n",
270 nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]);
273 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
274 nesadapter->pd_config_size[1] = eeprom_data;
276 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
277 nesadapter->pd_config_base[1] = eeprom_data;
278 nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n",
279 nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]);
282 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
283 nesadapter->pd_config_size[2] = eeprom_data;
285 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
286 nesadapter->pd_config_base[2] = eeprom_data;
287 nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n",
288 nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]);
291 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
292 nesadapter->pd_config_size[3] = eeprom_data;
294 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
295 nesadapter->pd_config_base[3] = eeprom_data;
296 nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n",
297 nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]);
299 /* Read Rx Pool Size */
300 eeprom_offset += 22; /* 46 */
301 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
303 nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) +
304 nes_read16_eeprom(nesdev->regs, eeprom_offset);
305 nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size);
308 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
310 nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) +
311 nes_read16_eeprom(nesdev->regs, eeprom_offset);
312 nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size);
315 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
317 nesadapter->rx_threshold = (((u32)eeprom_data) << 16) +
318 nes_read16_eeprom(nesdev->regs, eeprom_offset);
319 nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold);
322 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
324 nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) +
325 nes_read16_eeprom(nesdev->regs, eeprom_offset);
326 nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n",
327 nesadapter->tcp_timer_core_clk_divisor);
330 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
332 nesadapter->iwarp_config = (((u32)eeprom_data) << 16) +
333 nes_read16_eeprom(nesdev->regs, eeprom_offset);
334 nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config);
337 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
339 nesadapter->cm_config = (((u32)eeprom_data) << 16) +
340 nes_read16_eeprom(nesdev->regs, eeprom_offset);
341 nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config);
344 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
346 nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) +
347 nes_read16_eeprom(nesdev->regs, eeprom_offset);
348 nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config);
351 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
353 nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) +
354 nes_read16_eeprom(nesdev->regs, eeprom_offset);
355 nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1);
358 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
360 nesadapter->wqm_wat = (((u32)eeprom_data) << 16) +
361 nes_read16_eeprom(nesdev->regs, eeprom_offset);
362 nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat);
365 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
367 nesadapter->core_clock = (((u32)eeprom_data) << 16) +
368 nes_read16_eeprom(nesdev->regs, eeprom_offset);
369 nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock);
371 if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) {
373 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
374 nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8;
375 nesadapter->phy_index[1] = eeprom_data & 0x00ff;
377 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
378 nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8;
379 nesadapter->phy_index[3] = eeprom_data & 0x00ff;
381 nesadapter->phy_index[0] = 4;
382 nesadapter->phy_index[1] = 5;
383 nesadapter->phy_index[2] = 6;
384 nesadapter->phy_index[3] = 7;
386 nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n",
387 nesadapter->phy_index[0],nesadapter->phy_index[1],
388 nesadapter->phy_index[2],nesadapter->phy_index[3]);
398 static u16 nes_read16_eeprom(void __iomem *addr, u16 offset)
400 writel(NES_EEPROM_READ_REQUEST + (offset >> 1),
401 (void __iomem *)addr + NES_EEPROM_COMMAND);
404 } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) &
405 NES_EEPROM_READ_REQUEST);
407 return readw((void __iomem *)addr + NES_EEPROM_DATA);
412 * nes_write_1G_phy_reg
414 void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data)
419 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
420 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
421 for (counter = 0; counter < 100 ; counter++) {
423 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
425 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
426 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
431 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
437 * nes_read_1G_phy_reg
438 * This routine only issues the read, the data must be read
441 void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data)
446 /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n",
447 phy_addr, nesdev->mac_index); */
449 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
450 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
451 for (counter = 0; counter < 100 ; counter++) {
453 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
455 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
456 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
460 if (!(u32temp & 1)) {
461 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
465 *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
471 * nes_write_10G_phy_reg
473 void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg,
480 port_addr = phy_addr;
483 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
484 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
485 for (counter = 0; counter < 100 ; counter++) {
487 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
489 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
494 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
498 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
499 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
500 for (counter = 0; counter < 100 ; counter++) {
502 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
504 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
509 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
515 * nes_read_10G_phy_reg
516 * This routine only issues the read, the data must be read
519 void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg)
525 port_addr = phy_addr;
528 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
529 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
530 for (counter = 0; counter < 100 ; counter++) {
532 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
534 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
539 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
543 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
544 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
545 for (counter = 0; counter < 100 ; counter++) {
547 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
549 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
554 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
560 * nes_get_cqp_request
562 struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev)
565 struct nes_cqp_request *cqp_request = NULL;
567 if (!list_empty(&nesdev->cqp_avail_reqs)) {
568 spin_lock_irqsave(&nesdev->cqp.lock, flags);
569 if (!list_empty(&nesdev->cqp_avail_reqs)) {
570 cqp_request = list_entry(nesdev->cqp_avail_reqs.next,
571 struct nes_cqp_request, list);
572 list_del_init(&cqp_request->list);
574 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
576 if (cqp_request == NULL) {
577 cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC);
579 cqp_request->dynamic = 1;
580 INIT_LIST_HEAD(&cqp_request->list);
585 init_waitqueue_head(&cqp_request->waitq);
586 cqp_request->waiting = 0;
587 cqp_request->request_done = 0;
588 cqp_request->callback = 0;
589 init_waitqueue_head(&cqp_request->waitq);
590 nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n",
593 printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n",
599 void nes_free_cqp_request(struct nes_device *nesdev,
600 struct nes_cqp_request *cqp_request)
604 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
606 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
608 if (cqp_request->dynamic) {
611 spin_lock_irqsave(&nesdev->cqp.lock, flags);
612 list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
613 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
617 void nes_put_cqp_request(struct nes_device *nesdev,
618 struct nes_cqp_request *cqp_request)
620 if (atomic_dec_and_test(&cqp_request->refcount))
621 nes_free_cqp_request(nesdev, cqp_request);
626 * nes_post_cqp_request
628 void nes_post_cqp_request(struct nes_device *nesdev,
629 struct nes_cqp_request *cqp_request)
631 struct nes_hw_cqp_wqe *cqp_wqe;
636 int ctx_index = NES_CQP_WQE_COMP_CTX_LOW_IDX;
638 spin_lock_irqsave(&nesdev->cqp.lock, flags);
640 if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) &
641 (nesdev->cqp.sq_size - 1)) != 1)
642 && (list_empty(&nesdev->cqp_pending_reqs))) {
643 cqp_head = nesdev->cqp.sq_head++;
644 nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
645 cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
646 memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
647 opcode = le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]);
648 if ((opcode & NES_CQP_OPCODE_MASK) == NES_CQP_DOWNLOAD_SEGMENT)
649 ctx_index = NES_CQP_WQE_DL_COMP_CTX_LOW_IDX;
651 u64temp = (unsigned long)cqp_request;
652 set_wqe_64bit_value(cqp_wqe->wqe_words, ctx_index, u64temp);
653 nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ,"
654 " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u,"
655 " waiting = %d, refcount = %d.\n",
656 opcode & NES_CQP_OPCODE_MASK,
657 le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request,
658 nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size,
659 cqp_request->waiting, atomic_read(&cqp_request->refcount));
663 /* Ring doorbell (1 WQEs) */
664 nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
668 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X"
669 " put on the pending queue.\n",
671 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
672 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX]));
673 list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs);
676 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
684 int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action)
686 struct nes_adapter *nesadapter = nesdev->nesadapter;
691 for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) {
692 if (nesadapter->arp_table[arp_index].ip_addr == ip_addr)
696 if (action == NES_ARP_ADD) {
697 if (arp_index != nesadapter->arp_table_size) {
702 err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps,
703 nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index, NES_RESOURCE_ARP);
705 nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err);
708 nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index);
710 nesadapter->arp_table[arp_index].ip_addr = ip_addr;
711 memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN);
715 /* DELETE or RESOLVE */
716 if (arp_index == nesadapter->arp_table_size) {
717 tmp_addr = cpu_to_be32(ip_addr);
718 nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n",
719 &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete");
723 if (action == NES_ARP_RESOLVE) {
724 nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index);
728 if (action == NES_ARP_DELETE) {
729 nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index);
730 nesadapter->arp_table[arp_index].ip_addr = 0;
731 eth_zero_addr(nesadapter->arp_table[arp_index].mac_addr);
732 nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index);
743 void nes_mh_fix(unsigned long parm)
746 struct nes_device *nesdev = (struct nes_device *)parm;
747 struct nes_adapter *nesadapter = nesdev->nesadapter;
748 struct nes_vnic *nesvnic;
750 u32 temp_used_chunks_tx;
751 u32 temp_last_used_chunks_tx;
752 u32 used_chunks_mask;
753 u32 mac_tx_frames_low;
754 u32 mac_tx_frames_high;
766 u32 chunks_tx_progress = 0;
768 spin_lock_irqsave(&nesadapter->phy_lock, flags);
769 if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) {
770 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
773 nesadapter->mac_sw_state[0] = NES_MAC_SW_MH;
774 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
776 mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW);
777 mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH);
778 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
779 used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX);
780 nesdev->mac_pause_frames_sent += mac_tx_pauses;
781 used_chunks_mask = 0;
782 temp_used_chunks_tx = used_chunks_tx;
783 temp_last_used_chunks_tx = nesdev->last_used_chunks_tx;
785 if (nesdev->netdev[0]) {
786 nesvnic = netdev_priv(nesdev->netdev[0]);
791 for (i=0; i<4; i++) {
792 used_chunks_mask <<= 8;
793 if (nesvnic->qp_nic_index[i] != 0xff) {
794 used_chunks_mask |= 0xff;
795 if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) {
796 chunks_tx_progress = 1;
799 temp_used_chunks_tx >>= 8;
800 temp_last_used_chunks_tx >>= 8;
802 if ((mac_tx_frames_low) || (mac_tx_frames_high) ||
803 (!(used_chunks_tx&used_chunks_mask)) ||
804 (!(nesdev->last_used_chunks_tx&used_chunks_mask)) ||
805 (chunks_tx_progress) ) {
806 nesdev->last_used_chunks_tx = used_chunks_tx;
809 nesdev->last_used_chunks_tx = used_chunks_tx;
812 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005);
814 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
816 nesdev->mac_pause_frames_sent += mac_tx_pauses;
820 tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL);
821 tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
822 tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA);
823 rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL);
824 rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG);
825 mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM);
826 mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG);
828 /* one last ditch effort to avoid a false positive */
829 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
831 nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent;
832 nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n");
837 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000);
838 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000);
839 reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
841 nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d);
843 while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
844 & 0x00000040) != 0x00000040) && (i++ < 5000)) {
848 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
849 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0);
851 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
852 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
853 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
854 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
855 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
856 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
857 if (nesadapter->OneG_Mode) {
858 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
860 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
862 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0);
863 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
865 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control);
866 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
867 nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta);
868 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control);
869 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config);
870 nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match);
871 nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug);
875 nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE;
877 nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5);
878 add_timer(&nesdev->nesadapter->mh_timer);
884 void nes_clc(unsigned long parm)
887 struct nes_device *nesdev = (struct nes_device *)parm;
888 struct nes_adapter *nesadapter = nesdev->nesadapter;
890 spin_lock_irqsave(&nesadapter->phy_lock, flags);
891 nesadapter->link_interrupt_count[0] = 0;
892 nesadapter->link_interrupt_count[1] = 0;
893 nesadapter->link_interrupt_count[2] = 0;
894 nesadapter->link_interrupt_count[3] = 0;
895 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
897 nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */
898 add_timer(&nesadapter->lc_timer);
905 void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length)
907 if (!(nes_debug_level & dump_debug_level)) {
911 if (length > 0x100) {
912 nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100);
915 nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", addr, length, length);
917 print_hex_dump(KERN_ERR, PFX, DUMP_PREFIX_NONE, 16, 1, addr, length, true);