2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 * Copyright (C) 2008 Dmitri Vorobiev
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 #include <linux/cpu.h>
20 #include <linux/init.h>
21 #include <linux/sched.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/of_fdt.h>
25 #include <linux/pci.h>
26 #include <linux/screen_info.h>
27 #include <linux/time.h>
29 #include <asm/dma-coherence.h>
30 #include <asm/fw/fw.h>
31 #include <asm/mach-malta/malta-dtshim.h>
32 #include <asm/mips-cps.h>
33 #include <asm/mips-boards/generic.h>
34 #include <asm/mips-boards/malta.h>
35 #include <asm/mips-boards/maltaint.h>
38 #include <asm/traps.h>
40 #include <linux/console.h>
43 #define ROCIT_CONFIG_GEN0 0x1f403000
44 #define ROCIT_CONFIG_GEN0_PCI_IOCU BIT(7)
46 static struct resource standard_io_resources[] = {
51 .flags = IORESOURCE_IO | IORESOURCE_BUSY
57 .flags = IORESOURCE_IO | IORESOURCE_BUSY
63 .flags = IORESOURCE_IO | IORESOURCE_BUSY
66 .name = "dma page reg",
69 .flags = IORESOURCE_IO | IORESOURCE_BUSY
75 .flags = IORESOURCE_IO | IORESOURCE_BUSY
79 const char *get_system_type(void)
84 const char display_string[] = " LINUX ON MALTA ";
86 #ifdef CONFIG_BLK_DEV_FD
87 static void __init fd_activate(void)
90 * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
92 * Done by YAMON 2.00 onwards
94 /* Entering config state. */
95 SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
97 /* Activate floppy controller. */
98 SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
99 SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
100 SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
101 SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
103 /* Exit config state. */
104 SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
108 static int __init plat_enable_iocoherency(void)
113 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
114 if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
115 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
116 pr_info("Enabled Bonito CPU coherency\n");
119 if (strstr(fw_getcmdline(), "iobcuncached")) {
120 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
121 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
122 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
123 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
124 pr_info("Disabled Bonito IOBC coherency\n");
126 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
127 BONITO_PCIMEMBASECFG |=
128 (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
129 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
130 pr_info("Enabled Bonito IOBC coherency\n");
132 } else if (mips_cps_numiocu(0) != 0) {
133 /* Nothing special needs to be done to enable coherency */
134 pr_info("CMP IOCU detected\n");
135 cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
136 if (!(cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)) {
137 pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
142 hw_coherentio = supported;
146 static void __init plat_setup_iocoherency(void)
148 if (plat_enable_iocoherency()) {
149 if (coherentio == IO_COHERENCE_DISABLED)
150 pr_info("Hardware DMA cache coherency disabled\n");
152 pr_info("Hardware DMA cache coherency enabled\n");
154 if (coherentio == IO_COHERENCE_ENABLED)
155 pr_info("Hardware DMA cache coherency unsupported, but enabled from command line!\n");
157 pr_info("Software DMA cache coherency enabled\n");
161 static void __init pci_clock_check(void)
163 unsigned int __iomem *jmpr_p =
164 (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
165 int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
166 static const int pciclocks[] __initconst = {
167 33, 20, 25, 30, 12, 16, 37, 10
169 int pciclock = pciclocks[jmpr];
170 char *optptr, *argptr = fw_getcmdline();
173 * If user passed a pci_clock= option, don't tack on another one
175 optptr = strstr(argptr, "pci_clock=");
176 if (optptr && (optptr == argptr || optptr[-1] == ' '))
179 if (pciclock != 33) {
180 pr_warn("WARNING: PCI clock is %dMHz, setting pci_clock\n",
182 argptr += strlen(argptr);
183 sprintf(argptr, " pci_clock=%d", pciclock);
184 if (pciclock < 20 || pciclock > 66)
185 pr_warn("WARNING: IDE timing calculations will be "
190 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
191 static void __init screen_info_setup(void)
193 screen_info = (struct screen_info) {
197 .orig_video_page = 0,
198 .orig_video_mode = 0,
199 .orig_video_cols = 80,
201 .orig_video_ega_bx = 0,
203 .orig_video_lines = 25,
204 .orig_video_isVGA = VIDEO_TYPE_VGAC,
205 .orig_video_points = 16
210 static void __init bonito_quirks_setup(void)
214 argptr = fw_getcmdline();
215 if (strstr(argptr, "debug")) {
216 BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
217 pr_info("Enabled Bonito debug mode\n");
219 BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
222 void __init *plat_get_fdt(void)
224 return (void *)__dtb_start;
227 void __init plat_mem_setup(void)
230 void *fdt = plat_get_fdt();
232 fdt = malta_dt_shim(fdt);
233 __dt_setup_arch(fdt);
235 if (IS_ENABLED(CONFIG_EVA))
236 /* EVA has already been configured in mach-malta/kernel-init.h */
237 pr_info("Enhanced Virtual Addressing (EVA) activated\n");
241 /* Request I/O space for devices used on the Malta board. */
242 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
243 request_resource(&ioport_resource, standard_io_resources+i);
246 * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
250 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO)
251 bonito_quirks_setup();
253 plat_setup_iocoherency();
257 #ifdef CONFIG_BLK_DEV_FD
261 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)