2 * MMU context allocation for 64-bit kernels.
4 * Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/string.h>
17 #include <linux/types.h>
19 #include <linux/pkeys.h>
20 #include <linux/spinlock.h>
21 #include <linux/idr.h>
22 #include <linux/export.h>
23 #include <linux/gfp.h>
24 #include <linux/slab.h>
26 #include <asm/mmu_context.h>
27 #include <asm/pgalloc.h>
29 static DEFINE_IDA(mmu_context_ida);
31 static int alloc_context_id(int min_id, int max_id)
33 return ida_alloc_range(&mmu_context_ida, min_id, max_id, GFP_KERNEL);
36 void hash__reserve_context_id(int id)
38 int result = ida_alloc_range(&mmu_context_ida, id, id, GFP_KERNEL);
40 WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result);
43 int hash__alloc_context_id(void)
47 if (mmu_has_feature(MMU_FTR_68_BIT_VA))
48 max = MAX_USER_CONTEXT;
50 max = MAX_USER_CONTEXT_65BIT_VA;
52 return alloc_context_id(MIN_USER_CONTEXT, max);
54 EXPORT_SYMBOL_GPL(hash__alloc_context_id);
56 static int realloc_context_ids(mm_context_t *ctx)
61 * id 0 (aka. ctx->id) is special, we always allocate a new one, even if
62 * there wasn't one allocated previously (which happens in the exec
63 * case where ctx is newly allocated).
65 * We have to be a bit careful here. We must keep the existing ids in
66 * the array, so that we can test if they're non-zero to decide if we
67 * need to allocate a new one. However in case of error we must free the
68 * ids we've allocated but *not* any of the existing ones (or risk a
69 * UAF). That's why we decrement i at the start of the error handling
70 * loop, to skip the id that we just tested but couldn't reallocate.
72 for (i = 0; i < ARRAY_SIZE(ctx->extended_id); i++) {
73 if (i == 0 || ctx->extended_id[i]) {
74 id = hash__alloc_context_id();
78 ctx->extended_id[i] = id;
82 /* The caller expects us to return id */
86 for (i--; i >= 0; i--) {
87 if (ctx->extended_id[i])
88 ida_free(&mmu_context_ida, ctx->extended_id[i]);
94 static int hash__init_new_context(struct mm_struct *mm)
99 * The old code would re-promote on fork, we don't do that when using
100 * slices as it could cause problem promoting slices that have been
103 * For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check
104 * explicitly against context.id == 0. This ensures that we properly
105 * initialize context slice details for newly allocated mm's (which will
106 * have id == 0) and don't alter context slice inherited via fork (which
107 * will have id != 0).
109 * We should not be calling init_new_context() on init_mm. Hence a
110 * check against 0 is OK.
112 if (mm->context.id == 0)
113 slice_init_new_context_exec(mm);
115 index = realloc_context_ids(&mm->context);
119 subpage_prot_init_new_context(mm);
125 static int radix__init_new_context(struct mm_struct *mm)
127 unsigned long rts_field;
130 max_id = (1 << mmu_pid_bits) - 1;
131 index = alloc_context_id(mmu_base_pid, max_id);
136 * set the process table entry,
138 rts_field = radix__get_tree_size();
139 process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE);
142 * Order the above store with subsequent update of the PID
143 * register (at which point HW can start loading/caching
144 * the entry) and the corresponding load by the MMU from
147 asm volatile("ptesync;isync" : : : "memory");
149 mm->context.npu_context = NULL;
154 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
159 index = radix__init_new_context(mm);
161 index = hash__init_new_context(mm);
166 mm->context.id = index;
168 mm->context.pte_frag = NULL;
169 mm->context.pmd_frag = NULL;
170 #ifdef CONFIG_SPAPR_TCE_IOMMU
173 atomic_set(&mm->context.active_cpus, 0);
174 atomic_set(&mm->context.copros, 0);
179 void __destroy_context(int context_id)
181 ida_free(&mmu_context_ida, context_id);
183 EXPORT_SYMBOL_GPL(__destroy_context);
185 static void destroy_contexts(mm_context_t *ctx)
187 int index, context_id;
189 for (index = 0; index < ARRAY_SIZE(ctx->extended_id); index++) {
190 context_id = ctx->extended_id[index];
192 ida_free(&mmu_context_ida, context_id);
196 static void pte_frag_destroy(void *pte_frag)
201 page = virt_to_page(pte_frag);
202 /* drop all the pending references */
203 count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
204 /* We allow PTE_FRAG_NR fragments from a PTE page */
205 if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
206 pgtable_page_dtor(page);
211 static void pmd_frag_destroy(void *pmd_frag)
216 page = virt_to_page(pmd_frag);
217 /* drop all the pending references */
218 count = ((unsigned long)pmd_frag & ~PAGE_MASK) >> PMD_FRAG_SIZE_SHIFT;
219 /* We allow PTE_FRAG_NR fragments from a PTE page */
220 if (atomic_sub_and_test(PMD_FRAG_NR - count, &page->pt_frag_refcount)) {
221 pgtable_pmd_page_dtor(page);
226 static void destroy_pagetable_cache(struct mm_struct *mm)
230 frag = mm->context.pte_frag;
232 pte_frag_destroy(frag);
234 frag = mm->context.pmd_frag;
236 pmd_frag_destroy(frag);
240 void destroy_context(struct mm_struct *mm)
242 #ifdef CONFIG_SPAPR_TCE_IOMMU
243 WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));
246 WARN_ON(process_tb[mm->context.id].prtb0 != 0);
248 subpage_prot_free(mm);
249 destroy_contexts(&mm->context);
250 mm->context.id = MMU_NO_CONTEXT;
253 void arch_exit_mmap(struct mm_struct *mm)
255 destroy_pagetable_cache(mm);
257 if (radix_enabled()) {
259 * Radix doesn't have a valid bit in the process table
260 * entries. However we know that at least P9 implementation
261 * will avoid caching an entry with an invalid RTS field,
262 * and 0 is invalid. So this will do.
264 * This runs before the "fullmm" tlb flush in exit_mmap,
265 * which does a RIC=2 tlbie to clear the process table
266 * entry. See the "fullmm" comments in tlb-radix.c.
268 * No barrier required here after the store because
269 * this process will do the invalidate, which starts with
272 process_tb[mm->context.id].prtb0 = 0;
276 #ifdef CONFIG_PPC_RADIX_MMU
277 void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
279 mtspr(SPRN_PID, next->context.id);