1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/uaccess.h>
21 #include <linux/pci.h>
22 #include <linux/pci_ids.h>
24 #include <linux/pci_regs.h>
26 #include <uapi/linux/pcitest.h>
28 #define DRV_MODULE_NAME "pci-endpoint-test"
30 #define IRQ_TYPE_UNDEFINED -1
31 #define IRQ_TYPE_LEGACY 0
32 #define IRQ_TYPE_MSI 1
33 #define IRQ_TYPE_MSIX 2
35 #define PCI_ENDPOINT_TEST_MAGIC 0x0
37 #define PCI_ENDPOINT_TEST_COMMAND 0x4
38 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
39 #define COMMAND_RAISE_MSI_IRQ BIT(1)
40 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
41 #define COMMAND_READ BIT(3)
42 #define COMMAND_WRITE BIT(4)
43 #define COMMAND_COPY BIT(5)
45 #define PCI_ENDPOINT_TEST_STATUS 0x8
46 #define STATUS_READ_SUCCESS BIT(0)
47 #define STATUS_READ_FAIL BIT(1)
48 #define STATUS_WRITE_SUCCESS BIT(2)
49 #define STATUS_WRITE_FAIL BIT(3)
50 #define STATUS_COPY_SUCCESS BIT(4)
51 #define STATUS_COPY_FAIL BIT(5)
52 #define STATUS_IRQ_RAISED BIT(6)
53 #define STATUS_SRC_ADDR_INVALID BIT(7)
54 #define STATUS_DST_ADDR_INVALID BIT(8)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
62 #define PCI_ENDPOINT_TEST_SIZE 0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
68 #define PCI_ENDPOINT_TEST_FLAGS 0x2c
69 #define FLAG_USE_DMA BIT(0)
71 #define PCI_DEVICE_ID_TI_J721E 0xb00d
72 #define PCI_DEVICE_ID_TI_AM654 0xb00c
73 #define PCI_DEVICE_ID_LS1088A 0x80c0
75 #define is_am654_pci_dev(pdev) \
76 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
78 #define PCI_DEVICE_ID_RENESAS_R8A774A1 0x0028
79 #define PCI_DEVICE_ID_RENESAS_R8A774B1 0x002b
80 #define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
81 #define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025
83 static DEFINE_IDA(pci_endpoint_test_ida);
85 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
89 module_param(no_msi, bool, 0444);
90 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
92 static int irq_type = IRQ_TYPE_MSI;
93 module_param(irq_type, int, 0444);
94 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
105 struct pci_endpoint_test {
106 struct pci_dev *pdev;
108 void __iomem *bar[PCI_STD_NUM_BARS];
109 struct completion irq_raised;
113 /* mutex to protect the ioctls */
115 struct miscdevice miscdev;
116 enum pci_barno test_reg_bar;
121 struct pci_endpoint_test_data {
122 enum pci_barno test_reg_bar;
127 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
130 return readl(test->base + offset);
133 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
134 u32 offset, u32 value)
136 writel(value, test->base + offset);
139 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
142 return readl(test->bar[bar] + offset);
145 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
146 int bar, u32 offset, u32 value)
148 writel(value, test->bar[bar] + offset);
151 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
153 struct pci_endpoint_test *test = dev_id;
156 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
157 if (reg & STATUS_IRQ_RAISED) {
158 test->last_irq = irq;
159 complete(&test->irq_raised);
160 reg &= ~STATUS_IRQ_RAISED;
162 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
168 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
170 struct pci_dev *pdev = test->pdev;
172 pci_free_irq_vectors(pdev);
173 test->irq_type = IRQ_TYPE_UNDEFINED;
176 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
180 struct pci_dev *pdev = test->pdev;
181 struct device *dev = &pdev->dev;
185 case IRQ_TYPE_LEGACY:
186 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
188 dev_err(dev, "Failed to get Legacy interrupt\n");
191 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
193 dev_err(dev, "Failed to get MSI interrupts\n");
196 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
198 dev_err(dev, "Failed to get MSI-X interrupts\n");
201 dev_err(dev, "Invalid IRQ type selected\n");
209 test->irq_type = type;
210 test->num_irqs = irq;
215 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
218 struct pci_dev *pdev = test->pdev;
219 struct device *dev = &pdev->dev;
221 for (i = 0; i < test->num_irqs; i++)
222 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
227 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
231 struct pci_dev *pdev = test->pdev;
232 struct device *dev = &pdev->dev;
234 for (i = 0; i < test->num_irqs; i++) {
235 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
236 pci_endpoint_test_irqhandler,
237 IRQF_SHARED, test->name, test);
246 case IRQ_TYPE_LEGACY:
247 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
248 pci_irq_vector(pdev, i));
251 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
252 pci_irq_vector(pdev, i),
256 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
257 pci_irq_vector(pdev, i),
265 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
266 enum pci_barno barno)
271 struct pci_dev *pdev = test->pdev;
273 if (!test->bar[barno])
276 size = pci_resource_len(pdev, barno);
278 if (barno == test->test_reg_bar)
281 for (j = 0; j < size; j += 4)
282 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
284 for (j = 0; j < size; j += 4) {
285 val = pci_endpoint_test_bar_readl(test, barno, j);
286 if (val != 0xA0A0A0A0)
293 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
297 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
299 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
300 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
301 COMMAND_RAISE_LEGACY_IRQ);
302 val = wait_for_completion_timeout(&test->irq_raised,
303 msecs_to_jiffies(1000));
310 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
311 u16 msi_num, bool msix)
314 struct pci_dev *pdev = test->pdev;
316 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
317 msix == false ? IRQ_TYPE_MSI :
319 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
320 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
321 msix == false ? COMMAND_RAISE_MSI_IRQ :
322 COMMAND_RAISE_MSIX_IRQ);
323 val = wait_for_completion_timeout(&test->irq_raised,
324 msecs_to_jiffies(1000));
328 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
334 static int pci_endpoint_test_validate_xfer_params(struct device *dev,
335 struct pci_endpoint_test_xfer_param *param, size_t alignment)
338 dev_dbg(dev, "Data size is zero\n");
342 if (param->size > SIZE_MAX - alignment) {
343 dev_dbg(dev, "Maximum transfer data size exceeded\n");
350 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
353 struct pci_endpoint_test_xfer_param param;
360 dma_addr_t src_phys_addr;
361 dma_addr_t dst_phys_addr;
362 struct pci_dev *pdev = test->pdev;
363 struct device *dev = &pdev->dev;
365 dma_addr_t orig_src_phys_addr;
367 dma_addr_t orig_dst_phys_addr;
369 size_t alignment = test->alignment;
370 int irq_type = test->irq_type;
375 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
377 dev_err(dev, "Failed to get transfer param\n");
381 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
387 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
389 flags |= FLAG_USE_DMA;
391 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
392 dev_err(dev, "Invalid IRQ type option\n");
396 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
397 if (!orig_src_addr) {
398 dev_err(dev, "Failed to allocate source buffer\n");
403 get_random_bytes(orig_src_addr, size + alignment);
404 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
405 size + alignment, DMA_TO_DEVICE);
406 if (dma_mapping_error(dev, orig_src_phys_addr)) {
407 dev_err(dev, "failed to map source buffer address\n");
409 goto err_src_phys_addr;
412 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
413 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
414 offset = src_phys_addr - orig_src_phys_addr;
415 src_addr = orig_src_addr + offset;
417 src_phys_addr = orig_src_phys_addr;
418 src_addr = orig_src_addr;
421 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
422 lower_32_bits(src_phys_addr));
424 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
425 upper_32_bits(src_phys_addr));
427 src_crc32 = crc32_le(~0, src_addr, size);
429 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
430 if (!orig_dst_addr) {
431 dev_err(dev, "Failed to allocate destination address\n");
436 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
437 size + alignment, DMA_FROM_DEVICE);
438 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
439 dev_err(dev, "failed to map destination buffer address\n");
441 goto err_dst_phys_addr;
444 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
445 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
446 offset = dst_phys_addr - orig_dst_phys_addr;
447 dst_addr = orig_dst_addr + offset;
449 dst_phys_addr = orig_dst_phys_addr;
450 dst_addr = orig_dst_addr;
453 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
454 lower_32_bits(dst_phys_addr));
455 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
456 upper_32_bits(dst_phys_addr));
458 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
461 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
462 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
463 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
464 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
467 wait_for_completion(&test->irq_raised);
469 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
472 dst_crc32 = crc32_le(~0, dst_addr, size);
473 if (dst_crc32 == src_crc32)
477 kfree(orig_dst_addr);
480 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
484 kfree(orig_src_addr);
490 static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
493 struct pci_endpoint_test_xfer_param param;
499 dma_addr_t phys_addr;
500 struct pci_dev *pdev = test->pdev;
501 struct device *dev = &pdev->dev;
503 dma_addr_t orig_phys_addr;
505 size_t alignment = test->alignment;
506 int irq_type = test->irq_type;
511 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
513 dev_err(dev, "Failed to get transfer param\n");
517 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
523 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
525 flags |= FLAG_USE_DMA;
527 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
528 dev_err(dev, "Invalid IRQ type option\n");
532 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
534 dev_err(dev, "Failed to allocate address\n");
539 get_random_bytes(orig_addr, size + alignment);
541 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
543 if (dma_mapping_error(dev, orig_phys_addr)) {
544 dev_err(dev, "failed to map source buffer address\n");
549 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
550 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
551 offset = phys_addr - orig_phys_addr;
552 addr = orig_addr + offset;
554 phys_addr = orig_phys_addr;
558 crc32 = crc32_le(~0, addr, size);
559 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
562 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
563 lower_32_bits(phys_addr));
564 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
565 upper_32_bits(phys_addr));
567 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
569 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
570 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
571 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
572 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
575 wait_for_completion(&test->irq_raised);
577 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
578 if (reg & STATUS_READ_SUCCESS)
581 dma_unmap_single(dev, orig_phys_addr, size + alignment,
591 static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
594 struct pci_endpoint_test_xfer_param param;
600 dma_addr_t phys_addr;
601 struct pci_dev *pdev = test->pdev;
602 struct device *dev = &pdev->dev;
604 dma_addr_t orig_phys_addr;
606 size_t alignment = test->alignment;
607 int irq_type = test->irq_type;
611 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
613 dev_err(dev, "Failed to get transfer param\n");
617 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
623 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
625 flags |= FLAG_USE_DMA;
627 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
628 dev_err(dev, "Invalid IRQ type option\n");
632 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
634 dev_err(dev, "Failed to allocate destination address\n");
639 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
641 if (dma_mapping_error(dev, orig_phys_addr)) {
642 dev_err(dev, "failed to map source buffer address\n");
647 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
648 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
649 offset = phys_addr - orig_phys_addr;
650 addr = orig_addr + offset;
652 phys_addr = orig_phys_addr;
656 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
657 lower_32_bits(phys_addr));
658 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
659 upper_32_bits(phys_addr));
661 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
663 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
664 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
665 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
666 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
669 wait_for_completion(&test->irq_raised);
671 dma_unmap_single(dev, orig_phys_addr, size + alignment,
674 crc32 = crc32_le(~0, addr, size);
675 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
684 static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
686 pci_endpoint_test_release_irq(test);
687 pci_endpoint_test_free_irq_vectors(test);
691 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
694 struct pci_dev *pdev = test->pdev;
695 struct device *dev = &pdev->dev;
697 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
698 dev_err(dev, "Invalid IRQ type option\n");
702 if (test->irq_type == req_irq_type)
705 pci_endpoint_test_release_irq(test);
706 pci_endpoint_test_free_irq_vectors(test);
708 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
711 if (!pci_endpoint_test_request_irq(test))
717 pci_endpoint_test_free_irq_vectors(test);
721 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
726 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
727 struct pci_dev *pdev = test->pdev;
729 mutex_lock(&test->mutex);
733 if (bar < 0 || bar > 5)
735 if (is_am654_pci_dev(pdev) && bar == BAR_0)
737 ret = pci_endpoint_test_bar(test, bar);
739 case PCITEST_LEGACY_IRQ:
740 ret = pci_endpoint_test_legacy_irq(test);
744 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
747 ret = pci_endpoint_test_write(test, arg);
750 ret = pci_endpoint_test_read(test, arg);
753 ret = pci_endpoint_test_copy(test, arg);
755 case PCITEST_SET_IRQTYPE:
756 ret = pci_endpoint_test_set_irq(test, arg);
758 case PCITEST_GET_IRQTYPE:
761 case PCITEST_CLEAR_IRQ:
762 ret = pci_endpoint_test_clear_irq(test);
767 mutex_unlock(&test->mutex);
771 static const struct file_operations pci_endpoint_test_fops = {
772 .owner = THIS_MODULE,
773 .unlocked_ioctl = pci_endpoint_test_ioctl,
776 static int pci_endpoint_test_probe(struct pci_dev *pdev,
777 const struct pci_device_id *ent)
784 struct device *dev = &pdev->dev;
785 struct pci_endpoint_test *test;
786 struct pci_endpoint_test_data *data;
787 enum pci_barno test_reg_bar = BAR_0;
788 struct miscdevice *misc_device;
790 if (pci_is_bridge(pdev))
793 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
797 test->test_reg_bar = 0;
800 test->irq_type = IRQ_TYPE_UNDEFINED;
803 irq_type = IRQ_TYPE_LEGACY;
805 data = (struct pci_endpoint_test_data *)ent->driver_data;
807 test_reg_bar = data->test_reg_bar;
808 test->test_reg_bar = test_reg_bar;
809 test->alignment = data->alignment;
810 irq_type = data->irq_type;
813 init_completion(&test->irq_raised);
814 mutex_init(&test->mutex);
816 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
817 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
818 dev_err(dev, "Cannot set DMA mask\n");
822 err = pci_enable_device(pdev);
824 dev_err(dev, "Cannot enable PCI device\n");
828 err = pci_request_regions(pdev, DRV_MODULE_NAME);
830 dev_err(dev, "Cannot obtain PCI resources\n");
831 goto err_disable_pdev;
834 pci_set_master(pdev);
836 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type)) {
838 goto err_disable_irq;
841 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
842 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
843 base = pci_ioremap_bar(pdev, bar);
845 dev_err(dev, "Failed to read BAR%d\n", bar);
846 WARN_ON(bar == test_reg_bar);
848 test->bar[bar] = base;
852 test->base = test->bar[test_reg_bar];
855 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
860 pci_set_drvdata(pdev, test);
862 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
865 dev_err(dev, "Unable to get id\n");
869 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
870 test->name = kstrdup(name, GFP_KERNEL);
876 if (!pci_endpoint_test_request_irq(test)) {
878 goto err_kfree_test_name;
881 misc_device = &test->miscdev;
882 misc_device->minor = MISC_DYNAMIC_MINOR;
883 misc_device->name = kstrdup(name, GFP_KERNEL);
884 if (!misc_device->name) {
886 goto err_release_irq;
888 misc_device->fops = &pci_endpoint_test_fops,
890 err = misc_register(misc_device);
892 dev_err(dev, "Failed to register device\n");
899 kfree(misc_device->name);
902 pci_endpoint_test_release_irq(test);
908 ida_simple_remove(&pci_endpoint_test_ida, id);
911 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
913 pci_iounmap(pdev, test->bar[bar]);
917 pci_endpoint_test_free_irq_vectors(test);
918 pci_release_regions(pdev);
921 pci_disable_device(pdev);
926 static void pci_endpoint_test_remove(struct pci_dev *pdev)
930 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
931 struct miscdevice *misc_device = &test->miscdev;
933 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
938 misc_deregister(&test->miscdev);
939 kfree(misc_device->name);
941 ida_simple_remove(&pci_endpoint_test_ida, id);
942 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
944 pci_iounmap(pdev, test->bar[bar]);
947 pci_endpoint_test_release_irq(test);
948 pci_endpoint_test_free_irq_vectors(test);
950 pci_release_regions(pdev);
951 pci_disable_device(pdev);
954 static const struct pci_endpoint_test_data default_data = {
955 .test_reg_bar = BAR_0,
957 .irq_type = IRQ_TYPE_MSI,
960 static const struct pci_endpoint_test_data am654_data = {
961 .test_reg_bar = BAR_2,
963 .irq_type = IRQ_TYPE_MSI,
966 static const struct pci_endpoint_test_data j721e_data = {
968 .irq_type = IRQ_TYPE_MSI,
971 static const struct pci_device_id pci_endpoint_test_tbl[] = {
972 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
973 .driver_data = (kernel_ulong_t)&default_data,
975 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
976 .driver_data = (kernel_ulong_t)&default_data,
978 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
979 .driver_data = (kernel_ulong_t)&default_data,
981 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A),
982 .driver_data = (kernel_ulong_t)&default_data,
984 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
985 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
986 .driver_data = (kernel_ulong_t)&am654_data
988 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774A1),},
989 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
990 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
991 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
992 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
993 .driver_data = (kernel_ulong_t)&j721e_data,
997 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
999 static struct pci_driver pci_endpoint_test_driver = {
1000 .name = DRV_MODULE_NAME,
1001 .id_table = pci_endpoint_test_tbl,
1002 .probe = pci_endpoint_test_probe,
1003 .remove = pci_endpoint_test_remove,
1005 module_pci_driver(pci_endpoint_test_driver);
1007 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
1008 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
1009 MODULE_LICENSE("GPL v2");