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[releases.git] / microblaze / kernel / process.c
1 /*
2  * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3  * Copyright (C) 2008-2009 PetaLogix
4  * Copyright (C) 2006 Atmark Techno, Inc.
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License. See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10
11 #include <linux/cpu.h>
12 #include <linux/export.h>
13 #include <linux/sched.h>
14 #include <linux/sched/debug.h>
15 #include <linux/sched/task.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/pm.h>
18 #include <linux/tick.h>
19 #include <linux/bitops.h>
20 #include <linux/ptrace.h>
21 #include <asm/cacheflush.h>
22
23 void show_regs(struct pt_regs *regs)
24 {
25         show_regs_print_info(KERN_INFO);
26
27         pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
28         pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
29                                 regs->r1, regs->r2, regs->r3, regs->r4);
30         pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
31                                 regs->r5, regs->r6, regs->r7, regs->r8);
32         pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
33                                 regs->r9, regs->r10, regs->r11, regs->r12);
34         pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
35                                 regs->r13, regs->r14, regs->r15, regs->r16);
36         pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
37                                 regs->r17, regs->r18, regs->r19, regs->r20);
38         pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
39                                 regs->r21, regs->r22, regs->r23, regs->r24);
40         pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
41                                 regs->r25, regs->r26, regs->r27, regs->r28);
42         pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
43                                 regs->r29, regs->r30, regs->r31, regs->pc);
44         pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
45                                 regs->msr, regs->ear, regs->esr, regs->fsr);
46 }
47
48 void (*pm_power_off)(void) = NULL;
49 EXPORT_SYMBOL(pm_power_off);
50
51 void flush_thread(void)
52 {
53 }
54
55 int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
56 {
57         unsigned long clone_flags = args->flags;
58         unsigned long usp = args->stack;
59         unsigned long tls = args->tls;
60         struct pt_regs *childregs = task_pt_regs(p);
61         struct thread_info *ti = task_thread_info(p);
62
63         if (unlikely(args->fn)) {
64                 /* if we're creating a new kernel thread then just zeroing all
65                  * the registers. That's OK for a brand new thread.*/
66                 memset(childregs, 0, sizeof(struct pt_regs));
67                 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
68                 ti->cpu_context.r1  = (unsigned long)childregs;
69                 ti->cpu_context.r20 = (unsigned long)args->fn;
70                 ti->cpu_context.r19 = (unsigned long)args->fn_arg;
71                 childregs->pt_mode = 1;
72                 local_save_flags(childregs->msr);
73                 ti->cpu_context.msr = childregs->msr & ~MSR_IE;
74                 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
75                 return 0;
76         }
77         *childregs = *current_pt_regs();
78         if (usp)
79                 childregs->r1 = usp;
80
81         memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
82         ti->cpu_context.r1 = (unsigned long)childregs;
83         childregs->msr |= MSR_UMS;
84
85         /* we should consider the fact that childregs is a copy of the parent
86          * regs which were saved immediately after entering the kernel state
87          * before enabling VM. This MSR will be restored in switch_to and
88          * RETURN() and we want to have the right machine state there
89          * specifically this state must have INTs disabled before and enabled
90          * after performing rtbd
91          * compose the right MSR for RETURN(). It will work for switch_to also
92          * excepting for VM and UMS
93          * don't touch UMS , CARRY and cache bits
94          * right now MSR is a copy of parent one */
95         childregs->msr &= ~MSR_EIP;
96         childregs->msr |= MSR_IE;
97         childregs->msr &= ~MSR_VM;
98         childregs->msr |= MSR_VMS;
99         childregs->msr |= MSR_EE; /* exceptions will be enabled*/
100
101         ti->cpu_context.msr = (childregs->msr|MSR_VM);
102         ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
103         ti->cpu_context.msr &= ~MSR_IE;
104         ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
105
106         /*
107          *  r21 is the thread reg, r10 is 6th arg to clone
108          *  which contains TLS area
109          */
110         if (clone_flags & CLONE_SETTLS)
111                 childregs->r21 = tls;
112
113         return 0;
114 }
115
116 unsigned long __get_wchan(struct task_struct *p)
117 {
118 /* TBD (used by procfs) */
119         return 0;
120 }
121
122 /* Set up a thread for executing a new program */
123 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
124 {
125         regs->pc = pc;
126         regs->r1 = usp;
127         regs->pt_mode = 0;
128         regs->msr |= MSR_UMS;
129         regs->msr &= ~MSR_VM;
130 }
131
132 #include <linux/elfcore.h>
133 /*
134  * Set up a thread for executing a new program
135  */
136 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
137 {
138         return 0; /* MicroBlaze has no separate FPU registers */
139 }
140
141 void arch_cpu_idle(void)
142 {
143        raw_local_irq_enable();
144 }