2 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __MDP5_CFG_H__
15 #define __MDP5_CFG_H__
22 * This module configures the dynamic offsets used by mdp5.xml.h
23 * (initialized in mdp5_cfg.c)
25 extern const struct mdp5_cfg_hw *mdp5_cfg;
29 #define MAX_SMP_BLOCKS 44
30 #define MAX_CLIENTS 32
32 typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS);
34 #define MDP5_SUB_BLOCK_DEFINITION \
36 uint32_t base[MAX_BASES]
38 struct mdp5_sub_block {
39 MDP5_SUB_BLOCK_DEFINITION;
42 struct mdp5_lm_instance {
49 struct mdp5_lm_block {
50 MDP5_SUB_BLOCK_DEFINITION;
51 struct mdp5_lm_instance instances[MAX_BASES];
52 uint32_t nb_stages; /* number of stages per blender */
53 uint32_t max_width; /* Maximum output resolution */
57 struct mdp5_pipe_block {
58 MDP5_SUB_BLOCK_DEFINITION;
59 uint32_t caps; /* pipe capabilities */
62 struct mdp5_ctl_block {
63 MDP5_SUB_BLOCK_DEFINITION;
64 uint32_t flush_hw_mask; /* FLUSH register's hardware mask */
67 struct mdp5_smp_block {
68 int mmb_count; /* number of SMP MMBs */
69 int mmb_size; /* MMB: size in bytes */
70 uint32_t clients[MAX_CLIENTS]; /* SMP port allocation /pipe */
71 mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
72 uint8_t reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */
75 struct mdp5_mdp_block {
76 MDP5_SUB_BLOCK_DEFINITION;
77 uint32_t caps; /* MDP capabilities: MDP_CAP_xxx bits */
80 #define MDP5_INTF_NUM_MAX 5
82 struct mdp5_intf_block {
83 uint32_t base[MAX_BASES];
84 u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
90 struct mdp5_mdp_block mdp;
91 struct mdp5_smp_block smp;
92 struct mdp5_ctl_block ctl;
93 struct mdp5_pipe_block pipe_vig;
94 struct mdp5_pipe_block pipe_rgb;
95 struct mdp5_pipe_block pipe_dma;
96 struct mdp5_pipe_block pipe_cursor;
97 struct mdp5_lm_block lm;
98 struct mdp5_sub_block dspp;
99 struct mdp5_sub_block ad;
100 struct mdp5_sub_block pp;
101 struct mdp5_sub_block dsc;
102 struct mdp5_sub_block cdm;
103 struct mdp5_intf_block intf;
108 /* platform config data (ie. from DT, or pdata) */
109 struct mdp5_cfg_platform {
110 struct iommu_domain *iommu;
114 const struct mdp5_cfg_hw *hw;
115 struct mdp5_cfg_platform platform;
119 struct mdp5_cfg_handler;
121 const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd);
122 struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
123 int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);
125 #define mdp5_cfg_intf_is_virtual(intf_type) ({ \
126 typeof(intf_type) __val = (intf_type); \
127 (__val) >= INTF_VIRTUAL ? true : false; })
129 struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms,
130 uint32_t major, uint32_t minor);
131 void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);
133 #endif /* __MDP5_CFG_H__ */