1 // SPDX-License-Identifier: GPL-2.0
2 /***************************************************************************/
5 * m5272.c -- platform support for ColdFire 5272 based boards
7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
8 * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
11 /***************************************************************************/
13 #include <linux/clkdev.h>
14 #include <linux/kernel.h>
15 #include <linux/param.h>
16 #include <linux/init.h>
18 #include <linux/phy.h>
19 #include <linux/phy_fixed.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/mcfsim.h>
23 #include <asm/mcfuart.h>
24 #include <asm/mcfclk.h>
26 /***************************************************************************/
29 * Some platforms need software versions of the GPIO data registers.
31 unsigned short ppdata;
32 unsigned char ledbank = 0xff;
34 /***************************************************************************/
36 DEFINE_CLK(pll, "pll.0", MCF_CLK);
37 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
39 static struct clk_lookup m5272_clk_lookup[] = {
40 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
41 CLKDEV_INIT(NULL, "sys.0", &clk_sys),
42 CLKDEV_INIT("mcftmr.0", NULL, &clk_sys),
43 CLKDEV_INIT("mcftmr.1", NULL, &clk_sys),
44 CLKDEV_INIT("mcftmr.2", NULL, &clk_sys),
45 CLKDEV_INIT("mcftmr.3", NULL, &clk_sys),
46 CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
47 CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),
48 CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
49 CLKDEV_INIT("fec.0", NULL, &clk_sys),
52 /***************************************************************************/
54 static void __init m5272_uarts_init(void)
58 /* Enable the output lines for the serial ports */
59 v = readl(MCFSIM_PBCNT);
60 v = (v & ~0x000000ff) | 0x00000055;
61 writel(v, MCFSIM_PBCNT);
63 v = readl(MCFSIM_PDCNT);
64 v = (v & ~0x000003fc) | 0x000002a8;
65 writel(v, MCFSIM_PDCNT);
68 /***************************************************************************/
70 static void m5272_cpu_reset(void)
73 /* Set watchdog to reset, and enabled */
74 __raw_writew(0, MCFSIM_WIRR);
75 __raw_writew(1, MCFSIM_WRRR);
76 __raw_writew(0, MCFSIM_WCR);
78 /* wait for watchdog to timeout */;
81 /***************************************************************************/
83 void __init config_BSP(char *commandp, int size)
85 #if defined (CONFIG_MOD5272)
86 /* Set base of device vectors to be 64 */
87 writeb(0x40, MCFSIM_PIVR);
90 #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
91 /* Copy command line from FLASH to local buffer... */
92 memcpy(commandp, (char *) 0xf0004000, size);
94 #elif defined(CONFIG_CANCam)
95 /* Copy command line from FLASH to local buffer... */
96 memcpy(commandp, (char *) 0xf0010000, size);
100 mach_reset = m5272_cpu_reset;
101 mach_sched_init = hw_timer_init;
104 /***************************************************************************/
107 * Some 5272 based boards have the FEC ethernet directly connected to
108 * an ethernet switch. In this case we need to use the fixed phy type,
109 * and we need to declare it early in boot.
111 static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
117 /***************************************************************************/
119 static int __init init_BSP(void)
122 fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
123 clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup));
127 arch_initcall(init_BSP);
129 /***************************************************************************/