1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K series chips, as the primary package interrupt controller which
15 can route local I/O interrupt to interrupt lines of cores.
16 Be aware of the following points.
17 1.The Loongson-2K0500 is a single core CPU;
18 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
19 need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
23 - $ref: /schemas/interrupt-controller.yaml#
28 - loongson,liointc-1.0
29 - loongson,liointc-1.0a
30 - loongson,liointc-2.0
43 interrupt-controller: true
47 Interrupt source of the CPU interrupts.
52 description: List of names for the parent interrupts.
61 loongson,parent_int_map:
63 This property points how the children interrupts will be mapped into CPU
64 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
65 and each bit in the cell refers to a child interrupt from 0 to 31.
66 If a CPU interrupt line didn't connect with liointc, then keep its
68 $ref: /schemas/types.yaml#/definitions/uint32-array
77 - interrupt-controller
79 - loongson,parent_int_map
82 unevaluatedProperties: false
89 - loongson,liointc-2.0
107 iointc: interrupt-controller@3ff01400 {
108 compatible = "loongson,liointc-1.0";
109 reg = <0x3ff01400 0x64>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
114 interrupt-parent = <&cpuintc>;
115 interrupts = <2>, <3>;
116 interrupt-names = "int0", "int1";
118 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
119 <0x0f000000>, /* int1 */
120 <0x00000000>, /* int2 */
121 <0x00000000>; /* int3 */