2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-mapping.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
35 #include <linux/mem_encrypt.h>
40 #include <linux/init.h>
41 #include <linux/bootmem.h>
42 #include <linux/iommu-helper.h>
44 #define CREATE_TRACE_POINTS
45 #include <trace/events/swiotlb.h>
47 #define OFFSET(val,align) ((unsigned long) \
48 ( (val) & ( (align) - 1)))
50 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
53 * Minimum IO TLB size to bother booting with. Systems with mainly
54 * 64bit capable cards will only lightly use the swiotlb. If we can't
55 * allocate a contiguous 1MB, we're probably in trouble anyway.
57 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
59 enum swiotlb_force swiotlb_force;
62 * Used to do a quick range check in swiotlb_tbl_unmap_single and
63 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
66 static phys_addr_t io_tlb_start, io_tlb_end;
69 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
70 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 static unsigned long io_tlb_nslabs;
75 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 static unsigned long io_tlb_overflow = 32*1024;
79 static phys_addr_t io_tlb_overflow_buffer;
82 * This is a free list describing the number of free entries available from
85 static unsigned int *io_tlb_list;
86 static unsigned int io_tlb_index;
89 * Max segment that we can provide which (if pages are contingous) will
90 * not be bounced (unless SWIOTLB_FORCE is set).
92 unsigned int max_segment;
95 * We need to save away the original address corresponding to a mapped entry
96 * for the sync operations.
98 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
99 static phys_addr_t *io_tlb_orig_addr;
102 * Protect the above data structures in the map and unmap calls
104 static DEFINE_SPINLOCK(io_tlb_lock);
106 static int late_alloc;
109 setup_io_tlb_npages(char *str)
112 io_tlb_nslabs = simple_strtoul(str, &str, 0);
113 /* avoid tail segment of size < IO_TLB_SEGSIZE */
114 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 if (!strcmp(str, "force")) {
119 swiotlb_force = SWIOTLB_FORCE;
120 } else if (!strcmp(str, "noforce")) {
121 swiotlb_force = SWIOTLB_NO_FORCE;
127 early_param("swiotlb", setup_io_tlb_npages);
128 /* make io_tlb_overflow tunable too? */
130 unsigned long swiotlb_nr_tbl(void)
132 return io_tlb_nslabs;
134 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
136 unsigned int swiotlb_max_segment(void)
140 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
142 void swiotlb_set_max_segment(unsigned int val)
144 if (swiotlb_force == SWIOTLB_FORCE)
147 max_segment = rounddown(val, PAGE_SIZE);
150 /* default to 64MB */
151 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
152 unsigned long swiotlb_size_or_default(void)
156 size = io_tlb_nslabs << IO_TLB_SHIFT;
158 return size ? size : (IO_TLB_DEFAULT_SIZE);
161 void __weak swiotlb_set_mem_attributes(void *vaddr, unsigned long size) { }
163 /* For swiotlb, clear memory encryption mask from dma addresses */
164 static dma_addr_t swiotlb_phys_to_dma(struct device *hwdev,
167 return __sme_clr(phys_to_dma(hwdev, address));
170 /* Note that this doesn't work with highmem page */
171 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
172 volatile void *address)
174 return phys_to_dma(hwdev, virt_to_phys(address));
177 static bool no_iotlb_memory;
179 void swiotlb_print_info(void)
181 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
183 if (no_iotlb_memory) {
184 pr_warn("No low mem\n");
188 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
189 (unsigned long long)io_tlb_start,
190 (unsigned long long)io_tlb_end,
195 * Early SWIOTLB allocation may be too early to allow an architecture to
196 * perform the desired operations. This function allows the architecture to
197 * call SWIOTLB when the operations are possible. It needs to be called
198 * before the SWIOTLB memory is used.
200 void __init swiotlb_update_mem_attributes(void)
205 if (no_iotlb_memory || late_alloc)
208 vaddr = phys_to_virt(io_tlb_start);
209 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
210 swiotlb_set_mem_attributes(vaddr, bytes);
211 memset(vaddr, 0, bytes);
213 vaddr = phys_to_virt(io_tlb_overflow_buffer);
214 bytes = PAGE_ALIGN(io_tlb_overflow);
215 swiotlb_set_mem_attributes(vaddr, bytes);
216 memset(vaddr, 0, bytes);
219 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
221 void *v_overflow_buffer;
222 unsigned long i, bytes;
224 bytes = nslabs << IO_TLB_SHIFT;
226 io_tlb_nslabs = nslabs;
227 io_tlb_start = __pa(tlb);
228 io_tlb_end = io_tlb_start + bytes;
231 * Get the overflow emergency buffer
233 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
234 PAGE_ALIGN(io_tlb_overflow),
236 if (!v_overflow_buffer)
239 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
242 * Allocate and initialize the free list array. This array is used
243 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
244 * between io_tlb_start and io_tlb_end.
246 io_tlb_list = memblock_virt_alloc(
247 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
249 io_tlb_orig_addr = memblock_virt_alloc(
250 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
252 for (i = 0; i < io_tlb_nslabs; i++) {
253 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
254 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
257 no_iotlb_memory = false;
260 swiotlb_print_info();
262 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
267 * Statically reserve bounce buffer space and initialize bounce buffer data
268 * structures for the software IO TLB used to implement the DMA API.
271 swiotlb_init(int verbose)
273 size_t default_size = IO_TLB_DEFAULT_SIZE;
274 unsigned char *vstart;
277 if (!io_tlb_nslabs) {
278 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
279 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
282 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
284 /* Get IO TLB memory from the low pages */
285 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
286 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
290 memblock_free_early(io_tlb_start,
291 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
294 pr_warn("Cannot allocate buffer");
295 no_iotlb_memory = true;
299 * Systems with larger DMA zones (those that don't support ISA) can
300 * initialize the swiotlb later using the slab allocator if needed.
301 * This should be just like above, but with some error catching.
304 swiotlb_late_init_with_default_size(size_t default_size)
306 unsigned long bytes, req_nslabs = io_tlb_nslabs;
307 unsigned char *vstart = NULL;
311 if (!io_tlb_nslabs) {
312 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
313 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
317 * Get IO TLB memory from the low pages
319 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
320 io_tlb_nslabs = SLABS_PER_PAGE << order;
321 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
323 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
324 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
332 io_tlb_nslabs = req_nslabs;
335 if (order != get_order(bytes)) {
336 pr_warn("only able to allocate %ld MB\n",
337 (PAGE_SIZE << order) >> 20);
338 io_tlb_nslabs = SLABS_PER_PAGE << order;
340 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
342 free_pages((unsigned long)vstart, order);
348 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
350 unsigned long i, bytes;
351 unsigned char *v_overflow_buffer;
353 bytes = nslabs << IO_TLB_SHIFT;
355 io_tlb_nslabs = nslabs;
356 io_tlb_start = virt_to_phys(tlb);
357 io_tlb_end = io_tlb_start + bytes;
359 swiotlb_set_mem_attributes(tlb, bytes);
360 memset(tlb, 0, bytes);
363 * Get the overflow emergency buffer
365 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
366 get_order(io_tlb_overflow));
367 if (!v_overflow_buffer)
370 swiotlb_set_mem_attributes(v_overflow_buffer, io_tlb_overflow);
371 memset(v_overflow_buffer, 0, io_tlb_overflow);
372 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
375 * Allocate and initialize the free list array. This array is used
376 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
377 * between io_tlb_start and io_tlb_end.
379 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
380 get_order(io_tlb_nslabs * sizeof(int)));
384 io_tlb_orig_addr = (phys_addr_t *)
385 __get_free_pages(GFP_KERNEL,
386 get_order(io_tlb_nslabs *
387 sizeof(phys_addr_t)));
388 if (!io_tlb_orig_addr)
391 for (i = 0; i < io_tlb_nslabs; i++) {
392 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
393 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
396 no_iotlb_memory = false;
398 swiotlb_print_info();
402 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
407 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
411 free_pages((unsigned long)v_overflow_buffer,
412 get_order(io_tlb_overflow));
413 io_tlb_overflow_buffer = 0;
422 void __init swiotlb_free(void)
424 if (!io_tlb_orig_addr)
428 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
429 get_order(io_tlb_overflow));
430 free_pages((unsigned long)io_tlb_orig_addr,
431 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
432 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
434 free_pages((unsigned long)phys_to_virt(io_tlb_start),
435 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
437 memblock_free_late(io_tlb_overflow_buffer,
438 PAGE_ALIGN(io_tlb_overflow));
439 memblock_free_late(__pa(io_tlb_orig_addr),
440 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
441 memblock_free_late(__pa(io_tlb_list),
442 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
443 memblock_free_late(io_tlb_start,
444 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
450 int is_swiotlb_buffer(phys_addr_t paddr)
452 return paddr >= io_tlb_start && paddr < io_tlb_end;
456 * Bounce: copy the swiotlb buffer back to the original dma location
458 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
459 size_t size, enum dma_data_direction dir)
461 unsigned long pfn = PFN_DOWN(orig_addr);
462 unsigned char *vaddr = phys_to_virt(tlb_addr);
464 if (PageHighMem(pfn_to_page(pfn))) {
465 /* The buffer does not have a mapping. Map it in and copy */
466 unsigned int offset = orig_addr & ~PAGE_MASK;
472 sz = min_t(size_t, PAGE_SIZE - offset, size);
474 local_irq_save(flags);
475 buffer = kmap_atomic(pfn_to_page(pfn));
476 if (dir == DMA_TO_DEVICE)
477 memcpy(vaddr, buffer + offset, sz);
479 memcpy(buffer + offset, vaddr, sz);
480 kunmap_atomic(buffer);
481 local_irq_restore(flags);
488 } else if (dir == DMA_TO_DEVICE) {
489 memcpy(vaddr, phys_to_virt(orig_addr), size);
491 memcpy(phys_to_virt(orig_addr), vaddr, size);
495 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
496 dma_addr_t tbl_dma_addr,
497 phys_addr_t orig_addr, size_t size,
498 enum dma_data_direction dir,
502 phys_addr_t tlb_addr;
503 unsigned int nslots, stride, index, wrap;
506 unsigned long offset_slots;
507 unsigned long max_slots;
510 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
513 pr_warn_once("SME is active and system is using DMA bounce buffers\n");
515 mask = dma_get_seg_boundary(hwdev);
517 tbl_dma_addr &= mask;
519 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
522 * Carefully handle integer overflow which can occur when mask == ~0UL.
525 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
526 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
529 * For mappings greater than or equal to a page, we limit the stride
530 * (and hence alignment) to a page size.
532 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
533 if (size >= PAGE_SIZE)
534 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
541 * Find suitable number of IO TLB entries size that will fit this
542 * request and allocate a buffer from that IO TLB pool.
544 spin_lock_irqsave(&io_tlb_lock, flags);
545 index = ALIGN(io_tlb_index, stride);
546 if (index >= io_tlb_nslabs)
551 while (iommu_is_span_boundary(index, nslots, offset_slots,
554 if (index >= io_tlb_nslabs)
561 * If we find a slot that indicates we have 'nslots' number of
562 * contiguous buffers, we allocate the buffers from that slot
563 * and mark the entries as '0' indicating unavailable.
565 if (io_tlb_list[index] >= nslots) {
568 for (i = index; i < (int) (index + nslots); i++)
570 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
571 io_tlb_list[i] = ++count;
572 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
575 * Update the indices to avoid searching in the next
578 io_tlb_index = ((index + nslots) < io_tlb_nslabs
579 ? (index + nslots) : 0);
584 if (index >= io_tlb_nslabs)
586 } while (index != wrap);
589 spin_unlock_irqrestore(&io_tlb_lock, flags);
590 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
591 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
592 return SWIOTLB_MAP_ERROR;
594 spin_unlock_irqrestore(&io_tlb_lock, flags);
597 * Save away the mapping from the original address to the DMA address.
598 * This is needed when we sync the memory. Then we sync the buffer if
601 for (i = 0; i < nslots; i++)
602 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
604 * When dir == DMA_FROM_DEVICE we could omit the copy from the orig
605 * to the tlb buffer, if we knew for sure the device will
606 * overwirte the entire current content. But we don't. Thus
607 * unconditional bounce may prevent leaking swiotlb content (i.e.
608 * kernel memory) to user-space.
611 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
614 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
617 * Allocates bounce buffer and returns its kernel virtual address.
621 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
622 enum dma_data_direction dir, unsigned long attrs)
624 dma_addr_t start_dma_addr;
626 if (swiotlb_force == SWIOTLB_NO_FORCE) {
627 dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
629 return SWIOTLB_MAP_ERROR;
632 start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start);
633 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size,
638 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
640 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
641 size_t size, enum dma_data_direction dir,
645 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
646 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
647 phys_addr_t orig_addr = io_tlb_orig_addr[index];
650 * First, sync the memory before unmapping the entry
652 if (orig_addr != INVALID_PHYS_ADDR &&
653 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
654 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
655 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
658 * Return the buffer to the free list by setting the corresponding
659 * entries to indicate the number of contiguous entries available.
660 * While returning the entries to the free list, we merge the entries
661 * with slots below and above the pool being returned.
663 spin_lock_irqsave(&io_tlb_lock, flags);
665 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
666 io_tlb_list[index + nslots] : 0);
668 * Step 1: return the slots to the free list, merging the
669 * slots with superceeding slots
671 for (i = index + nslots - 1; i >= index; i--) {
672 io_tlb_list[i] = ++count;
673 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
676 * Step 2: merge the returned slots with the preceding slots,
677 * if available (non zero)
679 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
680 io_tlb_list[i] = ++count;
682 spin_unlock_irqrestore(&io_tlb_lock, flags);
684 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
686 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
687 size_t size, enum dma_data_direction dir,
688 enum dma_sync_target target)
690 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
691 phys_addr_t orig_addr = io_tlb_orig_addr[index];
693 if (orig_addr == INVALID_PHYS_ADDR)
695 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
699 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
700 swiotlb_bounce(orig_addr, tlb_addr,
701 size, DMA_FROM_DEVICE);
703 BUG_ON(dir != DMA_TO_DEVICE);
705 case SYNC_FOR_DEVICE:
706 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
707 swiotlb_bounce(orig_addr, tlb_addr,
708 size, DMA_TO_DEVICE);
710 BUG_ON(dir != DMA_FROM_DEVICE);
716 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
719 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
720 dma_addr_t *dma_handle, gfp_t flags)
722 bool warn = !(flags & __GFP_NOWARN);
725 int order = get_order(size);
726 u64 dma_mask = DMA_BIT_MASK(32);
728 if (hwdev && hwdev->coherent_dma_mask)
729 dma_mask = hwdev->coherent_dma_mask;
731 ret = (void *)__get_free_pages(flags, order);
733 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
734 if (dev_addr + size - 1 > dma_mask) {
736 * The allocated memory isn't reachable by the device.
738 free_pages((unsigned long) ret, order);
744 * We are either out of memory or the device can't DMA to
745 * GFP_DMA memory; fall back on map_single(), which
746 * will grab memory from the lowest available address range.
748 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE,
749 warn ? 0 : DMA_ATTR_NO_WARN);
750 if (paddr == SWIOTLB_MAP_ERROR)
753 ret = phys_to_virt(paddr);
754 dev_addr = swiotlb_phys_to_dma(hwdev, paddr);
756 /* Confirm address can be DMA'd by device */
757 if (dev_addr + size - 1 > dma_mask) {
758 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
759 (unsigned long long)dma_mask,
760 (unsigned long long)dev_addr);
763 * DMA_TO_DEVICE to avoid memcpy in unmap_single.
764 * The DMA_ATTR_SKIP_CPU_SYNC is optional.
766 swiotlb_tbl_unmap_single(hwdev, paddr,
768 DMA_ATTR_SKIP_CPU_SYNC);
773 *dma_handle = dev_addr;
774 memset(ret, 0, size);
779 if (warn && printk_ratelimit()) {
780 pr_warn("coherent allocation failed for device %s size=%zu\n",
781 dev_name(hwdev), size);
787 EXPORT_SYMBOL(swiotlb_alloc_coherent);
790 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
793 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
795 WARN_ON(irqs_disabled());
796 if (!is_swiotlb_buffer(paddr))
797 free_pages((unsigned long)vaddr, get_order(size));
800 * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
801 * DMA_ATTR_SKIP_CPU_SYNC is optional.
803 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE,
804 DMA_ATTR_SKIP_CPU_SYNC);
806 EXPORT_SYMBOL(swiotlb_free_coherent);
809 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
812 if (swiotlb_force == SWIOTLB_NO_FORCE)
816 * Ran out of IOMMU space for this operation. This is very bad.
817 * Unfortunately the drivers cannot handle this operation properly.
818 * unless they check for dma_mapping_error (most don't)
819 * When the mapping is small enough return a static buffer to limit
820 * the damage, or panic when the transfer is too big.
822 dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n",
825 if (size <= io_tlb_overflow || !do_panic)
828 if (dir == DMA_BIDIRECTIONAL)
829 panic("DMA: Random memory could be DMA accessed\n");
830 if (dir == DMA_FROM_DEVICE)
831 panic("DMA: Random memory could be DMA written\n");
832 if (dir == DMA_TO_DEVICE)
833 panic("DMA: Random memory could be DMA read\n");
837 * Map a single buffer of the indicated size for DMA in streaming mode. The
838 * physical address to use is returned.
840 * Once the device is given the dma address, the device owns this memory until
841 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
843 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
844 unsigned long offset, size_t size,
845 enum dma_data_direction dir,
848 phys_addr_t map, phys = page_to_phys(page) + offset;
849 dma_addr_t dev_addr = phys_to_dma(dev, phys);
851 BUG_ON(dir == DMA_NONE);
853 * If the address happens to be in the device's DMA window,
854 * we can safely return the device addr and not worry about bounce
857 if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
860 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
862 /* Oh well, have to allocate and map a bounce buffer. */
863 map = map_single(dev, phys, size, dir, attrs);
864 if (map == SWIOTLB_MAP_ERROR) {
865 swiotlb_full(dev, size, dir, 1);
866 return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
869 dev_addr = swiotlb_phys_to_dma(dev, map);
871 /* Ensure that the address returned is DMA'ble */
872 if (dma_capable(dev, dev_addr, size))
875 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
876 swiotlb_tbl_unmap_single(dev, map, size, dir, attrs);
878 return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
880 EXPORT_SYMBOL_GPL(swiotlb_map_page);
883 * Unmap a single streaming mode DMA translation. The dma_addr and size must
884 * match what was provided for in a previous swiotlb_map_page call. All
885 * other usages are undefined.
887 * After this call, reads by the cpu to the buffer are guaranteed to see
888 * whatever the device wrote there.
890 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
891 size_t size, enum dma_data_direction dir,
894 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
896 BUG_ON(dir == DMA_NONE);
898 if (is_swiotlb_buffer(paddr)) {
899 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
903 if (dir != DMA_FROM_DEVICE)
907 * phys_to_virt doesn't work with hihgmem page but we could
908 * call dma_mark_clean() with hihgmem page here. However, we
909 * are fine since dma_mark_clean() is null on POWERPC. We can
910 * make dma_mark_clean() take a physical address if necessary.
912 dma_mark_clean(phys_to_virt(paddr), size);
915 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
916 size_t size, enum dma_data_direction dir,
919 unmap_single(hwdev, dev_addr, size, dir, attrs);
921 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
924 * Make physical memory consistent for a single streaming mode DMA translation
927 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
928 * using the cpu, yet do not wish to teardown the dma mapping, you must
929 * call this function before doing so. At the next point you give the dma
930 * address back to the card, you must first perform a
931 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
934 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
935 size_t size, enum dma_data_direction dir,
936 enum dma_sync_target target)
938 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
940 BUG_ON(dir == DMA_NONE);
942 if (is_swiotlb_buffer(paddr)) {
943 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
947 if (dir != DMA_FROM_DEVICE)
950 dma_mark_clean(phys_to_virt(paddr), size);
954 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
955 size_t size, enum dma_data_direction dir)
957 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
959 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
962 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
963 size_t size, enum dma_data_direction dir)
965 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
967 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
970 * Map a set of buffers described by scatterlist in streaming mode for DMA.
971 * This is the scatter-gather version of the above swiotlb_map_page
972 * interface. Here the scatter gather list elements are each tagged with the
973 * appropriate dma address and length. They are obtained via
974 * sg_dma_{address,length}(SG).
976 * NOTE: An implementation may be able to use a smaller number of
977 * DMA address/length pairs than there are SG table elements.
978 * (for example via virtual mapping capabilities)
979 * The routine returns the number of addr/length pairs actually
980 * used, at most nents.
982 * Device ownership issues as mentioned above for swiotlb_map_page are the
986 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
987 enum dma_data_direction dir, unsigned long attrs)
989 struct scatterlist *sg;
992 BUG_ON(dir == DMA_NONE);
994 for_each_sg(sgl, sg, nelems, i) {
995 phys_addr_t paddr = sg_phys(sg);
996 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
998 if (swiotlb_force == SWIOTLB_FORCE ||
999 !dma_capable(hwdev, dev_addr, sg->length)) {
1000 phys_addr_t map = map_single(hwdev, sg_phys(sg),
1001 sg->length, dir, attrs);
1002 if (map == SWIOTLB_MAP_ERROR) {
1003 /* Don't panic here, we expect map_sg users
1004 to do proper error handling. */
1005 swiotlb_full(hwdev, sg->length, dir, 0);
1006 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
1007 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
1009 sg_dma_len(sgl) = 0;
1012 sg->dma_address = swiotlb_phys_to_dma(hwdev, map);
1014 sg->dma_address = dev_addr;
1015 sg_dma_len(sg) = sg->length;
1019 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
1022 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
1023 * concerning calls here are the same as for swiotlb_unmap_page() above.
1026 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
1027 int nelems, enum dma_data_direction dir,
1028 unsigned long attrs)
1030 struct scatterlist *sg;
1033 BUG_ON(dir == DMA_NONE);
1035 for_each_sg(sgl, sg, nelems, i)
1036 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir,
1039 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
1042 * Make physical memory consistent for a set of streaming mode DMA translations
1045 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
1049 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
1050 int nelems, enum dma_data_direction dir,
1051 enum dma_sync_target target)
1053 struct scatterlist *sg;
1056 for_each_sg(sgl, sg, nelems, i)
1057 swiotlb_sync_single(hwdev, sg->dma_address,
1058 sg_dma_len(sg), dir, target);
1062 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
1063 int nelems, enum dma_data_direction dir)
1065 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
1067 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
1070 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
1071 int nelems, enum dma_data_direction dir)
1073 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1075 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
1078 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1080 return (dma_addr == swiotlb_phys_to_dma(hwdev, io_tlb_overflow_buffer));
1082 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1085 * Return whether the given device DMA address mask can be supported
1086 * properly. For example, if your device can only drive the low 24-bits
1087 * during bus mastering, then you would pass 0x00ffffff as the mask to
1091 swiotlb_dma_supported(struct device *hwdev, u64 mask)
1093 return swiotlb_phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1095 EXPORT_SYMBOL(swiotlb_dma_supported);