2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
5 * RTAS specific routines for PCI.
7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/kernel.h>
25 #include <linux/threads.h>
26 #include <linux/pci.h>
27 #include <linux/string.h>
28 #include <linux/init.h>
31 #include <asm/pgtable.h>
34 #include <asm/machdep.h>
35 #include <asm/pci-bridge.h>
36 #include <asm/iommu.h>
39 #include <asm/ppc-pci.h>
43 static int read_pci_config;
44 static int write_pci_config;
45 static int ibm_read_pci_config;
46 static int ibm_write_pci_config;
48 static inline int config_access_valid(struct pci_dn *dn, int where)
52 if (where < 4096 && dn->pci_ext_config_space)
58 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
61 unsigned long buid, addr;
65 return PCIBIOS_DEVICE_NOT_FOUND;
66 if (!config_access_valid(pdn, where))
67 return PCIBIOS_BAD_REGISTER_NUMBER;
69 if (pdn->edev && pdn->edev->pe &&
70 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
71 return PCIBIOS_SET_FAILED;
74 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
75 buid = pdn->phb->buid;
77 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
78 addr, BUID_HI(buid), BUID_LO(buid), size);
80 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
85 return PCIBIOS_DEVICE_NOT_FOUND;
87 return PCIBIOS_SUCCESSFUL;
90 static int rtas_pci_read_config(struct pci_bus *bus,
92 int where, int size, u32 *val)
99 pdn = pci_get_pdn_by_devfn(bus, devfn);
101 /* Validity of pdn is checked in here */
102 ret = rtas_read_config(pdn, where, size, val);
103 if (*val == EEH_IO_ERROR_VALUE(size) &&
104 eeh_dev_check_failure(pdn_to_eeh_dev(pdn)))
105 return PCIBIOS_DEVICE_NOT_FOUND;
110 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
112 unsigned long buid, addr;
116 return PCIBIOS_DEVICE_NOT_FOUND;
117 if (!config_access_valid(pdn, where))
118 return PCIBIOS_BAD_REGISTER_NUMBER;
120 if (pdn->edev && pdn->edev->pe &&
121 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
122 return PCIBIOS_SET_FAILED;
125 addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
126 buid = pdn->phb->buid;
128 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
129 BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
131 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
135 return PCIBIOS_DEVICE_NOT_FOUND;
137 return PCIBIOS_SUCCESSFUL;
140 static int rtas_pci_write_config(struct pci_bus *bus,
142 int where, int size, u32 val)
146 pdn = pci_get_pdn_by_devfn(bus, devfn);
148 /* Validity of pdn is checked in here. */
149 return rtas_write_config(pdn, where, size, val);
152 static struct pci_ops rtas_pci_ops = {
153 .read = rtas_pci_read_config,
154 .write = rtas_pci_write_config,
157 static int is_python(struct device_node *dev)
159 const char *model = of_get_property(dev, "model", NULL);
161 if (model && strstr(model, "Python"))
167 static void python_countermeasures(struct device_node *dev)
169 struct resource registers;
170 void __iomem *chip_regs;
173 if (of_address_to_resource(dev, 0, ®isters)) {
174 printk(KERN_ERR "Can't get address for Python workarounds !\n");
178 /* Python's register file is 1 MB in size. */
179 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
182 * Firmware doesn't always clear this bit which is critical
183 * for good performance - Anton
186 #define PRG_CL_RESET_VALID 0x00010000
188 val = in_be32(chip_regs + 0xf6030);
189 if (val & PRG_CL_RESET_VALID) {
190 printk(KERN_INFO "Python workaround: ");
191 val &= ~PRG_CL_RESET_VALID;
192 out_be32(chip_regs + 0xf6030, val);
194 * We must read it back for changes to
197 val = in_be32(chip_regs + 0xf6030);
198 printk("reg0: %x\n", val);
204 void __init init_pci_config_tokens(void)
206 read_pci_config = rtas_token("read-pci-config");
207 write_pci_config = rtas_token("write-pci-config");
208 ibm_read_pci_config = rtas_token("ibm,read-pci-config");
209 ibm_write_pci_config = rtas_token("ibm,write-pci-config");
212 unsigned long get_phb_buid(struct device_node *phb)
216 if (ibm_read_pci_config == -1)
218 if (of_address_to_resource(phb, 0, &r))
223 static int phb_set_bus_ranges(struct device_node *dev,
224 struct pci_controller *phb)
226 const __be32 *bus_range;
229 bus_range = of_get_property(dev, "bus-range", &len);
230 if (bus_range == NULL || len < 2 * sizeof(int)) {
234 phb->first_busno = be32_to_cpu(bus_range[0]);
235 phb->last_busno = be32_to_cpu(bus_range[1]);
240 int rtas_setup_phb(struct pci_controller *phb)
242 struct device_node *dev = phb->dn;
245 python_countermeasures(dev);
247 if (phb_set_bus_ranges(dev, phb))
250 phb->ops = &rtas_pci_ops;
251 phb->buid = get_phb_buid(dev);