kernel/irq/debugfs.c

   1 /*
   2  * Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
   3  *
   4  * This file is licensed under the GPL V2.
   5  */
   6 #include <linux/irqdomain.h>
   7 #include <linux/irq.h>
   8 #include <linux/uaccess.h>
   9
  10 #include "internals.h"
  11
  12 static struct dentry *irq_dir;
  13
  14 struct irq_bit_descr {
  15         unsigned int    mask;
  16         char            *name;
  17 };
  18 #define BIT_MASK_DESCR(m)       { .mask = m, .name = #m }
  19
  20 static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
  21                                 const struct irq_bit_descr *sd, int size)
  22 {
  23         int i;
  24
  25         for (i = 0; i < size; i++, sd++) {
  26                 if (state & sd->mask)
  27                         seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
  28         }
  29 }
  30
  31 #ifdef CONFIG_SMP
  32 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
  33 {
  34         struct irq_data *data = irq_desc_get_irq_data(desc);
  35         struct cpumask *msk;
  36
  37         msk = irq_data_get_affinity_mask(data);
  38         seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
  39 #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
  40         msk = irq_data_get_effective_affinity_mask(data);
  41         seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
  42 #endif
  43 #ifdef CONFIG_GENERIC_PENDING_IRQ
  44         msk = desc->pending_mask;
  45         seq_printf(m, "pending:  %*pbl\n", cpumask_pr_args(msk));
  46 #endif
  47 }
  48 #else
  49 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
  50 #endif
  51
  52 static const struct irq_bit_descr irqchip_flags[] = {
  53         BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
  54         BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
  55         BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
  56         BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
  57         BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
  58         BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
  59         BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
  60 };
  61
  62 static void
  63 irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
  64 {
  65         struct irq_chip *chip = data->chip;
  66
  67         if (!chip) {
  68                 seq_printf(m, "chip: None\n");
  69                 return;
  70         }
  71         seq_printf(m, "%*schip:    %s\n", ind, "", chip->name);
  72         seq_printf(m, "%*sflags:   0x%lx\n", ind + 1, "", chip->flags);
  73         irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
  74                             ARRAY_SIZE(irqchip_flags));
  75 }
  76
  77 static void
  78 irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
  79 {
  80         seq_printf(m, "%*sdomain:  %s\n", ind, "",
  81                    data->domain ? data->domain->name : "");
  82         seq_printf(m, "%*shwirq:   0x%lx\n", ind + 1, "", data->hwirq);
  83         irq_debug_show_chip(m, data, ind + 1);
  84 #ifdef  CONFIG_IRQ_DOMAIN_HIERARCHY
  85         if (!data->parent_data)
  86                 return;
  87         seq_printf(m, "%*sparent:\n", ind + 1, "");
  88         irq_debug_show_data(m, data->parent_data, ind + 4);
  89 #endif
  90 }
  91
  92 static const struct irq_bit_descr irqdata_states[] = {
  93         BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
  94         BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
  95         BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
  96         BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
  97         BIT_MASK_DESCR(IRQD_LEVEL),
  98
  99         BIT_MASK_DESCR(IRQD_ACTIVATED),
 100         BIT_MASK_DESCR(IRQD_IRQ_STARTED),
 101         BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
 102         BIT_MASK_DESCR(IRQD_IRQ_MASKED),
 103         BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
 104
 105         BIT_MASK_DESCR(IRQD_PER_CPU),
 106         BIT_MASK_DESCR(IRQD_NO_BALANCING),
 107
 108         BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
 109         BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
 110         BIT_MASK_DESCR(IRQD_AFFINITY_SET),
 111         BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
 112         BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
 113         BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
 114
 115         BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
 116
 117         BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
 118         BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
 119 };
 120
 121 static const struct irq_bit_descr irqdesc_states[] = {
 122         BIT_MASK_DESCR(_IRQ_NOPROBE),
 123         BIT_MASK_DESCR(_IRQ_NOREQUEST),
 124         BIT_MASK_DESCR(_IRQ_NOTHREAD),
 125         BIT_MASK_DESCR(_IRQ_NOAUTOEN),
 126         BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
 127         BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
 128         BIT_MASK_DESCR(_IRQ_IS_POLLED),
 129         BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
 130 };
 131
 132 static const struct irq_bit_descr irqdesc_istates[] = {
 133         BIT_MASK_DESCR(IRQS_AUTODETECT),
 134         BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
 135         BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
 136         BIT_MASK_DESCR(IRQS_ONESHOT),
 137         BIT_MASK_DESCR(IRQS_REPLAY),
 138         BIT_MASK_DESCR(IRQS_WAITING),
 139         BIT_MASK_DESCR(IRQS_PENDING),
 140         BIT_MASK_DESCR(IRQS_SUSPENDED),
 141 };
 142
 143
 144 static int irq_debug_show(struct seq_file *m, void *p)
 145 {
 146         struct irq_desc *desc = m->private;
 147         struct irq_data *data;
 148
 149         raw_spin_lock_irq(&desc->lock);
 150         data = irq_desc_get_irq_data(desc);
 151         seq_printf(m, "handler:  %pf\n", desc->handle_irq);
 152         seq_printf(m, "status:   0x%08x\n", desc->status_use_accessors);
 153         irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
 154                             ARRAY_SIZE(irqdesc_states));
 155         seq_printf(m, "istate:   0x%08x\n", desc->istate);
 156         irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
 157                             ARRAY_SIZE(irqdesc_istates));
 158         seq_printf(m, "ddepth:   %u\n", desc->depth);
 159         seq_printf(m, "wdepth:   %u\n", desc->wake_depth);
 160         seq_printf(m, "dstate:   0x%08x\n", irqd_get(data));
 161         irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
 162                             ARRAY_SIZE(irqdata_states));
 163         seq_printf(m, "node:     %d\n", irq_data_get_node(data));
 164         irq_debug_show_masks(m, desc);
 165         irq_debug_show_data(m, data, 0);
 166         raw_spin_unlock_irq(&desc->lock);
 167         return 0;
 168 }
 169
 170 static int irq_debug_open(struct inode *inode, struct file *file)
 171 {
 172         return single_open(file, irq_debug_show, inode->i_private);
 173 }
 174
 175 static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
 176                                size_t count, loff_t *ppos)
 177 {
 178         struct irq_desc *desc = file_inode(file)->i_private;
 179         char buf[8] = { 0, };
 180         size_t size;
 181
 182         size = min(sizeof(buf) - 1, count);
 183         if (copy_from_user(buf, user_buf, size))
 184                 return -EFAULT;
 185
 186         if (!strncmp(buf, "trigger", size)) {
 187                 unsigned long flags;
 188                 int err;
 189
 190                 /* Try the HW interface first */
 191                 err = irq_set_irqchip_state(irq_desc_get_irq(desc),
 192                                             IRQCHIP_STATE_PENDING, true);
 193                 if (!err)
 194                         return count;
 195
 196                 /*
 197                  * Otherwise, try to inject via the resend interface,
 198                  * which may or may not succeed.
 199                  */
 200                 chip_bus_lock(desc);
 201                 raw_spin_lock_irqsave(&desc->lock, flags);
 202
 203                 if (irq_settings_is_level(desc)) {
 204                         /* Can't do level, sorry */
 205                         err = -EINVAL;
 206                 } else {
 207                         desc->istate |= IRQS_PENDING;
 208                         check_irq_resend(desc);
 209                         err = 0;
 210                 }
 211
 212                 raw_spin_unlock_irqrestore(&desc->lock, flags);
 213                 chip_bus_sync_unlock(desc);
 214
 215                 return err ? err : count;
 216         }
 217
 218         return count;
 219 }
 220
 221 static const struct file_operations dfs_irq_ops = {
 222         .open           = irq_debug_open,
 223         .write          = irq_debug_write,
 224         .read           = seq_read,
 225         .llseek         = seq_lseek,
 226         .release        = single_release,
 227 };
 228
 229 void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
 230 {
 231         char name [10];
 232
 233         if (!irq_dir || !desc || desc->debugfs_file)
 234                 return;
 235
 236         sprintf(name, "%d", irq);
 237         desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
 238                                                  &dfs_irq_ops);
 239 }
 240
 241 static int __init irq_debugfs_init(void)
 242 {
 243         struct dentry *root_dir;
 244         int irq;
 245
 246         root_dir = debugfs_create_dir("irq", NULL);
 247         if (!root_dir)
 248                 return -ENOMEM;
 249
 250         irq_domain_debugfs_init(root_dir);
 251
 252         irq_dir = debugfs_create_dir("irqs", root_dir);
 253
 254         irq_lock_sparse();
 255         for_each_active_irq(irq)
 256                 irq_add_debugfs_entry(irq, irq_to_desc(irq));
 257         irq_unlock_sparse();
 258
 259         return 0;
 260 }
 261 __initcall(irq_debugfs_init);