kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-direct.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/dma-contiguous.h>
  13 #include <linux/dma-noncoherent.h>
  14 #include <linux/pfn.h>
  15 #include <linux/set_memory.h>
  16 #include <linux/swiotlb.h>
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but
  20  * some use it for entirely different regions:
  21  */
  22 #ifndef ARCH_ZONE_DMA_BITS
  23 #define ARCH_ZONE_DMA_BITS 24
  24 #endif
  25
  26 static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size)
  27 {
  28         if (!dev->dma_mask) {
  29                 dev_err_once(dev, "DMA map on device without dma_mask\n");
  30         } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) {
  31                 dev_err_once(dev,
  32                         "overflow %pad+%zu of DMA mask %llx bus mask %llx\n",
  33                         &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask);
  34         }
  35         WARN_ON_ONCE(1);
  36 }
  37
  38 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  39                 phys_addr_t phys)
  40 {
  41         if (force_dma_unencrypted(dev))
  42                 return __phys_to_dma(dev, phys);
  43         return phys_to_dma(dev, phys);
  44 }
  45
  46 u64 dma_direct_get_required_mask(struct device *dev)
  47 {
  48         phys_addr_t phys = (phys_addr_t)(max_pfn - 1) << PAGE_SHIFT;
  49         u64 max_dma = phys_to_dma_direct(dev, phys);
  50
  51         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  52 }
  53
  54 static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  55                 u64 *phys_mask)
  56 {
  57         if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask)
  58                 dma_mask = dev->bus_dma_mask;
  59
  60         if (force_dma_unencrypted(dev))
  61                 *phys_mask = __dma_to_phys(dev, dma_mask);
  62         else
  63                 *phys_mask = dma_to_phys(dev, dma_mask);
  64
  65         /*
  66          * Optimistically try the zone that the physical address mask falls
  67          * into first.  If that returns memory that isn't actually addressable
  68          * we will fallback to the next lower zone and try again.
  69          *
  70          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  71          * zones.
  72          */
  73         if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
  74                 return GFP_DMA;
  75         if (*phys_mask <= DMA_BIT_MASK(32))
  76                 return GFP_DMA32;
  77         return 0;
  78 }
  79
  80 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  81 {
  82         return phys_to_dma_direct(dev, phys) + size - 1 <=
  83                         min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask);
  84 }
  85
  86 struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  87                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
  88 {
  89         size_t alloc_size = PAGE_ALIGN(size);
  90         int node = dev_to_node(dev);
  91         struct page *page = NULL;
  92         u64 phys_mask;
  93
  94         if (attrs & DMA_ATTR_NO_WARN)
  95                 gfp |= __GFP_NOWARN;
  96
  97         /* we always manually zero the memory once we are done: */
  98         gfp &= ~__GFP_ZERO;
  99         gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 100                         &phys_mask);
 101         page = dma_alloc_contiguous(dev, alloc_size, gfp);
 102         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 103                 dma_free_contiguous(dev, page, alloc_size);
 104                 page = NULL;
 105         }
 106 again:
 107         if (!page)
 108                 page = alloc_pages_node(node, gfp, get_order(alloc_size));
 109         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 110                 dma_free_contiguous(dev, page, size);
 111                 page = NULL;
 112
 113                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 114                     phys_mask < DMA_BIT_MASK(64) &&
 115                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 116                         gfp |= GFP_DMA32;
 117                         goto again;
 118                 }
 119
 120                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 121                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 122                         goto again;
 123                 }
 124         }
 125
 126         return page;
 127 }
 128
 129 void *dma_direct_alloc_pages(struct device *dev, size_t size,
 130                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 131 {
 132         struct page *page;
 133         void *ret;
 134
 135         page = __dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
 136         if (!page)
 137                 return NULL;
 138
 139         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 140             !force_dma_unencrypted(dev)) {
 141                 /* remove any dirty cache lines on the kernel alias */
 142                 if (!PageHighMem(page))
 143                         arch_dma_prep_coherent(page, size);
 144                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 145                 /* return the page pointer as the opaque cookie */
 146                 return page;
 147         }
 148
 149         if (PageHighMem(page)) {
 150                 /*
 151                  * Depending on the cma= arguments and per-arch setup
 152                  * dma_alloc_contiguous could return highmem pages.
 153                  * Without remapping there is no way to return them here,
 154                  * so log an error and fail.
 155                  */
 156                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 157                 __dma_direct_free_pages(dev, size, page);
 158                 return NULL;
 159         }
 160
 161         ret = page_address(page);
 162         if (force_dma_unencrypted(dev)) {
 163                 set_memory_decrypted((unsigned long)ret, 1 << get_order(size));
 164                 *dma_handle = __phys_to_dma(dev, page_to_phys(page));
 165         } else {
 166                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 167         }
 168         memset(ret, 0, size);
 169
 170         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 171             dma_alloc_need_uncached(dev, attrs)) {
 172                 arch_dma_prep_coherent(page, size);
 173                 ret = uncached_kernel_address(ret);
 174         }
 175
 176         return ret;
 177 }
 178
 179 void __dma_direct_free_pages(struct device *dev, size_t size, struct page *page)
 180 {
 181         dma_free_contiguous(dev, page, size);
 182 }
 183
 184 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
 185                 dma_addr_t dma_addr, unsigned long attrs)
 186 {
 187         unsigned int page_order = get_order(size);
 188
 189         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 190             !force_dma_unencrypted(dev)) {
 191                 /* cpu_addr is a struct page cookie, not a kernel address */
 192                 __dma_direct_free_pages(dev, size, cpu_addr);
 193                 return;
 194         }
 195
 196         if (force_dma_unencrypted(dev))
 197                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 198
 199         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 200             dma_alloc_need_uncached(dev, attrs))
 201                 cpu_addr = cached_kernel_address(cpu_addr);
 202         __dma_direct_free_pages(dev, size, virt_to_page(cpu_addr));
 203 }
 204
 205 void *dma_direct_alloc(struct device *dev, size_t size,
 206                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 207 {
 208         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 209             dma_alloc_need_uncached(dev, attrs))
 210                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 211         return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
 212 }
 213
 214 void dma_direct_free(struct device *dev, size_t size,
 215                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 216 {
 217         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 218             dma_alloc_need_uncached(dev, attrs))
 219                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 220         else
 221                 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
 222 }
 223
 224 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 225     defined(CONFIG_SWIOTLB)
 226 void dma_direct_sync_single_for_device(struct device *dev,
 227                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 228 {
 229         phys_addr_t paddr = dma_to_phys(dev, addr);
 230
 231         if (unlikely(is_swiotlb_buffer(paddr)))
 232                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
 233
 234         if (!dev_is_dma_coherent(dev))
 235                 arch_sync_dma_for_device(paddr, size, dir);
 236 }
 237 EXPORT_SYMBOL(dma_direct_sync_single_for_device);
 238
 239 void dma_direct_sync_sg_for_device(struct device *dev,
 240                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 241 {
 242         struct scatterlist *sg;
 243         int i;
 244
 245         for_each_sg(sgl, sg, nents, i) {
 246                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 247
 248                 if (unlikely(is_swiotlb_buffer(paddr)))
 249                         swiotlb_tbl_sync_single(dev, paddr, sg->length,
 250                                         dir, SYNC_FOR_DEVICE);
 251
 252                 if (!dev_is_dma_coherent(dev))
 253                         arch_sync_dma_for_device(paddr, sg->length,
 254                                         dir);
 255         }
 256 }
 257 EXPORT_SYMBOL(dma_direct_sync_sg_for_device);
 258 #endif
 259
 260 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 261     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 262     defined(CONFIG_SWIOTLB)
 263 void dma_direct_sync_single_for_cpu(struct device *dev,
 264                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 265 {
 266         phys_addr_t paddr = dma_to_phys(dev, addr);
 267
 268         if (!dev_is_dma_coherent(dev)) {
 269                 arch_sync_dma_for_cpu(paddr, size, dir);
 270                 arch_sync_dma_for_cpu_all();
 271         }
 272
 273         if (unlikely(is_swiotlb_buffer(paddr)))
 274                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
 275 }
 276 EXPORT_SYMBOL(dma_direct_sync_single_for_cpu);
 277
 278 void dma_direct_sync_sg_for_cpu(struct device *dev,
 279                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 280 {
 281         struct scatterlist *sg;
 282         int i;
 283
 284         for_each_sg(sgl, sg, nents, i) {
 285                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 286
 287                 if (!dev_is_dma_coherent(dev))
 288                         arch_sync_dma_for_cpu(paddr, sg->length, dir);
 289
 290                 if (unlikely(is_swiotlb_buffer(paddr)))
 291                         swiotlb_tbl_sync_single(dev, paddr, sg->length, dir,
 292                                         SYNC_FOR_CPU);
 293         }
 294
 295         if (!dev_is_dma_coherent(dev))
 296                 arch_sync_dma_for_cpu_all();
 297 }
 298 EXPORT_SYMBOL(dma_direct_sync_sg_for_cpu);
 299
 300 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
 301                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 302 {
 303         phys_addr_t phys = dma_to_phys(dev, addr);
 304
 305         if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 306                 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
 307
 308         if (unlikely(is_swiotlb_buffer(phys)))
 309                 swiotlb_tbl_unmap_single(dev, phys, size, size, dir,
 310                                          attrs | DMA_ATTR_SKIP_CPU_SYNC);
 311 }
 312 EXPORT_SYMBOL(dma_direct_unmap_page);
 313
 314 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 315                 int nents, enum dma_data_direction dir, unsigned long attrs)
 316 {
 317         struct scatterlist *sg;
 318         int i;
 319
 320         for_each_sg(sgl, sg, nents, i)
 321                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 322                              attrs);
 323 }
 324 EXPORT_SYMBOL(dma_direct_unmap_sg);
 325 #endif
 326
 327 static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr,
 328                 size_t size)
 329 {
 330         return swiotlb_force != SWIOTLB_FORCE &&
 331                 dma_capable(dev, dma_addr, size);
 332 }
 333
 334 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
 335                 unsigned long offset, size_t size, enum dma_data_direction dir,
 336                 unsigned long attrs)
 337 {
 338         phys_addr_t phys = page_to_phys(page) + offset;
 339         dma_addr_t dma_addr = phys_to_dma(dev, phys);
 340
 341         if (unlikely(!dma_direct_possible(dev, dma_addr, size)) &&
 342             !swiotlb_map(dev, &phys, &dma_addr, size, dir, attrs)) {
 343                 report_addr(dev, dma_addr, size);
 344                 return DMA_MAPPING_ERROR;
 345         }
 346
 347         if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 348                 arch_sync_dma_for_device(phys, size, dir);
 349         return dma_addr;
 350 }
 351 EXPORT_SYMBOL(dma_direct_map_page);
 352
 353 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 354                 enum dma_data_direction dir, unsigned long attrs)
 355 {
 356         int i;
 357         struct scatterlist *sg;
 358
 359         for_each_sg(sgl, sg, nents, i) {
 360                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 361                                 sg->offset, sg->length, dir, attrs);
 362                 if (sg->dma_address == DMA_MAPPING_ERROR)
 363                         goto out_unmap;
 364                 sg_dma_len(sg) = sg->length;
 365         }
 366
 367         return nents;
 368
 369 out_unmap:
 370         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 371         return 0;
 372 }
 373 EXPORT_SYMBOL(dma_direct_map_sg);
 374
 375 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 376                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 377 {
 378         dma_addr_t dma_addr = paddr;
 379
 380         if (unlikely(!dma_capable(dev, dma_addr, size))) {
 381                 report_addr(dev, dma_addr, size);
 382                 return DMA_MAPPING_ERROR;
 383         }
 384
 385         return dma_addr;
 386 }
 387 EXPORT_SYMBOL(dma_direct_map_resource);
 388
 389 /*
 390  * Because 32-bit DMA masks are so common we expect every architecture to be
 391  * able to satisfy them - either by not supporting more physical memory, or by
 392  * providing a ZONE_DMA32.  If neither is the case, the architecture needs to
 393  * use an IOMMU instead of the direct mapping.
 394  */
 395 int dma_direct_supported(struct device *dev, u64 mask)
 396 {
 397         u64 min_mask;
 398
 399         if (IS_ENABLED(CONFIG_ZONE_DMA))
 400                 min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS);
 401         else
 402                 min_mask = DMA_BIT_MASK(32);
 403
 404         min_mask = min_t(u64, min_mask, (max_pfn - 1) << PAGE_SHIFT);
 405
 406         /*
 407          * This check needs to be against the actual bit mask value, so
 408          * use __phys_to_dma() here so that the SME encryption mask isn't
 409          * part of the check.
 410          */
 411         return mask >= __phys_to_dma(dev, min_mask);
 412 }
 413
 414 size_t dma_direct_max_mapping_size(struct device *dev)
 415 {
 416         /* If SWIOTLB is active, use its maximum mapping size */
 417         if (is_swiotlb_active() &&
 418             (dma_addressing_limited(dev) || swiotlb_force == SWIOTLB_FORCE))
 419                 return swiotlb_max_mapping_size(dev);
 420         return SIZE_MAX;
 421 }