2 * Copyright (C) 2012 Invensense, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/err.h>
18 #include <linux/delay.h>
19 #include <linux/sysfs.h>
20 #include <linux/jiffies.h>
21 #include <linux/irq.h>
22 #include <linux/interrupt.h>
23 #include <linux/kfifo.h>
24 #include <linux/spinlock.h>
25 #include <linux/iio/iio.h>
26 #include <linux/acpi.h>
27 #include "inv_mpu_iio.h"
30 * this is the gyro scale translated from dynamic range plus/minus
31 * {250, 500, 1000, 2000} to rad/s
33 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
36 * this is the accel scale translated from dynamic range plus/minus
37 * {2, 4, 8, 16} to m/s^2
39 static const int accel_scale[] = {598, 1196, 2392, 4785};
41 static const struct inv_mpu6050_reg_map reg_set_6500 = {
42 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
43 .lpf = INV_MPU6050_REG_CONFIG,
44 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
45 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
46 .fifo_en = INV_MPU6050_REG_FIFO_EN,
47 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
48 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
49 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
50 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
51 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
52 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
53 .temperature = INV_MPU6050_REG_TEMPERATURE,
54 .int_enable = INV_MPU6050_REG_INT_ENABLE,
55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
56 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
57 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
58 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
59 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
62 static const struct inv_mpu6050_reg_map reg_set_6050 = {
63 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
64 .lpf = INV_MPU6050_REG_CONFIG,
65 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
66 .fifo_en = INV_MPU6050_REG_FIFO_EN,
67 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
68 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
69 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
70 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
71 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
72 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
73 .temperature = INV_MPU6050_REG_TEMPERATURE,
74 .int_enable = INV_MPU6050_REG_INT_ENABLE,
75 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
76 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
77 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
78 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
79 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
82 static const struct inv_mpu6050_chip_config chip_config_6050 = {
83 .fsr = INV_MPU6050_FSR_2000DPS,
84 .lpf = INV_MPU6050_FILTER_20HZ,
85 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
86 .gyro_fifo_enable = false,
87 .accl_fifo_enable = false,
88 .accl_fs = INV_MPU6050_FS_02G,
91 /* Indexed by enum inv_devices */
92 static const struct inv_mpu6050_hw hw_info[] = {
94 .whoami = INV_MPU6050_WHOAMI_VALUE,
97 .config = &chip_config_6050,
100 .whoami = INV_MPU6500_WHOAMI_VALUE,
102 .reg = ®_set_6500,
103 .config = &chip_config_6050,
106 .whoami = INV_MPU6000_WHOAMI_VALUE,
108 .reg = ®_set_6050,
109 .config = &chip_config_6050,
112 .whoami = INV_MPU9150_WHOAMI_VALUE,
114 .reg = ®_set_6050,
115 .config = &chip_config_6050,
118 .whoami = INV_ICM20608_WHOAMI_VALUE,
120 .reg = ®_set_6500,
121 .config = &chip_config_6050,
125 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
127 unsigned int d, mgmt_1;
130 * switch clock needs to be careful. Only when gyro is on, can
131 * clock source be switched to gyro. Otherwise, it must be set to
134 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
135 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
139 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
142 if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
144 * turning off gyro requires switch to internal clock first.
145 * Then turn off gyro engine
147 mgmt_1 |= INV_CLK_INTERNAL;
148 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
153 result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
160 result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
165 /* Wait for output stabilize */
166 msleep(INV_MPU6050_TEMP_UP_TIME);
167 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
168 /* switch internal clock to PLL */
169 mgmt_1 |= INV_CLK_PLL;
170 result = regmap_write(st->map,
171 st->reg->pwr_mgmt_1, mgmt_1);
180 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
185 /* Already under indio-dev->mlock mutex */
186 if (!st->powerup_count)
187 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
192 if (!st->powerup_count)
193 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
194 INV_MPU6050_BIT_SLEEP);
201 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
202 INV_MPU6050_REG_UP_TIME_MAX);
206 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
209 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
211 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
212 * MPU6500 and above have a dedicated register for accelerometer
214 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
215 enum inv_mpu6050_filter_e val)
219 result = regmap_write(st->map, st->reg->lpf, val);
223 switch (st->chip_type) {
227 /* old chips, nothing to do */
232 result = regmap_write(st->map, st->reg->accel_lpf, val);
240 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
242 * Initial configuration:
246 * Clock source: Gyro PLL
248 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
252 struct inv_mpu6050_state *st = iio_priv(indio_dev);
254 result = inv_mpu6050_set_power_itg(st, true);
257 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
258 result = regmap_write(st->map, st->reg->gyro_config, d);
262 result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
266 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
267 result = regmap_write(st->map, st->reg->sample_rate_div, d);
271 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
272 result = regmap_write(st->map, st->reg->accl_config, d);
276 memcpy(&st->chip_config, hw_info[st->chip_type].config,
277 sizeof(struct inv_mpu6050_chip_config));
278 result = inv_mpu6050_set_power_itg(st, false);
283 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
287 __be16 d = cpu_to_be16(val);
289 ind = (axis - IIO_MOD_X) * 2;
290 result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
297 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
303 ind = (axis - IIO_MOD_X) * 2;
304 result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
307 *val = (short)be16_to_cpup(&d);
313 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
314 struct iio_chan_spec const *chan,
315 int *val, int *val2, long mask)
317 struct inv_mpu6050_state *st = iio_priv(indio_dev);
321 case IIO_CHAN_INFO_RAW:
327 mutex_lock(&indio_dev->mlock);
328 if (!st->chip_config.enable) {
329 result = inv_mpu6050_set_power_itg(st, true);
333 /* when enable is on, power is already on */
334 switch (chan->type) {
336 if (!st->chip_config.gyro_fifo_enable ||
337 !st->chip_config.enable) {
338 result = inv_mpu6050_switch_engine(st, true,
339 INV_MPU6050_BIT_PWR_GYRO_STBY);
343 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
344 chan->channel2, val);
345 if (!st->chip_config.gyro_fifo_enable ||
346 !st->chip_config.enable) {
347 result = inv_mpu6050_switch_engine(st, false,
348 INV_MPU6050_BIT_PWR_GYRO_STBY);
354 if (!st->chip_config.accl_fifo_enable ||
355 !st->chip_config.enable) {
356 result = inv_mpu6050_switch_engine(st, true,
357 INV_MPU6050_BIT_PWR_ACCL_STBY);
361 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
362 chan->channel2, val);
363 if (!st->chip_config.accl_fifo_enable ||
364 !st->chip_config.enable) {
365 result = inv_mpu6050_switch_engine(st, false,
366 INV_MPU6050_BIT_PWR_ACCL_STBY);
372 /* wait for stablization */
373 msleep(INV_MPU6050_SENSOR_UP_TIME);
374 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
382 if (!st->chip_config.enable)
383 result |= inv_mpu6050_set_power_itg(st, false);
384 mutex_unlock(&indio_dev->mlock);
390 case IIO_CHAN_INFO_SCALE:
391 switch (chan->type) {
394 *val2 = gyro_scale_6050[st->chip_config.fsr];
396 return IIO_VAL_INT_PLUS_NANO;
399 *val2 = accel_scale[st->chip_config.accl_fs];
401 return IIO_VAL_INT_PLUS_MICRO;
404 *val2 = INV_MPU6050_TEMP_SCALE;
406 return IIO_VAL_INT_PLUS_MICRO;
410 case IIO_CHAN_INFO_OFFSET:
411 switch (chan->type) {
413 *val = INV_MPU6050_TEMP_OFFSET;
419 case IIO_CHAN_INFO_CALIBBIAS:
420 switch (chan->type) {
422 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
423 chan->channel2, val);
426 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
427 chan->channel2, val);
438 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
443 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
444 if (gyro_scale_6050[i] == val) {
445 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
446 result = regmap_write(st->map, st->reg->gyro_config, d);
450 st->chip_config.fsr = i;
458 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
459 struct iio_chan_spec const *chan, long mask)
462 case IIO_CHAN_INFO_SCALE:
463 switch (chan->type) {
465 return IIO_VAL_INT_PLUS_NANO;
467 return IIO_VAL_INT_PLUS_MICRO;
470 return IIO_VAL_INT_PLUS_MICRO;
476 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
481 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
482 if (accel_scale[i] == val) {
483 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
484 result = regmap_write(st->map, st->reg->accl_config, d);
488 st->chip_config.accl_fs = i;
496 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
497 struct iio_chan_spec const *chan,
498 int val, int val2, long mask)
500 struct inv_mpu6050_state *st = iio_priv(indio_dev);
503 mutex_lock(&indio_dev->mlock);
505 * we should only update scale when the chip is disabled, i.e.
508 if (st->chip_config.enable) {
510 goto error_write_raw;
512 result = inv_mpu6050_set_power_itg(st, true);
514 goto error_write_raw;
517 case IIO_CHAN_INFO_SCALE:
518 switch (chan->type) {
520 result = inv_mpu6050_write_gyro_scale(st, val2);
523 result = inv_mpu6050_write_accel_scale(st, val2);
530 case IIO_CHAN_INFO_CALIBBIAS:
531 switch (chan->type) {
533 result = inv_mpu6050_sensor_set(st,
534 st->reg->gyro_offset,
535 chan->channel2, val);
538 result = inv_mpu6050_sensor_set(st,
539 st->reg->accl_offset,
540 chan->channel2, val);
551 result |= inv_mpu6050_set_power_itg(st, false);
552 mutex_unlock(&indio_dev->mlock);
558 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
560 * Based on the Nyquist principle, the sampling rate must
561 * exceed twice of the bandwidth of the signal, or there
562 * would be alising. This function basically search for the
563 * correct low pass parameters based on the fifo rate, e.g,
564 * sampling frequency.
566 * lpf is set automatically when setting sampling rate to avoid any aliases.
568 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
570 const int hz[] = {188, 98, 42, 20, 10, 5};
571 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
572 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
573 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
579 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
582 result = inv_mpu6050_set_lpf_regs(st, data);
585 st->chip_config.lpf = data;
591 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
594 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
595 const char *buf, size_t count)
600 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
601 struct inv_mpu6050_state *st = iio_priv(indio_dev);
603 if (kstrtoint(buf, 10, &fifo_rate))
605 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
606 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
608 if (fifo_rate == st->chip_config.fifo_rate)
611 mutex_lock(&indio_dev->mlock);
612 if (st->chip_config.enable) {
616 result = inv_mpu6050_set_power_itg(st, true);
620 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
621 result = regmap_write(st->map, st->reg->sample_rate_div, d);
624 st->chip_config.fifo_rate = fifo_rate;
626 result = inv_mpu6050_set_lpf(st, fifo_rate);
631 result |= inv_mpu6050_set_power_itg(st, false);
632 mutex_unlock(&indio_dev->mlock);
640 * inv_fifo_rate_show() - Get the current sampling rate.
643 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
646 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
648 return sprintf(buf, "%d\n", st->chip_config.fifo_rate);
652 * inv_attr_show() - calling this function will show current
655 * Deprecated in favor of IIO mounting matrix API.
657 * See inv_get_mount_matrix()
659 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
662 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
663 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
666 switch (this_attr->address) {
668 * In MPU6050, the two matrix are the same because gyro and accel
669 * are integrated in one chip
671 case ATTR_GYRO_MATRIX:
672 case ATTR_ACCL_MATRIX:
673 m = st->plat_data.orientation;
675 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
676 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
683 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
685 * @indio_dev: The IIO device
686 * @trig: The new trigger
688 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
689 * device, -EINVAL otherwise.
691 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
692 struct iio_trigger *trig)
694 struct inv_mpu6050_state *st = iio_priv(indio_dev);
696 if (st->trig != trig)
702 static const struct iio_mount_matrix *
703 inv_get_mount_matrix(const struct iio_dev *indio_dev,
704 const struct iio_chan_spec *chan)
706 return &((struct inv_mpu6050_state *)iio_priv(indio_dev))->orientation;
709 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
710 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
714 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
718 .channel2 = _channel2, \
719 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
720 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
721 BIT(IIO_CHAN_INFO_CALIBBIAS), \
722 .scan_index = _index, \
728 .endianness = IIO_BE, \
730 .ext_info = inv_ext_info, \
733 static const struct iio_chan_spec inv_mpu_channels[] = {
734 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
736 * Note that temperature should only be via polled reading only,
737 * not the final scan elements output.
741 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
742 | BIT(IIO_CHAN_INFO_OFFSET)
743 | BIT(IIO_CHAN_INFO_SCALE),
746 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
747 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
748 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
750 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
751 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
752 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
755 /* constant IIO attribute */
756 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
757 static IIO_CONST_ATTR(in_anglvel_scale_available,
758 "0.000133090 0.000266181 0.000532362 0.001064724");
759 static IIO_CONST_ATTR(in_accel_scale_available,
760 "0.000598 0.001196 0.002392 0.004785");
761 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
762 inv_mpu6050_fifo_rate_store);
764 /* Deprecated: kept for userspace backward compatibility. */
765 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
767 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
770 static struct attribute *inv_attributes[] = {
771 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
772 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
773 &iio_dev_attr_sampling_frequency.dev_attr.attr,
774 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
775 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
776 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
780 static const struct attribute_group inv_attribute_group = {
781 .attrs = inv_attributes
784 static const struct iio_info mpu_info = {
785 .driver_module = THIS_MODULE,
786 .read_raw = &inv_mpu6050_read_raw,
787 .write_raw = &inv_mpu6050_write_raw,
788 .write_raw_get_fmt = &inv_write_raw_get_fmt,
789 .attrs = &inv_attribute_group,
790 .validate_trigger = inv_mpu6050_validate_trigger,
794 * inv_check_and_setup_chip() - check and setup chip.
796 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
801 st->hw = &hw_info[st->chip_type];
802 st->reg = hw_info[st->chip_type].reg;
804 /* reset to make sure previous state are not there */
805 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
806 INV_MPU6050_BIT_H_RESET);
809 msleep(INV_MPU6050_POWER_UP_TIME);
811 /* check chip self-identification */
812 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
815 if (regval != st->hw->whoami) {
816 dev_warn(regmap_get_device(st->map),
817 "whoami mismatch got %#02x expected %#02hhx for %s\n",
818 regval, st->hw->whoami, st->hw->name);
822 * toggle power state. After reset, the sleep bit could be on
823 * or off depending on the OTP settings. Toggling power would
824 * make it in a definite state as well as making the hardware
825 * state align with the software state
827 result = inv_mpu6050_set_power_itg(st, false);
830 result = inv_mpu6050_set_power_itg(st, true);
834 result = inv_mpu6050_switch_engine(st, false,
835 INV_MPU6050_BIT_PWR_ACCL_STBY);
838 result = inv_mpu6050_switch_engine(st, false,
839 INV_MPU6050_BIT_PWR_GYRO_STBY);
846 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
847 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
849 struct inv_mpu6050_state *st;
850 struct iio_dev *indio_dev;
851 struct inv_mpu6050_platform_data *pdata;
852 struct device *dev = regmap_get_device(regmap);
855 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
859 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
860 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
861 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
865 st = iio_priv(indio_dev);
866 st->chip_type = chip_type;
867 st->powerup_count = 0;
871 pdata = dev_get_platdata(dev);
873 result = of_iio_read_mount_matrix(dev, "mount-matrix",
876 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
881 st->plat_data = *pdata;
884 /* power is turned on inside check chip type*/
885 result = inv_check_and_setup_chip(st);
889 if (inv_mpu_bus_setup)
890 inv_mpu_bus_setup(indio_dev);
892 result = inv_mpu6050_init_config(indio_dev);
894 dev_err(dev, "Could not initialize device.\n");
898 dev_set_drvdata(dev, indio_dev);
899 indio_dev->dev.parent = dev;
900 /* name will be NULL when enumerated via ACPI */
902 indio_dev->name = name;
904 indio_dev->name = dev_name(dev);
905 indio_dev->channels = inv_mpu_channels;
906 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
908 indio_dev->info = &mpu_info;
909 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
911 result = iio_triggered_buffer_setup(indio_dev,
912 inv_mpu6050_irq_handler,
913 inv_mpu6050_read_fifo,
916 dev_err(dev, "configure buffer fail %d\n", result);
919 result = inv_mpu6050_probe_trigger(indio_dev);
921 dev_err(dev, "trigger probe fail %d\n", result);
925 INIT_KFIFO(st->timestamps);
926 spin_lock_init(&st->time_stamp_lock);
927 result = iio_device_register(indio_dev);
929 dev_err(dev, "IIO register fail %d\n", result);
930 goto out_remove_trigger;
936 inv_mpu6050_remove_trigger(st);
938 iio_triggered_buffer_cleanup(indio_dev);
941 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
943 int inv_mpu_core_remove(struct device *dev)
945 struct iio_dev *indio_dev = dev_get_drvdata(dev);
947 iio_device_unregister(indio_dev);
948 inv_mpu6050_remove_trigger(iio_priv(indio_dev));
949 iio_triggered_buffer_cleanup(indio_dev);
953 EXPORT_SYMBOL_GPL(inv_mpu_core_remove);
955 #ifdef CONFIG_PM_SLEEP
957 static int inv_mpu_resume(struct device *dev)
959 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), true);
962 static int inv_mpu_suspend(struct device *dev)
964 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), false);
966 #endif /* CONFIG_PM_SLEEP */
968 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
969 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
971 MODULE_AUTHOR("Invensense Corporation");
972 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
973 MODULE_LICENSE("GPL");