2 * Utility functions for x86 operand and address decoding
4 * Copyright (C) Intel Corporation 2017
6 #include <linux/kernel.h>
7 #include <linux/string.h>
8 #include <linux/ratelimit.h>
9 #include <linux/mmu_context.h>
10 #include <asm/desc_defs.h>
14 #include <asm/insn-eval.h>
19 #define pr_fmt(fmt) "insn: " fmt
29 * is_string_insn() - Determine if instruction is a string instruction
30 * @insn: Instruction containing the opcode to inspect
34 * true if the instruction, determined by the opcode, is any of the
35 * string instructions as defined in the Intel Software Development manual.
38 static bool is_string_insn(struct insn *insn)
40 insn_get_opcode(insn);
42 /* All string instructions have a 1-byte opcode. */
43 if (insn->opcode.nbytes != 1)
46 switch (insn->opcode.bytes[0]) {
47 case 0x6c ... 0x6f: /* INS, OUTS */
48 case 0xa4 ... 0xa7: /* MOVS, CMPS */
49 case 0xaa ... 0xaf: /* STOS, LODS, SCAS */
57 * insn_has_rep_prefix() - Determine if instruction has a REP prefix
58 * @insn: Instruction containing the prefix to inspect
62 * true if the instruction has a REP prefix, false if not.
64 bool insn_has_rep_prefix(struct insn *insn)
69 insn_get_prefixes(insn);
71 for_each_insn_prefix(insn, i, p) {
72 if (p == 0xf2 || p == 0xf3)
80 * get_seg_reg_override_idx() - obtain segment register override index
81 * @insn: Valid instruction with segment override prefixes
83 * Inspect the instruction prefixes in @insn and find segment overrides, if any.
87 * A constant identifying the segment register to use, among CS, SS, DS,
88 * ES, FS, or GS. INAT_SEG_REG_DEFAULT is returned if no segment override
89 * prefixes were found.
91 * -EINVAL in case of error.
93 static int get_seg_reg_override_idx(struct insn *insn)
95 int idx = INAT_SEG_REG_DEFAULT;
96 int num_overrides = 0, i;
99 insn_get_prefixes(insn);
101 /* Look for any segment override prefixes. */
102 for_each_insn_prefix(insn, i, p) {
105 attr = inat_get_opcode_attribute(p);
107 case INAT_MAKE_PREFIX(INAT_PFX_CS):
108 idx = INAT_SEG_REG_CS;
111 case INAT_MAKE_PREFIX(INAT_PFX_SS):
112 idx = INAT_SEG_REG_SS;
115 case INAT_MAKE_PREFIX(INAT_PFX_DS):
116 idx = INAT_SEG_REG_DS;
119 case INAT_MAKE_PREFIX(INAT_PFX_ES):
120 idx = INAT_SEG_REG_ES;
123 case INAT_MAKE_PREFIX(INAT_PFX_FS):
124 idx = INAT_SEG_REG_FS;
127 case INAT_MAKE_PREFIX(INAT_PFX_GS):
128 idx = INAT_SEG_REG_GS;
131 /* No default action needed. */
135 /* More than one segment override prefix leads to undefined behavior. */
136 if (num_overrides > 1)
143 * check_seg_overrides() - check if segment override prefixes are allowed
144 * @insn: Valid instruction with segment override prefixes
145 * @regoff: Operand offset, in pt_regs, for which the check is performed
147 * For a particular register used in register-indirect addressing, determine if
148 * segment override prefixes can be used. Specifically, no overrides are allowed
149 * for rDI if used with a string instruction.
153 * True if segment override prefixes can be used with the register indicated
154 * in @regoff. False if otherwise.
156 static bool check_seg_overrides(struct insn *insn, int regoff)
158 if (regoff == offsetof(struct pt_regs, di) && is_string_insn(insn))
165 * resolve_default_seg() - resolve default segment register index for an operand
166 * @insn: Instruction with opcode and address size. Must be valid.
167 * @regs: Register values as seen when entering kernel mode
168 * @off: Operand offset, in pt_regs, for which resolution is needed
170 * Resolve the default segment register index associated with the instruction
171 * operand register indicated by @off. Such index is resolved based on defaults
172 * described in the Intel Software Development Manual.
176 * If in protected mode, a constant identifying the segment register to use,
177 * among CS, SS, ES or DS. If in long mode, INAT_SEG_REG_IGNORE.
179 * -EINVAL in case of error.
181 static int resolve_default_seg(struct insn *insn, struct pt_regs *regs, int off)
183 if (any_64bit_mode(regs))
184 return INAT_SEG_REG_IGNORE;
186 * Resolve the default segment register as described in Section 3.7.4
187 * of the Intel Software Development Manual Vol. 1:
189 * + DS for all references involving r[ABCD]X, and rSI.
190 * + If used in a string instruction, ES for rDI. Otherwise, DS.
191 * + AX, CX and DX are not valid register operands in 16-bit address
192 * encodings but are valid for 32-bit and 64-bit encodings.
193 * + -EDOM is reserved to identify for cases in which no register
194 * is used (i.e., displacement-only addressing). Use DS.
195 * + SS for rSP or rBP.
200 case offsetof(struct pt_regs, ax):
201 case offsetof(struct pt_regs, cx):
202 case offsetof(struct pt_regs, dx):
203 /* Need insn to verify address size. */
204 if (insn->addr_bytes == 2)
210 case offsetof(struct pt_regs, bx):
211 case offsetof(struct pt_regs, si):
212 return INAT_SEG_REG_DS;
214 case offsetof(struct pt_regs, di):
215 if (is_string_insn(insn))
216 return INAT_SEG_REG_ES;
217 return INAT_SEG_REG_DS;
219 case offsetof(struct pt_regs, bp):
220 case offsetof(struct pt_regs, sp):
221 return INAT_SEG_REG_SS;
223 case offsetof(struct pt_regs, ip):
224 return INAT_SEG_REG_CS;
232 * resolve_seg_reg() - obtain segment register index
233 * @insn: Instruction with operands
234 * @regs: Register values as seen when entering kernel mode
235 * @regoff: Operand offset, in pt_regs, used to determine segment register
237 * Determine the segment register associated with the operands and, if
238 * applicable, prefixes and the instruction pointed by @insn.
240 * The segment register associated to an operand used in register-indirect
241 * addressing depends on:
243 * a) Whether running in long mode (in such a case segments are ignored, except
244 * if FS or GS are used).
246 * b) Whether segment override prefixes can be used. Certain instructions and
247 * registers do not allow override prefixes.
249 * c) Whether segment overrides prefixes are found in the instruction prefixes.
251 * d) If there are not segment override prefixes or they cannot be used, the
252 * default segment register associated with the operand register is used.
254 * The function checks first if segment override prefixes can be used with the
255 * operand indicated by @regoff. If allowed, obtain such overridden segment
256 * register index. Lastly, if not prefixes were found or cannot be used, resolve
257 * the segment register index to use based on the defaults described in the
258 * Intel documentation. In long mode, all segment register indexes will be
259 * ignored, except if overrides were found for FS or GS. All these operations
260 * are done using helper functions.
262 * The operand register, @regoff, is represented as the offset from the base of
265 * As stated, the main use of this function is to determine the segment register
266 * index based on the instruction, its operands and prefixes. Hence, @insn
267 * must be valid. However, if @regoff indicates rIP, we don't need to inspect
268 * @insn at all as in this case CS is used in all cases. This case is checked
269 * before proceeding further.
271 * Please note that this function does not return the value in the segment
272 * register (i.e., the segment selector) but our defined index. The segment
273 * selector needs to be obtained using get_segment_selector() and passing the
274 * segment register index resolved by this function.
278 * An index identifying the segment register to use, among CS, SS, DS,
279 * ES, FS, or GS. INAT_SEG_REG_IGNORE is returned if running in long mode.
281 * -EINVAL in case of error.
283 static int resolve_seg_reg(struct insn *insn, struct pt_regs *regs, int regoff)
288 * In the unlikely event of having to resolve the segment register
289 * index for rIP, do it first. Segment override prefixes should not
290 * be used. Hence, it is not necessary to inspect the instruction,
291 * which may be invalid at this point.
293 if (regoff == offsetof(struct pt_regs, ip)) {
294 if (any_64bit_mode(regs))
295 return INAT_SEG_REG_IGNORE;
297 return INAT_SEG_REG_CS;
303 if (!check_seg_overrides(insn, regoff))
304 return resolve_default_seg(insn, regs, regoff);
306 idx = get_seg_reg_override_idx(insn);
310 if (idx == INAT_SEG_REG_DEFAULT)
311 return resolve_default_seg(insn, regs, regoff);
314 * In long mode, segment override prefixes are ignored, except for
315 * overrides for FS and GS.
317 if (any_64bit_mode(regs)) {
318 if (idx != INAT_SEG_REG_FS &&
319 idx != INAT_SEG_REG_GS)
320 idx = INAT_SEG_REG_IGNORE;
327 * get_segment_selector() - obtain segment selector
328 * @regs: Register values as seen when entering kernel mode
329 * @seg_reg_idx: Segment register index to use
331 * Obtain the segment selector from any of the CS, SS, DS, ES, FS, GS segment
332 * registers. In CONFIG_X86_32, the segment is obtained from either pt_regs or
333 * kernel_vm86_regs as applicable. In CONFIG_X86_64, CS and SS are obtained
334 * from pt_regs. DS, ES, FS and GS are obtained by reading the actual CPU
335 * registers. This done for only for completeness as in CONFIG_X86_64 segment
336 * registers are ignored.
340 * Value of the segment selector, including null when running in
345 static short get_segment_selector(struct pt_regs *regs, int seg_reg_idx)
350 switch (seg_reg_idx) {
351 case INAT_SEG_REG_IGNORE:
353 case INAT_SEG_REG_CS:
354 return (unsigned short)(regs->cs & 0xffff);
355 case INAT_SEG_REG_SS:
356 return (unsigned short)(regs->ss & 0xffff);
357 case INAT_SEG_REG_DS:
358 savesegment(ds, sel);
360 case INAT_SEG_REG_ES:
361 savesegment(es, sel);
363 case INAT_SEG_REG_FS:
364 savesegment(fs, sel);
366 case INAT_SEG_REG_GS:
367 savesegment(gs, sel);
372 #else /* CONFIG_X86_32 */
373 struct kernel_vm86_regs *vm86regs = (struct kernel_vm86_regs *)regs;
375 if (v8086_mode(regs)) {
376 switch (seg_reg_idx) {
377 case INAT_SEG_REG_CS:
378 return (unsigned short)(regs->cs & 0xffff);
379 case INAT_SEG_REG_SS:
380 return (unsigned short)(regs->ss & 0xffff);
381 case INAT_SEG_REG_DS:
383 case INAT_SEG_REG_ES:
385 case INAT_SEG_REG_FS:
387 case INAT_SEG_REG_GS:
389 case INAT_SEG_REG_IGNORE:
395 switch (seg_reg_idx) {
396 case INAT_SEG_REG_CS:
397 return (unsigned short)(regs->cs & 0xffff);
398 case INAT_SEG_REG_SS:
399 return (unsigned short)(regs->ss & 0xffff);
400 case INAT_SEG_REG_DS:
401 return (unsigned short)(regs->ds & 0xffff);
402 case INAT_SEG_REG_ES:
403 return (unsigned short)(regs->es & 0xffff);
404 case INAT_SEG_REG_FS:
405 return (unsigned short)(regs->fs & 0xffff);
406 case INAT_SEG_REG_GS:
407 return get_user_gs(regs);
408 case INAT_SEG_REG_IGNORE:
412 #endif /* CONFIG_X86_64 */
415 static const int pt_regoff[] = {
416 offsetof(struct pt_regs, ax),
417 offsetof(struct pt_regs, cx),
418 offsetof(struct pt_regs, dx),
419 offsetof(struct pt_regs, bx),
420 offsetof(struct pt_regs, sp),
421 offsetof(struct pt_regs, bp),
422 offsetof(struct pt_regs, si),
423 offsetof(struct pt_regs, di),
425 offsetof(struct pt_regs, r8),
426 offsetof(struct pt_regs, r9),
427 offsetof(struct pt_regs, r10),
428 offsetof(struct pt_regs, r11),
429 offsetof(struct pt_regs, r12),
430 offsetof(struct pt_regs, r13),
431 offsetof(struct pt_regs, r14),
432 offsetof(struct pt_regs, r15),
434 offsetof(struct pt_regs, ds),
435 offsetof(struct pt_regs, es),
436 offsetof(struct pt_regs, fs),
437 offsetof(struct pt_regs, gs),
441 int pt_regs_offset(struct pt_regs *regs, int regno)
443 if ((unsigned)regno < ARRAY_SIZE(pt_regoff))
444 return pt_regoff[regno];
448 static int get_regno(struct insn *insn, enum reg_type type)
450 int nr_registers = ARRAY_SIZE(pt_regoff);
454 * Don't possibly decode a 32-bit instructions as
455 * reading a 64-bit-only register.
457 if (IS_ENABLED(CONFIG_X86_64) && !insn->x86_64)
462 regno = X86_MODRM_RM(insn->modrm.value);
465 * ModRM.mod == 0 and ModRM.rm == 5 means a 32-bit displacement
466 * follows the ModRM byte.
468 if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5)
471 if (X86_REX_B(insn->rex_prefix.value))
476 regno = X86_MODRM_REG(insn->modrm.value);
478 if (X86_REX_R(insn->rex_prefix.value))
483 regno = X86_SIB_INDEX(insn->sib.value);
484 if (X86_REX_X(insn->rex_prefix.value))
488 * If ModRM.mod != 3 and SIB.index = 4 the scale*index
489 * portion of the address computation is null. This is
490 * true only if REX.X is 0. In such a case, the SIB index
491 * is used in the address computation.
493 if (X86_MODRM_MOD(insn->modrm.value) != 3 && regno == 4)
498 regno = X86_SIB_BASE(insn->sib.value);
500 * If ModRM.mod is 0 and SIB.base == 5, the base of the
501 * register-indirect addressing is 0. In this case, a
502 * 32-bit displacement follows the SIB byte.
504 if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5)
507 if (X86_REX_B(insn->rex_prefix.value))
512 pr_err_ratelimited("invalid register type: %d\n", type);
516 if (regno >= nr_registers) {
517 WARN_ONCE(1, "decoded an instruction with an invalid register");
523 static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
526 int regno = get_regno(insn, type);
531 return pt_regs_offset(regs, regno);
535 * get_reg_offset_16() - Obtain offset of register indicated by instruction
536 * @insn: Instruction containing ModRM byte
537 * @regs: Register values as seen when entering kernel mode
538 * @offs1: Offset of the first operand register
539 * @offs2: Offset of the second operand register, if applicable
541 * Obtain the offset, in pt_regs, of the registers indicated by the ModRM byte
542 * in @insn. This function is to be used with 16-bit address encodings. The
543 * @offs1 and @offs2 will be written with the offset of the two registers
544 * indicated by the instruction. In cases where any of the registers is not
545 * referenced by the instruction, the value will be set to -EDOM.
549 * 0 on success, -EINVAL on error.
551 static int get_reg_offset_16(struct insn *insn, struct pt_regs *regs,
552 int *offs1, int *offs2)
555 * 16-bit addressing can use one or two registers. Specifics of
556 * encodings are given in Table 2-1. "16-Bit Addressing Forms with the
557 * ModR/M Byte" of the Intel Software Development Manual.
559 static const int regoff1[] = {
560 offsetof(struct pt_regs, bx),
561 offsetof(struct pt_regs, bx),
562 offsetof(struct pt_regs, bp),
563 offsetof(struct pt_regs, bp),
564 offsetof(struct pt_regs, si),
565 offsetof(struct pt_regs, di),
566 offsetof(struct pt_regs, bp),
567 offsetof(struct pt_regs, bx),
570 static const int regoff2[] = {
571 offsetof(struct pt_regs, si),
572 offsetof(struct pt_regs, di),
573 offsetof(struct pt_regs, si),
574 offsetof(struct pt_regs, di),
581 if (!offs1 || !offs2)
584 /* Operand is a register, use the generic function. */
585 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
586 *offs1 = insn_get_modrm_rm_off(insn, regs);
591 *offs1 = regoff1[X86_MODRM_RM(insn->modrm.value)];
592 *offs2 = regoff2[X86_MODRM_RM(insn->modrm.value)];
595 * If ModRM.mod is 0 and ModRM.rm is 110b, then we use displacement-
596 * only addressing. This means that no registers are involved in
597 * computing the effective address. Thus, ensure that the first
598 * register offset is invalid. The second register offset is already
599 * invalid under the aforementioned conditions.
601 if ((X86_MODRM_MOD(insn->modrm.value) == 0) &&
602 (X86_MODRM_RM(insn->modrm.value) == 6))
609 * get_desc() - Obtain contents of a segment descriptor
610 * @out: Segment descriptor contents on success
611 * @sel: Segment selector
613 * Given a segment selector, obtain a pointer to the segment descriptor.
614 * Both global and local descriptor tables are supported.
618 * True on success, false on failure.
622 static bool get_desc(struct desc_struct *out, unsigned short sel)
624 struct desc_ptr gdt_desc = {0, 0};
625 unsigned long desc_base;
627 #ifdef CONFIG_MODIFY_LDT_SYSCALL
628 if ((sel & SEGMENT_TI_MASK) == SEGMENT_LDT) {
629 bool success = false;
630 struct ldt_struct *ldt;
632 /* Bits [15:3] contain the index of the desired entry. */
635 mutex_lock(¤t->active_mm->context.lock);
636 ldt = current->active_mm->context.ldt;
637 if (ldt && sel < ldt->nr_entries) {
638 *out = ldt->entries[sel];
642 mutex_unlock(¤t->active_mm->context.lock);
647 native_store_gdt(&gdt_desc);
650 * Segment descriptors have a size of 8 bytes. Thus, the index is
651 * multiplied by 8 to obtain the memory offset of the desired descriptor
652 * from the base of the GDT. As bits [15:3] of the segment selector
653 * contain the index, it can be regarded as multiplied by 8 already.
654 * All that remains is to clear bits [2:0].
656 desc_base = sel & ~(SEGMENT_RPL_MASK | SEGMENT_TI_MASK);
658 if (desc_base > gdt_desc.size)
661 *out = *(struct desc_struct *)(gdt_desc.address + desc_base);
666 * insn_get_seg_base() - Obtain base address of segment descriptor.
667 * @regs: Register values as seen when entering kernel mode
668 * @seg_reg_idx: Index of the segment register pointing to seg descriptor
670 * Obtain the base address of the segment as indicated by the segment descriptor
671 * pointed by the segment selector. The segment selector is obtained from the
672 * input segment register index @seg_reg_idx.
676 * In protected mode, base address of the segment. Zero in long mode,
677 * except when FS or GS are used. In virtual-8086 mode, the segment
678 * selector shifted 4 bits to the right.
680 * -1L in case of error.
682 unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
684 struct desc_struct desc;
687 sel = get_segment_selector(regs, seg_reg_idx);
691 if (v8086_mode(regs))
693 * Base is simply the segment selector shifted 4
696 return (unsigned long)(sel << 4);
698 if (any_64bit_mode(regs)) {
700 * Only FS or GS will have a base address, the rest of
701 * the segments' bases are forced to 0.
705 if (seg_reg_idx == INAT_SEG_REG_FS) {
706 rdmsrl(MSR_FS_BASE, base);
707 } else if (seg_reg_idx == INAT_SEG_REG_GS) {
709 * swapgs was called at the kernel entry point. Thus,
710 * MSR_KERNEL_GS_BASE will have the user-space GS base.
713 rdmsrl(MSR_KERNEL_GS_BASE, base);
715 rdmsrl(MSR_GS_BASE, base);
722 /* In protected mode the segment selector cannot be null. */
726 if (!get_desc(&desc, sel))
729 return get_desc_base(&desc);
733 * get_seg_limit() - Obtain the limit of a segment descriptor
734 * @regs: Register values as seen when entering kernel mode
735 * @seg_reg_idx: Index of the segment register pointing to seg descriptor
737 * Obtain the limit of the segment as indicated by the segment descriptor
738 * pointed by the segment selector. The segment selector is obtained from the
739 * input segment register index @seg_reg_idx.
743 * In protected mode, the limit of the segment descriptor in bytes.
744 * In long mode and virtual-8086 mode, segment limits are not enforced. Thus,
745 * limit is returned as -1L to imply a limit-less segment.
747 * Zero is returned on error.
749 static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
751 struct desc_struct desc;
755 sel = get_segment_selector(regs, seg_reg_idx);
759 if (any_64bit_mode(regs) || v8086_mode(regs))
765 if (!get_desc(&desc, sel))
769 * If the granularity bit is set, the limit is given in multiples
770 * of 4096. This also means that the 12 least significant bits are
771 * not tested when checking the segment limits. In practice,
772 * this means that the segment ends in (limit << 12) + 0xfff.
774 limit = get_desc_limit(&desc);
776 limit = (limit << 12) + 0xfff;
782 * insn_get_code_seg_params() - Obtain code segment parameters
783 * @regs: Structure with register values as seen when entering kernel mode
785 * Obtain address and operand sizes of the code segment. It is obtained from the
786 * selector contained in the CS register in regs. In protected mode, the default
787 * address is determined by inspecting the L and D bits of the segment
788 * descriptor. In virtual-8086 mode, the default is always two bytes for both
789 * address and operand sizes.
793 * An int containing ORed-in default parameters on success.
797 int insn_get_code_seg_params(struct pt_regs *regs)
799 struct desc_struct desc;
802 if (v8086_mode(regs))
803 /* Address and operand size are both 16-bit. */
804 return INSN_CODE_SEG_PARAMS(2, 2);
806 sel = get_segment_selector(regs, INAT_SEG_REG_CS);
810 if (!get_desc(&desc, sel))
814 * The most significant byte of the Type field of the segment descriptor
815 * determines whether a segment contains data or code. If this is a data
816 * segment, return error.
818 if (!(desc.type & BIT(3)))
821 switch ((desc.l << 1) | desc.d) {
823 * Legacy mode. CS.L=0, CS.D=0. Address and operand size are
826 return INSN_CODE_SEG_PARAMS(2, 2);
828 * Legacy mode. CS.L=0, CS.D=1. Address and operand size are
831 return INSN_CODE_SEG_PARAMS(4, 4);
833 * IA-32e 64-bit mode. CS.L=1, CS.D=0. Address size is 64-bit;
834 * operand size is 32-bit.
836 return INSN_CODE_SEG_PARAMS(4, 8);
837 case 3: /* Invalid setting. CS.L=1, CS.D=1 */
845 * insn_get_modrm_rm_off() - Obtain register in r/m part of the ModRM byte
846 * @insn: Instruction containing the ModRM byte
847 * @regs: Register values as seen when entering kernel mode
851 * The register indicated by the r/m part of the ModRM byte. The
852 * register is obtained as an offset from the base of pt_regs. In specific
853 * cases, the returned value can be -EDOM to indicate that the particular value
854 * of ModRM does not refer to a register and shall be ignored.
856 int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs)
858 return get_reg_offset(insn, regs, REG_TYPE_RM);
862 * insn_get_modrm_reg_off() - Obtain register in reg part of the ModRM byte
863 * @insn: Instruction containing the ModRM byte
864 * @regs: Register values as seen when entering kernel mode
868 * The register indicated by the reg part of the ModRM byte. The
869 * register is obtained as an offset from the base of pt_regs.
871 int insn_get_modrm_reg_off(struct insn *insn, struct pt_regs *regs)
873 return get_reg_offset(insn, regs, REG_TYPE_REG);
877 * get_seg_base_limit() - obtain base address and limit of a segment
878 * @insn: Instruction. Must be valid.
879 * @regs: Register values as seen when entering kernel mode
880 * @regoff: Operand offset, in pt_regs, used to resolve segment descriptor
881 * @base: Obtained segment base
882 * @limit: Obtained segment limit
884 * Obtain the base address and limit of the segment associated with the operand
885 * @regoff and, if any or allowed, override prefixes in @insn. This function is
886 * different from insn_get_seg_base() as the latter does not resolve the segment
887 * associated with the instruction operand. If a limit is not needed (e.g.,
888 * when running in long mode), @limit can be NULL.
892 * 0 on success. @base and @limit will contain the base address and of the
893 * resolved segment, respectively.
897 static int get_seg_base_limit(struct insn *insn, struct pt_regs *regs,
898 int regoff, unsigned long *base,
899 unsigned long *limit)
906 seg_reg_idx = resolve_seg_reg(insn, regs, regoff);
910 *base = insn_get_seg_base(regs, seg_reg_idx);
917 *limit = get_seg_limit(regs, seg_reg_idx);
925 * get_eff_addr_reg() - Obtain effective address from register operand
926 * @insn: Instruction. Must be valid.
927 * @regs: Register values as seen when entering kernel mode
928 * @regoff: Obtained operand offset, in pt_regs, with the effective address
929 * @eff_addr: Obtained effective address
931 * Obtain the effective address stored in the register operand as indicated by
932 * the ModRM byte. This function is to be used only with register addressing
933 * (i.e., ModRM.mod is 3). The effective address is saved in @eff_addr. The
934 * register operand, as an offset from the base of pt_regs, is saved in @regoff;
935 * such offset can then be used to resolve the segment associated with the
936 * operand. This function can be used with any of the supported address sizes
941 * 0 on success. @eff_addr will have the effective address stored in the
942 * operand indicated by ModRM. @regoff will have such operand as an offset from
943 * the base of pt_regs.
947 static int get_eff_addr_reg(struct insn *insn, struct pt_regs *regs,
948 int *regoff, long *eff_addr)
952 ret = insn_get_modrm(insn);
956 if (X86_MODRM_MOD(insn->modrm.value) != 3)
959 *regoff = get_reg_offset(insn, regs, REG_TYPE_RM);
963 /* Ignore bytes that are outside the address size. */
964 if (insn->addr_bytes == 2)
965 *eff_addr = regs_get_register(regs, *regoff) & 0xffff;
966 else if (insn->addr_bytes == 4)
967 *eff_addr = regs_get_register(regs, *regoff) & 0xffffffff;
968 else /* 64-bit address */
969 *eff_addr = regs_get_register(regs, *regoff);
975 * get_eff_addr_modrm() - Obtain referenced effective address via ModRM
976 * @insn: Instruction. Must be valid.
977 * @regs: Register values as seen when entering kernel mode
978 * @regoff: Obtained operand offset, in pt_regs, associated with segment
979 * @eff_addr: Obtained effective address
981 * Obtain the effective address referenced by the ModRM byte of @insn. After
982 * identifying the registers involved in the register-indirect memory reference,
983 * its value is obtained from the operands in @regs. The computed address is
984 * stored @eff_addr. Also, the register operand that indicates the associated
985 * segment is stored in @regoff, this parameter can later be used to determine
990 * 0 on success. @eff_addr will have the referenced effective address. @regoff
991 * will have a register, as an offset from the base of pt_regs, that can be used
992 * to resolve the associated segment.
996 static int get_eff_addr_modrm(struct insn *insn, struct pt_regs *regs,
997 int *regoff, long *eff_addr)
1002 if (insn->addr_bytes != 8 && insn->addr_bytes != 4)
1005 ret = insn_get_modrm(insn);
1009 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1012 *regoff = get_reg_offset(insn, regs, REG_TYPE_RM);
1015 * -EDOM means that we must ignore the address_offset. In such a case,
1016 * in 64-bit mode the effective address relative to the rIP of the
1017 * following instruction.
1019 if (*regoff == -EDOM) {
1020 if (any_64bit_mode(regs))
1021 tmp = regs->ip + insn->length;
1024 } else if (*regoff < 0) {
1027 tmp = regs_get_register(regs, *regoff);
1030 if (insn->addr_bytes == 4) {
1031 int addr32 = (int)(tmp & 0xffffffff) + insn->displacement.value;
1033 *eff_addr = addr32 & 0xffffffff;
1035 *eff_addr = tmp + insn->displacement.value;
1042 * get_eff_addr_modrm_16() - Obtain referenced effective address via ModRM
1043 * @insn: Instruction. Must be valid.
1044 * @regs: Register values as seen when entering kernel mode
1045 * @regoff: Obtained operand offset, in pt_regs, associated with segment
1046 * @eff_addr: Obtained effective address
1048 * Obtain the 16-bit effective address referenced by the ModRM byte of @insn.
1049 * After identifying the registers involved in the register-indirect memory
1050 * reference, its value is obtained from the operands in @regs. The computed
1051 * address is stored @eff_addr. Also, the register operand that indicates
1052 * the associated segment is stored in @regoff, this parameter can later be used
1053 * to determine such segment.
1057 * 0 on success. @eff_addr will have the referenced effective address. @regoff
1058 * will have a register, as an offset from the base of pt_regs, that can be used
1059 * to resolve the associated segment.
1063 static int get_eff_addr_modrm_16(struct insn *insn, struct pt_regs *regs,
1064 int *regoff, short *eff_addr)
1066 int addr_offset1, addr_offset2, ret;
1067 short addr1 = 0, addr2 = 0, displacement;
1069 if (insn->addr_bytes != 2)
1072 insn_get_modrm(insn);
1074 if (!insn->modrm.nbytes)
1077 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1080 ret = get_reg_offset_16(insn, regs, &addr_offset1, &addr_offset2);
1085 * Don't fail on invalid offset values. They might be invalid because
1086 * they cannot be used for this particular value of ModRM. Instead, use
1087 * them in the computation only if they contain a valid value.
1089 if (addr_offset1 != -EDOM)
1090 addr1 = regs_get_register(regs, addr_offset1) & 0xffff;
1092 if (addr_offset2 != -EDOM)
1093 addr2 = regs_get_register(regs, addr_offset2) & 0xffff;
1095 displacement = insn->displacement.value & 0xffff;
1096 *eff_addr = addr1 + addr2 + displacement;
1099 * The first operand register could indicate to use of either SS or DS
1100 * registers to obtain the segment selector. The second operand
1101 * register can only indicate the use of DS. Thus, the first operand
1102 * will be used to obtain the segment selector.
1104 *regoff = addr_offset1;
1110 * get_eff_addr_sib() - Obtain referenced effective address via SIB
1111 * @insn: Instruction. Must be valid.
1112 * @regs: Register values as seen when entering kernel mode
1113 * @regoff: Obtained operand offset, in pt_regs, associated with segment
1114 * @eff_addr: Obtained effective address
1116 * Obtain the effective address referenced by the SIB byte of @insn. After
1117 * identifying the registers involved in the indexed, register-indirect memory
1118 * reference, its value is obtained from the operands in @regs. The computed
1119 * address is stored @eff_addr. Also, the register operand that indicates the
1120 * associated segment is stored in @regoff, this parameter can later be used to
1121 * determine such segment.
1125 * 0 on success. @eff_addr will have the referenced effective address.
1126 * @base_offset will have a register, as an offset from the base of pt_regs,
1127 * that can be used to resolve the associated segment.
1129 * Negative value on error.
1131 static int get_eff_addr_sib(struct insn *insn, struct pt_regs *regs,
1132 int *base_offset, long *eff_addr)
1138 if (insn->addr_bytes != 8 && insn->addr_bytes != 4)
1141 ret = insn_get_modrm(insn);
1145 if (!insn->modrm.nbytes)
1148 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1151 ret = insn_get_sib(insn);
1155 if (!insn->sib.nbytes)
1158 *base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE);
1159 indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
1162 * Negative values in the base and index offset means an error when
1163 * decoding the SIB byte. Except -EDOM, which means that the registers
1164 * should not be used in the address computation.
1166 if (*base_offset == -EDOM)
1168 else if (*base_offset < 0)
1171 base = regs_get_register(regs, *base_offset);
1173 if (indx_offset == -EDOM)
1175 else if (indx_offset < 0)
1178 indx = regs_get_register(regs, indx_offset);
1180 if (insn->addr_bytes == 4) {
1181 int addr32, base32, idx32;
1183 base32 = base & 0xffffffff;
1184 idx32 = indx & 0xffffffff;
1186 addr32 = base32 + idx32 * (1 << X86_SIB_SCALE(insn->sib.value));
1187 addr32 += insn->displacement.value;
1189 *eff_addr = addr32 & 0xffffffff;
1191 *eff_addr = base + indx * (1 << X86_SIB_SCALE(insn->sib.value));
1192 *eff_addr += insn->displacement.value;
1199 * get_addr_ref_16() - Obtain the 16-bit address referred by instruction
1200 * @insn: Instruction containing ModRM byte and displacement
1201 * @regs: Register values as seen when entering kernel mode
1203 * This function is to be used with 16-bit address encodings. Obtain the memory
1204 * address referred by the instruction's ModRM and displacement bytes. Also, the
1205 * segment used as base is determined by either any segment override prefixes in
1206 * @insn or the default segment of the registers involved in the address
1207 * computation. In protected mode, segment limits are enforced.
1211 * Linear address referenced by the instruction operands on success.
1215 static void __user *get_addr_ref_16(struct insn *insn, struct pt_regs *regs)
1217 unsigned long linear_addr = -1L, seg_base, seg_limit;
1222 if (insn_get_displacement(insn))
1225 if (insn->addr_bytes != 2)
1228 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1229 ret = get_eff_addr_reg(insn, regs, ®off, &tmp);
1235 ret = get_eff_addr_modrm_16(insn, regs, ®off, &eff_addr);
1240 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, &seg_limit);
1245 * Before computing the linear address, make sure the effective address
1246 * is within the limits of the segment. In virtual-8086 mode, segment
1247 * limits are not enforced. In such a case, the segment limit is -1L to
1248 * reflect this fact.
1250 if ((unsigned long)(eff_addr & 0xffff) > seg_limit)
1253 linear_addr = (unsigned long)(eff_addr & 0xffff) + seg_base;
1255 /* Limit linear address to 20 bits */
1256 if (v8086_mode(regs))
1257 linear_addr &= 0xfffff;
1260 return (void __user *)linear_addr;
1264 * get_addr_ref_32() - Obtain a 32-bit linear address
1265 * @insn: Instruction with ModRM, SIB bytes and displacement
1266 * @regs: Register values as seen when entering kernel mode
1268 * This function is to be used with 32-bit address encodings to obtain the
1269 * linear memory address referred by the instruction's ModRM, SIB,
1270 * displacement bytes and segment base address, as applicable. If in protected
1271 * mode, segment limits are enforced.
1275 * Linear address referenced by instruction and registers on success.
1279 static void __user *get_addr_ref_32(struct insn *insn, struct pt_regs *regs)
1281 unsigned long linear_addr = -1L, seg_base, seg_limit;
1282 int eff_addr, regoff;
1286 if (insn->addr_bytes != 4)
1289 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1290 ret = get_eff_addr_reg(insn, regs, ®off, &tmp);
1297 if (insn->sib.nbytes) {
1298 ret = get_eff_addr_sib(insn, regs, ®off, &tmp);
1304 ret = get_eff_addr_modrm(insn, regs, ®off, &tmp);
1312 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, &seg_limit);
1317 * In protected mode, before computing the linear address, make sure
1318 * the effective address is within the limits of the segment.
1319 * 32-bit addresses can be used in long and virtual-8086 modes if an
1320 * address override prefix is used. In such cases, segment limits are
1321 * not enforced. When in virtual-8086 mode, the segment limit is -1L
1322 * to reflect this situation.
1324 * After computed, the effective address is treated as an unsigned
1327 if (!any_64bit_mode(regs) && ((unsigned int)eff_addr > seg_limit))
1331 * Even though 32-bit address encodings are allowed in virtual-8086
1332 * mode, the address range is still limited to [0x-0xffff].
1334 if (v8086_mode(regs) && (eff_addr & ~0xffff))
1338 * Data type long could be 64 bits in size. Ensure that our 32-bit
1339 * effective address is not sign-extended when computing the linear
1342 linear_addr = (unsigned long)(eff_addr & 0xffffffff) + seg_base;
1344 /* Limit linear address to 20 bits */
1345 if (v8086_mode(regs))
1346 linear_addr &= 0xfffff;
1349 return (void __user *)linear_addr;
1353 * get_addr_ref_64() - Obtain a 64-bit linear address
1354 * @insn: Instruction struct with ModRM and SIB bytes and displacement
1355 * @regs: Structure with register values as seen when entering kernel mode
1357 * This function is to be used with 64-bit address encodings to obtain the
1358 * linear memory address referred by the instruction's ModRM, SIB,
1359 * displacement bytes and segment base address, as applicable.
1363 * Linear address referenced by instruction and registers on success.
1367 #ifndef CONFIG_X86_64
1368 static void __user *get_addr_ref_64(struct insn *insn, struct pt_regs *regs)
1370 return (void __user *)-1L;
1373 static void __user *get_addr_ref_64(struct insn *insn, struct pt_regs *regs)
1375 unsigned long linear_addr = -1L, seg_base;
1379 if (insn->addr_bytes != 8)
1382 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1383 ret = get_eff_addr_reg(insn, regs, ®off, &eff_addr);
1388 if (insn->sib.nbytes) {
1389 ret = get_eff_addr_sib(insn, regs, ®off, &eff_addr);
1393 ret = get_eff_addr_modrm(insn, regs, ®off, &eff_addr);
1400 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, NULL);
1404 linear_addr = (unsigned long)eff_addr + seg_base;
1407 return (void __user *)linear_addr;
1409 #endif /* CONFIG_X86_64 */
1412 * insn_get_addr_ref() - Obtain the linear address referred by instruction
1413 * @insn: Instruction structure containing ModRM byte and displacement
1414 * @regs: Structure with register values as seen when entering kernel mode
1416 * Obtain the linear address referred by the instruction's ModRM, SIB and
1417 * displacement bytes, and segment base, as applicable. In protected mode,
1418 * segment limits are enforced.
1422 * Linear address referenced by instruction and registers on success.
1426 void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs)
1429 return (void __user *)-1L;
1431 switch (insn->addr_bytes) {
1433 return get_addr_ref_16(insn, regs);
1435 return get_addr_ref_32(insn, regs);
1437 return get_addr_ref_64(insn, regs);
1439 return (void __user *)-1L;
1443 int insn_get_effective_ip(struct pt_regs *regs, unsigned long *ip)
1445 unsigned long seg_base = 0;
1448 * If not in user-space long mode, a custom code segment could be in
1449 * use. This is true in protected mode (if the process defined a local
1450 * descriptor table), or virtual-8086 mode. In most of the cases
1451 * seg_base will be zero as in USER_CS.
1453 if (!user_64bit_mode(regs)) {
1454 seg_base = insn_get_seg_base(regs, INAT_SEG_REG_CS);
1455 if (seg_base == -1L)
1459 *ip = seg_base + regs->ip;
1465 * insn_fetch_from_user() - Copy instruction bytes from user-space memory
1466 * @regs: Structure with register values as seen when entering kernel mode
1467 * @buf: Array to store the fetched instruction
1469 * Gets the linear address of the instruction and copies the instruction bytes
1474 * - number of instruction bytes copied.
1475 * - 0 if nothing was copied.
1476 * - -EINVAL if the linear address of the instruction could not be calculated
1478 int insn_fetch_from_user(struct pt_regs *regs, unsigned char buf[MAX_INSN_SIZE])
1483 if (insn_get_effective_ip(regs, &ip))
1486 not_copied = copy_from_user(buf, (void __user *)ip, MAX_INSN_SIZE);
1488 return MAX_INSN_SIZE - not_copied;
1492 * insn_fetch_from_user_inatomic() - Copy instruction bytes from user-space memory
1493 * while in atomic code
1494 * @regs: Structure with register values as seen when entering kernel mode
1495 * @buf: Array to store the fetched instruction
1497 * Gets the linear address of the instruction and copies the instruction bytes
1498 * to the buf. This function must be used in atomic context.
1502 * - number of instruction bytes copied.
1503 * - 0 if nothing was copied.
1504 * - -EINVAL if the linear address of the instruction could not be calculated.
1506 int insn_fetch_from_user_inatomic(struct pt_regs *regs, unsigned char buf[MAX_INSN_SIZE])
1511 if (insn_get_effective_ip(regs, &ip))
1514 not_copied = __copy_from_user_inatomic(buf, (void __user *)ip, MAX_INSN_SIZE);
1516 return MAX_INSN_SIZE - not_copied;
1520 * insn_decode_from_regs() - Decode an instruction
1521 * @insn: Structure to store decoded instruction
1522 * @regs: Structure with register values as seen when entering kernel mode
1523 * @buf: Buffer containing the instruction bytes
1524 * @buf_size: Number of instruction bytes available in buf
1526 * Decodes the instruction provided in buf and stores the decoding results in
1527 * insn. Also determines the correct address and operand sizes.
1531 * True if instruction was decoded, False otherwise.
1533 bool insn_decode_from_regs(struct insn *insn, struct pt_regs *regs,
1534 unsigned char buf[MAX_INSN_SIZE], int buf_size)
1538 insn_init(insn, buf, buf_size, user_64bit_mode(regs));
1541 * Override the default operand and address sizes with what is specified
1542 * in the code segment descriptor. The instruction decoder only sets
1543 * the address size it to either 4 or 8 address bytes and does nothing
1544 * for the operand bytes. This OK for most of the cases, but we could
1545 * have special cases where, for instance, a 16-bit code segment
1546 * descriptor is used.
1547 * If there is an address override prefix, the instruction decoder
1548 * correctly updates these values, even for 16-bit defaults.
1550 seg_defs = insn_get_code_seg_params(regs);
1551 if (seg_defs == -EINVAL)
1554 insn->addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs);
1555 insn->opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs);
1557 if (insn_get_length(insn))
1560 if (buf_size < insn->length)