include/ufs/ufs.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Universal Flash Storage Host controller driver
   4  * Copyright (C) 2011-2013 Samsung India Software Operations
   5  *
   6  * Authors:
   7  *      Santosh Yaraganavi <santosh.sy@samsung.com>
   8  *      Vinayak Holikatti <h.vinayak@samsung.com>
   9  */
  10
  11 #ifndef _UFS_H
  12 #define _UFS_H
  13
  14 #include <linux/bitops.h>
  15 #include <linux/types.h>
  16 #include <uapi/scsi/scsi_bsg_ufs.h>
  17
  18 /*
  19  * Using static_assert() is not allowed in UAPI header files. Hence the check
  20  * in this header file of the size of struct utp_upiu_header.
  21  */
  22 static_assert(sizeof(struct utp_upiu_header) == 12);
  23
  24 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
  25 #define QUERY_DESC_MAX_SIZE       255
  26 #define QUERY_DESC_MIN_SIZE       2
  27 #define QUERY_DESC_HDR_SIZE       2
  28 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
  29                                         (sizeof(struct utp_upiu_header)))
  30 #define UFS_SENSE_SIZE  18
  31
  32 /*
  33  * UFS device may have standard LUs and LUN id could be from 0x00 to
  34  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
  35  * UFS device may also have the Well Known LUs (also referred as W-LU)
  36  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
  37  * the "Extended Addressing Format" which means the W-LUNs would be
  38  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
  39  * This means max. LUN number reported from UFS device could be 0xC17F.
  40  */
  41 #define UFS_UPIU_MAX_UNIT_NUM_ID        0x7F
  42 #define UFS_MAX_LUNS            (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
  43 #define UFS_UPIU_WLUN_ID        (1 << 7)
  44
  45 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
  46 #define UFS_UPIU_MAX_WB_LUN_ID  8
  47
  48 /*
  49  * WriteBooster buffer lifetime has a limit setted by vendor.
  50  * If it is over the limit, WriteBooster feature will be disabled.
  51  */
  52 #define UFS_WB_EXCEED_LIFETIME          0x0B
  53
  54 /*
  55  * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet
  56  */
  57 #define EHS_OFFSET_IN_RESPONSE 32
  58
  59 /* Well known logical unit id in LUN field of UPIU */
  60 enum {
  61         UFS_UPIU_REPORT_LUNS_WLUN       = 0x81,
  62         UFS_UPIU_UFS_DEVICE_WLUN        = 0xD0,
  63         UFS_UPIU_BOOT_WLUN              = 0xB0,
  64         UFS_UPIU_RPMB_WLUN              = 0xC4,
  65 };
  66
  67 /*
  68  * UFS Protocol Information Unit related definitions
  69  */
  70
  71 /* Task management functions */
  72 enum {
  73         UFS_ABORT_TASK          = 0x01,
  74         UFS_ABORT_TASK_SET      = 0x02,
  75         UFS_CLEAR_TASK_SET      = 0x04,
  76         UFS_LOGICAL_RESET       = 0x08,
  77         UFS_QUERY_TASK          = 0x80,
  78         UFS_QUERY_TASK_SET      = 0x81,
  79 };
  80
  81 /* UTP UPIU Transaction Codes Initiator to Target */
  82 enum upiu_request_transaction {
  83         UPIU_TRANSACTION_NOP_OUT        = 0x00,
  84         UPIU_TRANSACTION_COMMAND        = 0x01,
  85         UPIU_TRANSACTION_DATA_OUT       = 0x02,
  86         UPIU_TRANSACTION_TASK_REQ       = 0x04,
  87         UPIU_TRANSACTION_QUERY_REQ      = 0x16,
  88 };
  89
  90 /* UTP UPIU Transaction Codes Target to Initiator */
  91 enum upiu_response_transaction {
  92         UPIU_TRANSACTION_NOP_IN         = 0x20,
  93         UPIU_TRANSACTION_RESPONSE       = 0x21,
  94         UPIU_TRANSACTION_DATA_IN        = 0x22,
  95         UPIU_TRANSACTION_TASK_RSP       = 0x24,
  96         UPIU_TRANSACTION_READY_XFER     = 0x31,
  97         UPIU_TRANSACTION_QUERY_RSP      = 0x36,
  98         UPIU_TRANSACTION_REJECT_UPIU    = 0x3F,
  99 };
 100
 101 /* UPIU Read/Write flags */
 102 enum {
 103         UPIU_CMD_FLAGS_NONE     = 0x00,
 104         UPIU_CMD_FLAGS_WRITE    = 0x20,
 105         UPIU_CMD_FLAGS_READ     = 0x40,
 106 };
 107
 108 /* UPIU response flags */
 109 enum {
 110         UPIU_RSP_FLAG_UNDERFLOW = 0x20,
 111         UPIU_RSP_FLAG_OVERFLOW  = 0x40,
 112 };
 113
 114 /* UPIU Task Attributes */
 115 enum {
 116         UPIU_TASK_ATTR_SIMPLE   = 0x00,
 117         UPIU_TASK_ATTR_ORDERED  = 0x01,
 118         UPIU_TASK_ATTR_HEADQ    = 0x02,
 119         UPIU_TASK_ATTR_ACA      = 0x03,
 120 };
 121
 122 /* UPIU Query request function */
 123 enum {
 124         UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
 125         UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
 126 };
 127
 128 /* Flag idn for Query Requests*/
 129 enum flag_idn {
 130         QUERY_FLAG_IDN_FDEVICEINIT                      = 0x01,
 131         QUERY_FLAG_IDN_PERMANENT_WPE                    = 0x02,
 132         QUERY_FLAG_IDN_PWR_ON_WPE                       = 0x03,
 133         QUERY_FLAG_IDN_BKOPS_EN                         = 0x04,
 134         QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE            = 0x05,
 135         QUERY_FLAG_IDN_PURGE_ENABLE                     = 0x06,
 136         QUERY_FLAG_IDN_RESERVED2                        = 0x07,
 137         QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL              = 0x08,
 138         QUERY_FLAG_IDN_BUSY_RTC                         = 0x09,
 139         QUERY_FLAG_IDN_RESERVED3                        = 0x0A,
 140         QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE    = 0x0B,
 141         QUERY_FLAG_IDN_WB_EN                            = 0x0E,
 142         QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
 143         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
 144         QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
 145         QUERY_FLAG_IDN_HPB_EN                           = 0x12,
 146 };
 147
 148 /* Attribute idn for Query requests */
 149 enum attr_idn {
 150         QUERY_ATTR_IDN_BOOT_LU_EN               = 0x00,
 151         QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD       = 0x01,
 152         QUERY_ATTR_IDN_POWER_MODE               = 0x02,
 153         QUERY_ATTR_IDN_ACTIVE_ICC_LVL           = 0x03,
 154         QUERY_ATTR_IDN_OOO_DATA_EN              = 0x04,
 155         QUERY_ATTR_IDN_BKOPS_STATUS             = 0x05,
 156         QUERY_ATTR_IDN_PURGE_STATUS             = 0x06,
 157         QUERY_ATTR_IDN_MAX_DATA_IN              = 0x07,
 158         QUERY_ATTR_IDN_MAX_DATA_OUT             = 0x08,
 159         QUERY_ATTR_IDN_DYN_CAP_NEEDED           = 0x09,
 160         QUERY_ATTR_IDN_REF_CLK_FREQ             = 0x0A,
 161         QUERY_ATTR_IDN_CONF_DESC_LOCK           = 0x0B,
 162         QUERY_ATTR_IDN_MAX_NUM_OF_RTT           = 0x0C,
 163         QUERY_ATTR_IDN_EE_CONTROL               = 0x0D,
 164         QUERY_ATTR_IDN_EE_STATUS                = 0x0E,
 165         QUERY_ATTR_IDN_SECONDS_PASSED           = 0x0F,
 166         QUERY_ATTR_IDN_CNTX_CONF                = 0x10,
 167         QUERY_ATTR_IDN_CORR_PRG_BLK_NUM         = 0x11,
 168         QUERY_ATTR_IDN_RESERVED2                = 0x12,
 169         QUERY_ATTR_IDN_RESERVED3                = 0x13,
 170         QUERY_ATTR_IDN_FFU_STATUS               = 0x14,
 171         QUERY_ATTR_IDN_PSA_STATE                = 0x15,
 172         QUERY_ATTR_IDN_PSA_DATA_SIZE            = 0x16,
 173         QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
 174         QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
 175         QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
 176         QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
 177         QUERY_ATTR_IDN_WB_FLUSH_STATUS          = 0x1C,
 178         QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
 179         QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
 180         QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
 181         QUERY_ATTR_IDN_EXT_IID_EN               = 0x2A,
 182         QUERY_ATTR_IDN_TIMESTAMP                = 0x30
 183 };
 184
 185 /* Descriptor idn for Query requests */
 186 enum desc_idn {
 187         QUERY_DESC_IDN_DEVICE           = 0x0,
 188         QUERY_DESC_IDN_CONFIGURATION    = 0x1,
 189         QUERY_DESC_IDN_UNIT             = 0x2,
 190         QUERY_DESC_IDN_RFU_0            = 0x3,
 191         QUERY_DESC_IDN_INTERCONNECT     = 0x4,
 192         QUERY_DESC_IDN_STRING           = 0x5,
 193         QUERY_DESC_IDN_RFU_1            = 0x6,
 194         QUERY_DESC_IDN_GEOMETRY         = 0x7,
 195         QUERY_DESC_IDN_POWER            = 0x8,
 196         QUERY_DESC_IDN_HEALTH           = 0x9,
 197         QUERY_DESC_IDN_MAX,
 198 };
 199
 200 enum desc_header_offset {
 201         QUERY_DESC_LENGTH_OFFSET        = 0x00,
 202         QUERY_DESC_DESC_TYPE_OFFSET     = 0x01,
 203 };
 204
 205 /* Unit descriptor parameters offsets in bytes*/
 206 enum unit_desc_param {
 207         UNIT_DESC_PARAM_LEN                     = 0x0,
 208         UNIT_DESC_PARAM_TYPE                    = 0x1,
 209         UNIT_DESC_PARAM_UNIT_INDEX              = 0x2,
 210         UNIT_DESC_PARAM_LU_ENABLE               = 0x3,
 211         UNIT_DESC_PARAM_BOOT_LUN_ID             = 0x4,
 212         UNIT_DESC_PARAM_LU_WR_PROTECT           = 0x5,
 213         UNIT_DESC_PARAM_LU_Q_DEPTH              = 0x6,
 214         UNIT_DESC_PARAM_PSA_SENSITIVE           = 0x7,
 215         UNIT_DESC_PARAM_MEM_TYPE                = 0x8,
 216         UNIT_DESC_PARAM_DATA_RELIABILITY        = 0x9,
 217         UNIT_DESC_PARAM_LOGICAL_BLK_SIZE        = 0xA,
 218         UNIT_DESC_PARAM_LOGICAL_BLK_COUNT       = 0xB,
 219         UNIT_DESC_PARAM_ERASE_BLK_SIZE          = 0x13,
 220         UNIT_DESC_PARAM_PROVISIONING_TYPE       = 0x17,
 221         UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT        = 0x18,
 222         UNIT_DESC_PARAM_CTX_CAPABILITIES        = 0x20,
 223         UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1      = 0x22,
 224         UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS  = 0x23,
 225         UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF   = 0x25,
 226         UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS        = 0x27,
 227         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS      = 0x29,
 228 };
 229
 230 /* RPMB Unit descriptor parameters offsets in bytes*/
 231 enum rpmb_unit_desc_param {
 232         RPMB_UNIT_DESC_PARAM_LEN                = 0x0,
 233         RPMB_UNIT_DESC_PARAM_TYPE               = 0x1,
 234         RPMB_UNIT_DESC_PARAM_UNIT_INDEX         = 0x2,
 235         RPMB_UNIT_DESC_PARAM_LU_ENABLE          = 0x3,
 236         RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID        = 0x4,
 237         RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT      = 0x5,
 238         RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH         = 0x6,
 239         RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE      = 0x7,
 240         RPMB_UNIT_DESC_PARAM_MEM_TYPE           = 0x8,
 241         RPMB_UNIT_DESC_PARAM_REGION_EN          = 0x9,
 242         RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE   = 0xA,
 243         RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT  = 0xB,
 244         RPMB_UNIT_DESC_PARAM_REGION0_SIZE       = 0x13,
 245         RPMB_UNIT_DESC_PARAM_REGION1_SIZE       = 0x14,
 246         RPMB_UNIT_DESC_PARAM_REGION2_SIZE       = 0x15,
 247         RPMB_UNIT_DESC_PARAM_REGION3_SIZE       = 0x16,
 248         RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE  = 0x17,
 249         RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT   = 0x18,
 250 };
 251
 252 /* Device descriptor parameters offsets in bytes*/
 253 enum device_desc_param {
 254         DEVICE_DESC_PARAM_LEN                   = 0x0,
 255         DEVICE_DESC_PARAM_TYPE                  = 0x1,
 256         DEVICE_DESC_PARAM_DEVICE_TYPE           = 0x2,
 257         DEVICE_DESC_PARAM_DEVICE_CLASS          = 0x3,
 258         DEVICE_DESC_PARAM_DEVICE_SUB_CLASS      = 0x4,
 259         DEVICE_DESC_PARAM_PRTCL                 = 0x5,
 260         DEVICE_DESC_PARAM_NUM_LU                = 0x6,
 261         DEVICE_DESC_PARAM_NUM_WLU               = 0x7,
 262         DEVICE_DESC_PARAM_BOOT_ENBL             = 0x8,
 263         DEVICE_DESC_PARAM_DESC_ACCSS_ENBL       = 0x9,
 264         DEVICE_DESC_PARAM_INIT_PWR_MODE         = 0xA,
 265         DEVICE_DESC_PARAM_HIGH_PR_LUN           = 0xB,
 266         DEVICE_DESC_PARAM_SEC_RMV_TYPE          = 0xC,
 267         DEVICE_DESC_PARAM_SEC_LU                = 0xD,
 268         DEVICE_DESC_PARAM_BKOP_TERM_LT          = 0xE,
 269         DEVICE_DESC_PARAM_ACTVE_ICC_LVL         = 0xF,
 270         DEVICE_DESC_PARAM_SPEC_VER              = 0x10,
 271         DEVICE_DESC_PARAM_MANF_DATE             = 0x12,
 272         DEVICE_DESC_PARAM_MANF_NAME             = 0x14,
 273         DEVICE_DESC_PARAM_PRDCT_NAME            = 0x15,
 274         DEVICE_DESC_PARAM_SN                    = 0x16,
 275         DEVICE_DESC_PARAM_OEM_ID                = 0x17,
 276         DEVICE_DESC_PARAM_MANF_ID               = 0x18,
 277         DEVICE_DESC_PARAM_UD_OFFSET             = 0x1A,
 278         DEVICE_DESC_PARAM_UD_LEN                = 0x1B,
 279         DEVICE_DESC_PARAM_RTT_CAP               = 0x1C,
 280         DEVICE_DESC_PARAM_FRQ_RTC               = 0x1D,
 281         DEVICE_DESC_PARAM_UFS_FEAT              = 0x1F,
 282         DEVICE_DESC_PARAM_FFU_TMT               = 0x20,
 283         DEVICE_DESC_PARAM_Q_DPTH                = 0x21,
 284         DEVICE_DESC_PARAM_DEV_VER               = 0x22,
 285         DEVICE_DESC_PARAM_NUM_SEC_WPA           = 0x24,
 286         DEVICE_DESC_PARAM_PSA_MAX_DATA          = 0x25,
 287         DEVICE_DESC_PARAM_PSA_TMT               = 0x29,
 288         DEVICE_DESC_PARAM_PRDCT_REV             = 0x2A,
 289         DEVICE_DESC_PARAM_HPB_VER               = 0x40,
 290         DEVICE_DESC_PARAM_HPB_CONTROL           = 0x42,
 291         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP   = 0x4F,
 292         DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN   = 0x53,
 293         DEVICE_DESC_PARAM_WB_TYPE               = 0x54,
 294         DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
 295 };
 296
 297 /* Interconnect descriptor parameters offsets in bytes*/
 298 enum interconnect_desc_param {
 299         INTERCONNECT_DESC_PARAM_LEN             = 0x0,
 300         INTERCONNECT_DESC_PARAM_TYPE            = 0x1,
 301         INTERCONNECT_DESC_PARAM_UNIPRO_VER      = 0x2,
 302         INTERCONNECT_DESC_PARAM_MPHY_VER        = 0x4,
 303 };
 304
 305 /* Geometry descriptor parameters offsets in bytes*/
 306 enum geometry_desc_param {
 307         GEOMETRY_DESC_PARAM_LEN                 = 0x0,
 308         GEOMETRY_DESC_PARAM_TYPE                = 0x1,
 309         GEOMETRY_DESC_PARAM_DEV_CAP             = 0x4,
 310         GEOMETRY_DESC_PARAM_MAX_NUM_LUN         = 0xC,
 311         GEOMETRY_DESC_PARAM_SEG_SIZE            = 0xD,
 312         GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE     = 0x11,
 313         GEOMETRY_DESC_PARAM_MIN_BLK_SIZE        = 0x12,
 314         GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE     = 0x13,
 315         GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE     = 0x14,
 316         GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE     = 0x15,
 317         GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE    = 0x16,
 318         GEOMETRY_DESC_PARAM_RPMB_RW_SIZE        = 0x17,
 319         GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC    = 0x18,
 320         GEOMETRY_DESC_PARAM_DATA_ORDER          = 0x19,
 321         GEOMETRY_DESC_PARAM_MAX_NUM_CTX         = 0x1A,
 322         GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE       = 0x1B,
 323         GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE       = 0x1C,
 324         GEOMETRY_DESC_PARAM_SEC_RM_TYPES        = 0x1D,
 325         GEOMETRY_DESC_PARAM_MEM_TYPES           = 0x1E,
 326         GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS   = 0x20,
 327         GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR    = 0x24,
 328         GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS   = 0x26,
 329         GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR    = 0x2A,
 330         GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS  = 0x2C,
 331         GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR   = 0x30,
 332         GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS  = 0x32,
 333         GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR   = 0x36,
 334         GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS  = 0x38,
 335         GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR   = 0x3C,
 336         GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS  = 0x3E,
 337         GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR   = 0x42,
 338         GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE    = 0x44,
 339         GEOMETRY_DESC_PARAM_HPB_REGION_SIZE     = 0x48,
 340         GEOMETRY_DESC_PARAM_HPB_NUMBER_LU       = 0x49,
 341         GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE  = 0x4A,
 342         GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
 343         GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS  = 0x4F,
 344         GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS      = 0x53,
 345         GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ     = 0x54,
 346         GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE     = 0x55,
 347         GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE      = 0x56,
 348 };
 349
 350 /* Health descriptor parameters offsets in bytes*/
 351 enum health_desc_param {
 352         HEALTH_DESC_PARAM_LEN                   = 0x0,
 353         HEALTH_DESC_PARAM_TYPE                  = 0x1,
 354         HEALTH_DESC_PARAM_EOL_INFO              = 0x2,
 355         HEALTH_DESC_PARAM_LIFE_TIME_EST_A       = 0x3,
 356         HEALTH_DESC_PARAM_LIFE_TIME_EST_B       = 0x4,
 357 };
 358
 359 /* WriteBooster buffer mode */
 360 enum {
 361         WB_BUF_MODE_LU_DEDICATED        = 0x0,
 362         WB_BUF_MODE_SHARED              = 0x1,
 363 };
 364
 365 /*
 366  * Logical Unit Write Protect
 367  * 00h: LU not write protected
 368  * 01h: LU write protected when fPowerOnWPEn =1
 369  * 02h: LU permanently write protected when fPermanentWPEn =1
 370  */
 371 enum ufs_lu_wp_type {
 372         UFS_LU_NO_WP            = 0x00,
 373         UFS_LU_POWER_ON_WP      = 0x01,
 374         UFS_LU_PERM_WP          = 0x02,
 375 };
 376
 377 /* bActiveICCLevel parameter current units */
 378 enum {
 379         UFSHCD_NANO_AMP         = 0,
 380         UFSHCD_MICRO_AMP        = 1,
 381         UFSHCD_MILI_AMP         = 2,
 382         UFSHCD_AMP              = 3,
 383 };
 384
 385 /* Possible values for dExtendedUFSFeaturesSupport */
 386 enum {
 387         UFS_DEV_LOW_TEMP_NOTIF          = BIT(4),
 388         UFS_DEV_HIGH_TEMP_NOTIF         = BIT(5),
 389         UFS_DEV_EXT_TEMP_NOTIF          = BIT(6),
 390         UFS_DEV_HPB_SUPPORT             = BIT(7),
 391         UFS_DEV_WRITE_BOOSTER_SUP       = BIT(8),
 392         UFS_DEV_EXT_IID_SUP             = BIT(16),
 393 };
 394 #define UFS_DEV_HPB_SUPPORT_VERSION             0x310
 395
 396 #define POWER_DESC_MAX_ACTV_ICC_LVLS            16
 397
 398 /* Attribute  bActiveICCLevel parameter bit masks definitions */
 399 #define ATTR_ICC_LVL_UNIT_OFFSET        14
 400 #define ATTR_ICC_LVL_UNIT_MASK          (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
 401 #define ATTR_ICC_LVL_VALUE_MASK         0x3FF
 402
 403 /* Power descriptor parameters offsets in bytes */
 404 enum power_desc_param_offset {
 405         PWR_DESC_LEN                    = 0x0,
 406         PWR_DESC_TYPE                   = 0x1,
 407         PWR_DESC_ACTIVE_LVLS_VCC_0      = 0x2,
 408         PWR_DESC_ACTIVE_LVLS_VCCQ_0     = 0x22,
 409         PWR_DESC_ACTIVE_LVLS_VCCQ2_0    = 0x42,
 410 };
 411
 412 /* Exception event mask values */
 413 enum {
 414         MASK_EE_STATUS                  = 0xFFFF,
 415         MASK_EE_DYNCAP_EVENT            = BIT(0),
 416         MASK_EE_SYSPOOL_EVENT           = BIT(1),
 417         MASK_EE_URGENT_BKOPS            = BIT(2),
 418         MASK_EE_TOO_HIGH_TEMP           = BIT(3),
 419         MASK_EE_TOO_LOW_TEMP            = BIT(4),
 420         MASK_EE_WRITEBOOSTER_EVENT      = BIT(5),
 421         MASK_EE_PERFORMANCE_THROTTLING  = BIT(6),
 422 };
 423 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
 424
 425 /* Background operation status */
 426 enum bkops_status {
 427         BKOPS_STATUS_NO_OP               = 0x0,
 428         BKOPS_STATUS_NON_CRITICAL        = 0x1,
 429         BKOPS_STATUS_PERF_IMPACT         = 0x2,
 430         BKOPS_STATUS_CRITICAL            = 0x3,
 431         BKOPS_STATUS_MAX                 = BKOPS_STATUS_CRITICAL,
 432 };
 433
 434 /* UTP QUERY Transaction Specific Fields OpCode */
 435 enum query_opcode {
 436         UPIU_QUERY_OPCODE_NOP           = 0x0,
 437         UPIU_QUERY_OPCODE_READ_DESC     = 0x1,
 438         UPIU_QUERY_OPCODE_WRITE_DESC    = 0x2,
 439         UPIU_QUERY_OPCODE_READ_ATTR     = 0x3,
 440         UPIU_QUERY_OPCODE_WRITE_ATTR    = 0x4,
 441         UPIU_QUERY_OPCODE_READ_FLAG     = 0x5,
 442         UPIU_QUERY_OPCODE_SET_FLAG      = 0x6,
 443         UPIU_QUERY_OPCODE_CLEAR_FLAG    = 0x7,
 444         UPIU_QUERY_OPCODE_TOGGLE_FLAG   = 0x8,
 445 };
 446
 447 /* bRefClkFreq attribute values */
 448 enum ufs_ref_clk_freq {
 449         REF_CLK_FREQ_19_2_MHZ   = 0,
 450         REF_CLK_FREQ_26_MHZ     = 1,
 451         REF_CLK_FREQ_38_4_MHZ   = 2,
 452         REF_CLK_FREQ_52_MHZ     = 3,
 453         REF_CLK_FREQ_INVAL      = -1,
 454 };
 455
 456 /* Query response result code */
 457 enum {
 458         QUERY_RESULT_SUCCESS                    = 0x00,
 459         QUERY_RESULT_NOT_READABLE               = 0xF6,
 460         QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
 461         QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
 462         QUERY_RESULT_INVALID_LENGTH             = 0xF9,
 463         QUERY_RESULT_INVALID_VALUE              = 0xFA,
 464         QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
 465         QUERY_RESULT_INVALID_INDEX              = 0xFC,
 466         QUERY_RESULT_INVALID_IDN                = 0xFD,
 467         QUERY_RESULT_INVALID_OPCODE             = 0xFE,
 468         QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
 469 };
 470
 471 /* UTP Transfer Request Command Type (CT) */
 472 enum {
 473         UPIU_COMMAND_SET_TYPE_SCSI      = 0x0,
 474         UPIU_COMMAND_SET_TYPE_UFS       = 0x1,
 475         UPIU_COMMAND_SET_TYPE_QUERY     = 0x2,
 476 };
 477
 478 /* Offset of the response code in the UPIU header */
 479 #define UPIU_RSP_CODE_OFFSET            8
 480
 481 enum {
 482         MASK_TM_SERVICE_RESP            = 0xFF,
 483 };
 484
 485 /* Task management service response */
 486 enum {
 487         UPIU_TASK_MANAGEMENT_FUNC_COMPL         = 0x00,
 488         UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
 489         UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED     = 0x08,
 490         UPIU_TASK_MANAGEMENT_FUNC_FAILED        = 0x05,
 491         UPIU_INCORRECT_LOGICAL_UNIT_NO          = 0x09,
 492 };
 493
 494 /* UFS device power modes */
 495 enum ufs_dev_pwr_mode {
 496         UFS_ACTIVE_PWR_MODE     = 1,
 497         UFS_SLEEP_PWR_MODE      = 2,
 498         UFS_POWERDOWN_PWR_MODE  = 3,
 499         UFS_DEEPSLEEP_PWR_MODE  = 4,
 500 };
 501
 502 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
 503
 504 /**
 505  * struct utp_cmd_rsp - Response UPIU structure
 506  * @residual_transfer_count: Residual transfer count DW-3
 507  * @reserved: Reserved double words DW-4 to DW-7
 508  * @sense_data_len: Sense data length DW-8 U16
 509  * @sense_data: Sense data field DW-8 to DW-12
 510  */
 511 struct utp_cmd_rsp {
 512         __be32 residual_transfer_count;
 513         __be32 reserved[4];
 514         __be16 sense_data_len;
 515         u8 sense_data[UFS_SENSE_SIZE];
 516 };
 517
 518 /**
 519  * struct utp_upiu_rsp - general upiu response structure
 520  * @header: UPIU header structure DW-0 to DW-2
 521  * @sr: fields structure for scsi command DW-3 to DW-12
 522  * @qr: fields structure for query request DW-3 to DW-7
 523  */
 524 struct utp_upiu_rsp {
 525         struct utp_upiu_header header;
 526         union {
 527                 struct utp_cmd_rsp sr;
 528                 struct utp_upiu_query qr;
 529         };
 530 };
 531
 532 /*
 533  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
 534  * and link is in Hibern8 state.
 535  */
 536 #define UFS_VREG_LPM_LOAD_UA    1000 /* uA */
 537
 538 struct ufs_vreg {
 539         struct regulator *reg;
 540         const char *name;
 541         bool always_on;
 542         bool enabled;
 543         int max_uA;
 544 };
 545
 546 struct ufs_vreg_info {
 547         struct ufs_vreg *vcc;
 548         struct ufs_vreg *vccq;
 549         struct ufs_vreg *vccq2;
 550         struct ufs_vreg *vdd_hba;
 551 };
 552
 553 struct ufs_dev_info {
 554         bool    f_power_on_wp_en;
 555         /* Keeps information if any of the LU is power on write protected */
 556         bool    is_lu_power_on_wp;
 557         /* Maximum number of general LU supported by the UFS device */
 558         u8      max_lu_supported;
 559         u16     wmanufacturerid;
 560         /*UFS device Product Name */
 561         u8      *model;
 562         u16     wspecversion;
 563         u32     clk_gating_wait_us;
 564         /* Stores the depth of queue in UFS device */
 565         u8      bqueuedepth;
 566
 567         /* UFS WB related flags */
 568         bool    wb_enabled;
 569         bool    wb_buf_flush_enabled;
 570         u8      wb_dedicated_lu;
 571         u8      wb_buffer_type;
 572
 573         bool    b_rpm_dev_flush_capable;
 574         u8      b_presrv_uspc_en;
 575
 576         bool    b_advanced_rpmb_en;
 577
 578         /* UFS EXT_IID Enable */
 579         bool    b_ext_iid_en;
 580 };
 581
 582 /*
 583  * This enum is used in string mapping in include/trace/events/ufs.h.
 584  */
 585 enum ufs_trace_str_t {
 586         UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
 587         UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
 588         UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
 589 };
 590
 591 /*
 592  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
 593  * used in include/trace/events/ufs.h for UFS command trace.
 594  */
 595 enum ufs_trace_tsf_t {
 596         UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
 597 };
 598
 599 #endif /* End of Header */