4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This header is BSD licensed so anyone can use the definitions
11 * to implement compatible drivers/servers:
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. Neither the name of IBM nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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38 #ifndef VIRTIO_GPU_HW_H
39 #define VIRTIO_GPU_HW_H
41 #include <linux/types.h>
44 * VIRTIO_GPU_CMD_CTX_*
47 #define VIRTIO_GPU_F_VIRGL 0
50 * VIRTIO_GPU_CMD_GET_EDID
52 #define VIRTIO_GPU_F_EDID 1
54 * VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID
56 #define VIRTIO_GPU_F_RESOURCE_UUID 2
58 enum virtio_gpu_ctrl_type {
59 VIRTIO_GPU_UNDEFINED = 0,
62 VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
63 VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
64 VIRTIO_GPU_CMD_RESOURCE_UNREF,
65 VIRTIO_GPU_CMD_SET_SCANOUT,
66 VIRTIO_GPU_CMD_RESOURCE_FLUSH,
67 VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
68 VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
69 VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
70 VIRTIO_GPU_CMD_GET_CAPSET_INFO,
71 VIRTIO_GPU_CMD_GET_CAPSET,
72 VIRTIO_GPU_CMD_GET_EDID,
73 VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID,
76 VIRTIO_GPU_CMD_CTX_CREATE = 0x0200,
77 VIRTIO_GPU_CMD_CTX_DESTROY,
78 VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE,
79 VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE,
80 VIRTIO_GPU_CMD_RESOURCE_CREATE_3D,
81 VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D,
82 VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D,
83 VIRTIO_GPU_CMD_SUBMIT_3D,
86 VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
87 VIRTIO_GPU_CMD_MOVE_CURSOR,
89 /* success responses */
90 VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
91 VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
92 VIRTIO_GPU_RESP_OK_CAPSET_INFO,
93 VIRTIO_GPU_RESP_OK_CAPSET,
94 VIRTIO_GPU_RESP_OK_EDID,
95 VIRTIO_GPU_RESP_OK_RESOURCE_UUID,
98 VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
99 VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
100 VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
101 VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
102 VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
103 VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
106 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
108 struct virtio_gpu_ctrl_hdr {
116 /* data passed in the cursor vq */
118 struct virtio_gpu_cursor_pos {
125 /* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
126 struct virtio_gpu_update_cursor {
127 struct virtio_gpu_ctrl_hdr hdr;
128 struct virtio_gpu_cursor_pos pos; /* update & move */
129 __le32 resource_id; /* update only */
130 __le32 hot_x; /* update only */
131 __le32 hot_y; /* update only */
135 /* data passed in the control vq, 2d related */
137 struct virtio_gpu_rect {
144 /* VIRTIO_GPU_CMD_RESOURCE_UNREF */
145 struct virtio_gpu_resource_unref {
146 struct virtio_gpu_ctrl_hdr hdr;
151 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
152 struct virtio_gpu_resource_create_2d {
153 struct virtio_gpu_ctrl_hdr hdr;
160 /* VIRTIO_GPU_CMD_SET_SCANOUT */
161 struct virtio_gpu_set_scanout {
162 struct virtio_gpu_ctrl_hdr hdr;
163 struct virtio_gpu_rect r;
168 /* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
169 struct virtio_gpu_resource_flush {
170 struct virtio_gpu_ctrl_hdr hdr;
171 struct virtio_gpu_rect r;
176 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
177 struct virtio_gpu_transfer_to_host_2d {
178 struct virtio_gpu_ctrl_hdr hdr;
179 struct virtio_gpu_rect r;
185 struct virtio_gpu_mem_entry {
191 /* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
192 struct virtio_gpu_resource_attach_backing {
193 struct virtio_gpu_ctrl_hdr hdr;
198 /* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
199 struct virtio_gpu_resource_detach_backing {
200 struct virtio_gpu_ctrl_hdr hdr;
205 /* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
206 #define VIRTIO_GPU_MAX_SCANOUTS 16
207 struct virtio_gpu_resp_display_info {
208 struct virtio_gpu_ctrl_hdr hdr;
209 struct virtio_gpu_display_one {
210 struct virtio_gpu_rect r;
213 } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
216 /* data passed in the control vq, 3d related */
218 struct virtio_gpu_box {
223 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D, VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D */
224 struct virtio_gpu_transfer_host_3d {
225 struct virtio_gpu_ctrl_hdr hdr;
226 struct virtio_gpu_box box;
234 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_3D */
235 #define VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP (1 << 0)
236 struct virtio_gpu_resource_create_3d {
237 struct virtio_gpu_ctrl_hdr hdr;
252 /* VIRTIO_GPU_CMD_CTX_CREATE */
253 struct virtio_gpu_ctx_create {
254 struct virtio_gpu_ctrl_hdr hdr;
260 /* VIRTIO_GPU_CMD_CTX_DESTROY */
261 struct virtio_gpu_ctx_destroy {
262 struct virtio_gpu_ctrl_hdr hdr;
265 /* VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE, VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE */
266 struct virtio_gpu_ctx_resource {
267 struct virtio_gpu_ctrl_hdr hdr;
272 /* VIRTIO_GPU_CMD_SUBMIT_3D */
273 struct virtio_gpu_cmd_submit {
274 struct virtio_gpu_ctrl_hdr hdr;
279 #define VIRTIO_GPU_CAPSET_VIRGL 1
280 #define VIRTIO_GPU_CAPSET_VIRGL2 2
282 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
283 struct virtio_gpu_get_capset_info {
284 struct virtio_gpu_ctrl_hdr hdr;
289 /* VIRTIO_GPU_RESP_OK_CAPSET_INFO */
290 struct virtio_gpu_resp_capset_info {
291 struct virtio_gpu_ctrl_hdr hdr;
293 __le32 capset_max_version;
294 __le32 capset_max_size;
298 /* VIRTIO_GPU_CMD_GET_CAPSET */
299 struct virtio_gpu_get_capset {
300 struct virtio_gpu_ctrl_hdr hdr;
302 __le32 capset_version;
305 /* VIRTIO_GPU_RESP_OK_CAPSET */
306 struct virtio_gpu_resp_capset {
307 struct virtio_gpu_ctrl_hdr hdr;
311 /* VIRTIO_GPU_CMD_GET_EDID */
312 struct virtio_gpu_cmd_get_edid {
313 struct virtio_gpu_ctrl_hdr hdr;
318 /* VIRTIO_GPU_RESP_OK_EDID */
319 struct virtio_gpu_resp_edid {
320 struct virtio_gpu_ctrl_hdr hdr;
326 #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
328 struct virtio_gpu_config {
335 /* simple formats for fbcon/X use */
336 enum virtio_gpu_formats {
337 VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM = 1,
338 VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM = 2,
339 VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM = 3,
340 VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM = 4,
342 VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM = 67,
343 VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM = 68,
345 VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM = 121,
346 VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM = 134,
349 /* VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID */
350 struct virtio_gpu_resource_assign_uuid {
351 struct virtio_gpu_ctrl_hdr hdr;
356 /* VIRTIO_GPU_RESP_OK_RESOURCE_UUID */
357 struct virtio_gpu_resp_resource_uuid {
358 struct virtio_gpu_ctrl_hdr hdr;