1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __QCOM_SMEM_STATE__
3 #define __QCOM_SMEM_STATE__
8 struct qcom_smem_state;
10 struct qcom_smem_state_ops {
11 int (*update_bits)(void *, u32, u32);
14 #ifdef CONFIG_QCOM_SMEM_STATE
16 struct qcom_smem_state *qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit);
17 void qcom_smem_state_put(struct qcom_smem_state *);
19 int qcom_smem_state_update_bits(struct qcom_smem_state *state, u32 mask, u32 value);
21 struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node, const struct qcom_smem_state_ops *ops, void *data);
22 void qcom_smem_state_unregister(struct qcom_smem_state *state);
26 static inline struct qcom_smem_state *qcom_smem_state_get(struct device *dev,
27 const char *con_id, unsigned *bit)
29 return ERR_PTR(-EINVAL);
32 static inline void qcom_smem_state_put(struct qcom_smem_state *state)
36 static inline int qcom_smem_state_update_bits(struct qcom_smem_state *state,
42 static inline struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node,
43 const struct qcom_smem_state_ops *ops, void *data)
45 return ERR_PTR(-EINVAL);
48 static inline void qcom_smem_state_unregister(struct qcom_smem_state *state)