1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/kernel.h>
6 #include <linux/list.h>
9 /* CLOSID, RMID value used by the default control group */
10 #define RESCTRL_RESERVED_CLOSID 0
11 #define RESCTRL_RESERVED_RMID 0
13 #define RESCTRL_PICK_ANY_CPU -1
15 #ifdef CONFIG_PROC_CPU_RESCTRL
17 int proc_resctrl_show(struct seq_file *m,
18 struct pid_namespace *ns,
20 struct task_struct *tsk);
24 /* max value for struct rdt_domain's mbps_val */
25 #define MBA_MAX_MBPS U32_MAX
28 * enum resctrl_conf_type - The type of configuration.
29 * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
30 * @CDP_CODE: Configuration applies to instruction fetches.
31 * @CDP_DATA: Configuration applies to reads and writes.
33 enum resctrl_conf_type {
39 #define CDP_NUM_TYPES (CDP_DATA + 1)
42 * Event IDs, the values match those used to program IA32_QM_EVTSEL before
43 * reading IA32_QM_CTR on RDT systems.
45 enum resctrl_event_id {
46 QOS_L3_OCCUP_EVENT_ID = 0x01,
47 QOS_L3_MBM_TOTAL_EVENT_ID = 0x02,
48 QOS_L3_MBM_LOCAL_EVENT_ID = 0x03,
52 * struct resctrl_staged_config - parsed configuration to be applied
53 * @new_ctrl: new ctrl value to be loaded
54 * @have_new_ctrl: whether the user provided new_ctrl is valid
56 struct resctrl_staged_config {
62 * struct rdt_domain - group of CPUs sharing a resctrl resource
63 * @list: all instances of this resource
64 * @id: unique id for this instance
65 * @cpu_mask: which CPUs share this resource
66 * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
67 * @mbm_total: saved state for MBM total bandwidth
68 * @mbm_local: saved state for MBM local bandwidth
69 * @mbm_over: worker to periodically read MBM h/w counters
70 * @cqm_limbo: worker to periodically read CQM h/w counters
71 * @mbm_work_cpu: worker CPU for MBM h/w counters
72 * @cqm_work_cpu: worker CPU for CQM h/w counters
73 * @plr: pseudo-locked region (if any) associated with domain
74 * @staged_config: parsed configuration to be applied
75 * @mbps_val: When mba_sc is enabled, this holds the array of user
76 * specified control values for mba_sc in MBps, indexed
80 struct list_head list;
82 struct cpumask cpu_mask;
83 unsigned long *rmid_busy_llc;
84 struct mbm_state *mbm_total;
85 struct mbm_state *mbm_local;
86 struct delayed_work mbm_over;
87 struct delayed_work cqm_limbo;
90 struct pseudo_lock_region *plr;
91 struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
96 * struct resctrl_cache - Cache allocation related data
97 * @cbm_len: Length of the cache bit mask
98 * @min_cbm_bits: Minimum number of consecutive bits to be set.
99 * The value 0 means the architecture can support
101 * @shareable_bits: Bitmask of shareable resource with other
103 * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid.
104 * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
105 * level has CPU scope.
107 struct resctrl_cache {
108 unsigned int cbm_len;
109 unsigned int min_cbm_bits;
110 unsigned int shareable_bits;
111 bool arch_has_sparse_bitmasks;
112 bool arch_has_per_cpu_cfg;
116 * enum membw_throttle_mode - System's memory bandwidth throttling mode
117 * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
118 * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
119 * always using smallest bandwidth percentage
120 * assigned to threads, aka "max throttling"
121 * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
123 enum membw_throttle_mode {
124 THREAD_THROTTLE_UNDEFINED = 0,
126 THREAD_THROTTLE_PER_THREAD,
130 * struct resctrl_membw - Memory bandwidth allocation related data
131 * @min_bw: Minimum memory bandwidth percentage user can request
132 * @bw_gran: Granularity at which the memory bandwidth is allocated
133 * @delay_linear: True if memory B/W delay is in linear scale
134 * @arch_needs_linear: True if we can't configure non-linear resources
135 * @throttle_mode: Bandwidth throttling mode when threads request
136 * different memory bandwidths
137 * @mba_sc: True if MBA software controller(mba_sc) is enabled
138 * @mb_map: Mapping of memory B/W percentage to memory B/W delay
140 struct resctrl_membw {
144 bool arch_needs_linear;
145 enum membw_throttle_mode throttle_mode;
150 struct rdt_parse_data;
151 struct resctrl_schema;
154 * struct rdt_resource - attributes of a resctrl resource
155 * @rid: The index of the resource
156 * @alloc_capable: Is allocation available on this machine
157 * @mon_capable: Is monitor feature available on this machine
158 * @num_rmid: Number of RMIDs available
159 * @cache_level: Which cache level defines scope of this resource
160 * @cache: Cache allocation related data
161 * @membw: If the component has bandwidth controls, their properties.
162 * @domains: RCU list of all domains for this resource
163 * @name: Name to use in "schemata" file.
164 * @data_width: Character width of data when displaying
165 * @default_ctrl: Specifies default cache cbm or memory B/W percent.
166 * @format_str: Per resource format string to show domain value
167 * @parse_ctrlval: Per resource function pointer to parse control values
168 * @evt_list: List of monitoring events
169 * @fflags: flags to choose base and info files
170 * @cdp_capable: Is the CDP feature available on this resource
172 struct rdt_resource {
178 struct resctrl_cache cache;
179 struct resctrl_membw membw;
180 struct list_head domains;
184 const char *format_str;
185 int (*parse_ctrlval)(struct rdt_parse_data *data,
186 struct resctrl_schema *s,
187 struct rdt_domain *d);
188 struct list_head evt_list;
189 unsigned long fflags;
194 * struct resctrl_schema - configuration abilities of a resource presented to
196 * @list: Member of resctrl_schema_all.
197 * @name: The name to use in the "schemata" file.
198 * @conf_type: Whether this schema is specific to code/data.
199 * @res: The resource structure exported by the architecture to describe
200 * the hardware that is configured by this schema.
201 * @num_closid: The number of closid that can be used with this schema. When
202 * features like CDP are enabled, this will be lower than the
203 * hardware supports for the resource.
205 struct resctrl_schema {
206 struct list_head list;
208 enum resctrl_conf_type conf_type;
209 struct rdt_resource *res;
213 /* The number of closid supported by this resource regardless of CDP */
214 u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
215 int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
218 * Update the ctrl_val and apply this config right now.
219 * Must be called on one of the domain's CPUs.
221 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,
222 u32 closid, enum resctrl_conf_type t, u32 cfg_val);
224 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d,
225 u32 closid, enum resctrl_conf_type type);
226 int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d);
227 void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d);
228 void resctrl_online_cpu(unsigned int cpu);
229 void resctrl_offline_cpu(unsigned int cpu);
232 * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
233 * for this resource and domain.
234 * @r: resource that the counter should be read from.
235 * @d: domain that the counter should be read from.
236 * @closid: closid that matches the rmid. Depending on the architecture, the
237 * counter may match traffic of both @closid and @rmid, or @rmid
239 * @rmid: rmid of the counter to read.
240 * @eventid: eventid to read, e.g. L3 occupancy.
241 * @val: result of the counter read in bytes.
242 * @arch_mon_ctx: An architecture specific value from
243 * resctrl_arch_mon_ctx_alloc(), for MPAM this identifies
244 * the hardware monitor allocated for this read request.
246 * Some architectures need to sleep when first programming some of the counters.
247 * (specifically: arm64's MPAM cache occupancy counters can return 'not ready'
248 * for a short period of time). Call from a non-migrateable process context on
249 * a CPU that belongs to domain @d. e.g. use smp_call_on_cpu() or
250 * schedule_work_on(). This function can be called with interrupts masked,
251 * e.g. using smp_call_function_any(), but may consistently return an error.
254 * 0 on success, or -EIO, -EINVAL etc on error.
256 int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d,
257 u32 closid, u32 rmid, enum resctrl_event_id eventid,
258 u64 *val, void *arch_mon_ctx);
261 * resctrl_arch_rmid_read_context_check() - warn about invalid contexts
263 * When built with CONFIG_DEBUG_ATOMIC_SLEEP generate a warning when
264 * resctrl_arch_rmid_read() is called with preemption disabled.
266 * The contract with resctrl_arch_rmid_read() is that if interrupts
267 * are unmasked, it can sleep. This allows NOHZ_FULL systems to use an
268 * IPI, (and fail if the call needed to sleep), while most of the time
269 * the work is scheduled, allowing the call to sleep.
271 static inline void resctrl_arch_rmid_read_context_check(void)
273 if (!irqs_disabled())
278 * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
280 * @r: The domain's resource.
281 * @d: The rmid's domain.
282 * @closid: closid that matches the rmid. Depending on the architecture, the
283 * counter may match traffic of both @closid and @rmid, or @rmid only.
284 * @rmid: The rmid whose counter values should be reset.
285 * @eventid: The eventid whose counter values should be reset.
287 * This can be called from any CPU.
289 void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d,
290 u32 closid, u32 rmid,
291 enum resctrl_event_id eventid);
294 * resctrl_arch_reset_rmid_all() - Reset all private state associated with
295 * all rmids and eventids.
296 * @r: The resctrl resource.
297 * @d: The domain for which all architectural counter state will
300 * This can be called from any CPU.
302 void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d);
304 extern unsigned int resctrl_rmid_realloc_threshold;
305 extern unsigned int resctrl_rmid_realloc_limit;
307 #endif /* _RESCTRL_H */