1 /* QLogic qed NIC Driver
3 * Copyright (c) 2015 QLogic Corporation
5 * This software is available under the terms of the GNU General Public License
6 * (GPL) Version 2, available from the file COPYING in the main directory of
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/netdevice.h>
16 #include <linux/pci.h>
17 #include <linux/skbuff.h>
18 #include <linux/types.h>
19 #include <asm/byteorder.h>
21 #include <linux/compiler.h>
22 #include <linux/kernel.h>
23 #include <linux/list.h>
24 #include <linux/slab.h>
25 #include <linux/qed/common_hsi.h>
26 #include <linux/qed/qed_chain.h>
28 enum dcbx_protocol_type {
32 DCBX_PROTOCOL_ROCE_V2,
34 DCBX_MAX_PROTOCOL_TYPE
37 #define QED_ROCE_PROTOCOL_INDEX (3)
40 #define QED_LLDP_CHASSIS_ID_STAT_LEN 4
41 #define QED_LLDP_PORT_ID_STAT_LEN 4
42 #define QED_DCBX_MAX_APP_PROTOCOL 32
43 #define QED_MAX_PFC_PRIORITIES 8
44 #define QED_DCBX_DSCP_SIZE 64
46 struct qed_dcbx_lldp_remote {
47 u32 peer_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
48 u32 peer_port_id[QED_LLDP_PORT_ID_STAT_LEN];
55 struct qed_dcbx_lldp_local {
56 u32 local_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
57 u32 local_port_id[QED_LLDP_PORT_ID_STAT_LEN];
60 struct qed_dcbx_app_prio {
68 struct qed_dbcx_pfc_params {
71 u8 prio[QED_MAX_PFC_PRIORITIES];
75 enum qed_dcbx_sf_ieee_type {
76 QED_DCBX_SF_IEEE_ETHTYPE,
77 QED_DCBX_SF_IEEE_TCP_PORT,
78 QED_DCBX_SF_IEEE_UDP_PORT,
79 QED_DCBX_SF_IEEE_TCP_UDP_PORT
82 struct qed_app_entry {
84 enum qed_dcbx_sf_ieee_type sf_ieee;
88 enum dcbx_protocol_type proto_type;
91 struct qed_dcbx_params {
92 struct qed_app_entry app_entry[QED_DCBX_MAX_APP_PROTOCOL];
101 u8 ets_pri_tc_tbl[QED_MAX_PFC_PRIORITIES];
102 u8 ets_tc_bw_tbl[QED_MAX_PFC_PRIORITIES];
103 u8 ets_tc_tsa_tbl[QED_MAX_PFC_PRIORITIES];
104 struct qed_dbcx_pfc_params pfc;
108 struct qed_dcbx_admin_params {
109 struct qed_dcbx_params params;
113 struct qed_dcbx_remote_params {
114 struct qed_dcbx_params params;
118 struct qed_dcbx_operational_params {
119 struct qed_dcbx_app_prio app_prio;
120 struct qed_dcbx_params params;
128 struct qed_dcbx_get {
129 struct qed_dcbx_operational_params operational;
130 struct qed_dcbx_lldp_remote lldp_remote;
131 struct qed_dcbx_lldp_local lldp_local;
132 struct qed_dcbx_remote_params remote;
133 struct qed_dcbx_admin_params local;
143 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
144 (void __iomem *)(reg_addr))
146 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
148 #define QED_COALESCE_MAX 0xFF
149 #define QED_DEFAULT_RX_USECS 12
154 struct qed_eth_pf_params {
155 /* The following parameters are used during HW-init
156 * and these parameters need to be passed as arguments
157 * to update_pf_params routine invoked before slowpath start
162 /* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
163 struct qed_iscsi_pf_params {
164 u64 glbl_q_params_addr;
165 u64 bdq_pbl_base_addr[2];
168 u16 cmdq_num_entries;
169 u16 dup_ack_threshold;
175 /* The following parameters are used during HW-init
176 * and these parameters need to be passed as arguments
177 * to update_pf_params routine invoked before slowpath start
182 /* The following parameters are used during protocol-init */
183 u16 half_way_close_timeout;
184 u16 bdq_xoff_threshold[2];
185 u16 bdq_xon_threshold[2];
186 u16 cmdq_xoff_threshold;
187 u16 cmdq_xon_threshold;
190 u8 num_sq_pages_in_ring;
191 u8 num_r2tq_pages_in_ring;
192 u8 num_uhq_pages_in_ring;
204 u8 bdq_pbl_num_entries[2];
207 struct qed_rdma_pf_params {
208 /* Supplied to QED during resource allocation (may affect the ILT and
211 u32 min_dpis; /* number of requested DPIs */
212 u32 num_mrs; /* number of requested memory regions */
213 u32 num_qps; /* number of requested Queue Pairs */
214 u32 num_srqs; /* number of requested SRQ */
215 u8 roce_edpm_mode; /* see QED_ROCE_EDPM_MODE_ENABLE */
216 u8 gl_pi; /* protocol index */
218 /* Will allocate rate limiters to be used with QPs */
222 struct qed_pf_params {
223 struct qed_eth_pf_params eth_pf_params;
224 struct qed_iscsi_pf_params iscsi_pf_params;
225 struct qed_rdma_pf_params rdma_pf_params;
236 struct status_block *sb_virt;
238 u32 sb_ack; /* Last given ack */
240 void __iomem *igu_addr;
242 #define QED_SB_INFO_INIT 0x1
243 #define QED_SB_INFO_SETUP 0x2
245 struct qed_dev *cdev;
248 struct qed_dev_info {
249 unsigned long pci_mem_start;
250 unsigned long pci_mem_end;
251 unsigned int pci_irq;
273 QED_SB_TYPE_L2_QUEUE,
282 enum qed_link_mode_bits {
283 QED_LM_FIBRE_BIT = BIT(0),
284 QED_LM_Autoneg_BIT = BIT(1),
285 QED_LM_Asym_Pause_BIT = BIT(2),
286 QED_LM_Pause_BIT = BIT(3),
287 QED_LM_1000baseT_Half_BIT = BIT(4),
288 QED_LM_1000baseT_Full_BIT = BIT(5),
289 QED_LM_10000baseKR_Full_BIT = BIT(6),
290 QED_LM_25000baseKR_Full_BIT = BIT(7),
291 QED_LM_40000baseLR4_Full_BIT = BIT(8),
292 QED_LM_50000baseKR2_Full_BIT = BIT(9),
293 QED_LM_100000baseKR4_Full_BIT = BIT(10),
297 struct qed_link_params {
300 #define QED_LINK_OVERRIDE_SPEED_AUTONEG BIT(0)
301 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS BIT(1)
302 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED BIT(2)
303 #define QED_LINK_OVERRIDE_PAUSE_CONFIG BIT(3)
304 #define QED_LINK_OVERRIDE_LOOPBACK_MODE BIT(4)
309 #define QED_LINK_PAUSE_AUTONEG_ENABLE BIT(0)
310 #define QED_LINK_PAUSE_RX_ENABLE BIT(1)
311 #define QED_LINK_PAUSE_TX_ENABLE BIT(2)
313 #define QED_LINK_LOOPBACK_NONE BIT(0)
314 #define QED_LINK_LOOPBACK_INT_PHY BIT(1)
315 #define QED_LINK_LOOPBACK_EXT_PHY BIT(2)
316 #define QED_LINK_LOOPBACK_EXT BIT(3)
317 #define QED_LINK_LOOPBACK_MAC BIT(4)
321 struct qed_link_output {
324 /* In QED_LM_* defs */
329 u32 speed; /* In Mb/s */
330 u8 duplex; /* In DUPLEX defs */
331 u8 port; /* In PORT defs */
336 struct qed_probe_params {
337 enum qed_protocol protocol;
343 #define QED_DRV_VER_STR_SIZE 12
344 struct qed_slowpath_params {
350 u8 name[QED_DRV_VER_STR_SIZE];
353 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
355 struct qed_int_info {
356 struct msix_entry *msix;
359 /* This should be updated by the protocol driver */
363 struct qed_common_cb_ops {
364 void (*link_update)(void *dev,
365 struct qed_link_output *link);
368 struct qed_selftest_ops {
370 * @brief selftest_interrupt - Perform interrupt test
374 * @return 0 on success, error otherwise.
376 int (*selftest_interrupt)(struct qed_dev *cdev);
379 * @brief selftest_memory - Perform memory test
383 * @return 0 on success, error otherwise.
385 int (*selftest_memory)(struct qed_dev *cdev);
388 * @brief selftest_register - Perform register test
392 * @return 0 on success, error otherwise.
394 int (*selftest_register)(struct qed_dev *cdev);
397 * @brief selftest_clock - Perform clock test
401 * @return 0 on success, error otherwise.
403 int (*selftest_clock)(struct qed_dev *cdev);
406 struct qed_common_ops {
407 struct qed_selftest_ops *selftest;
409 struct qed_dev* (*probe)(struct pci_dev *dev,
410 struct qed_probe_params *params);
412 void (*remove)(struct qed_dev *cdev);
414 int (*set_power_state)(struct qed_dev *cdev,
417 void (*set_id)(struct qed_dev *cdev,
421 /* Client drivers need to make this call before slowpath_start.
422 * PF params required for the call before slowpath_start is
423 * documented within the qed_pf_params structure definition.
425 void (*update_pf_params)(struct qed_dev *cdev,
426 struct qed_pf_params *params);
427 int (*slowpath_start)(struct qed_dev *cdev,
428 struct qed_slowpath_params *params);
430 int (*slowpath_stop)(struct qed_dev *cdev);
432 /* Requests to use `cnt' interrupts for fastpath.
433 * upon success, returns number of interrupts allocated for fastpath.
435 int (*set_fp_int)(struct qed_dev *cdev,
438 /* Fills `info' with pointers required for utilizing interrupts */
439 int (*get_fp_int)(struct qed_dev *cdev,
440 struct qed_int_info *info);
442 u32 (*sb_init)(struct qed_dev *cdev,
443 struct qed_sb_info *sb_info,
445 dma_addr_t sb_phy_addr,
447 enum qed_sb_type type);
449 u32 (*sb_release)(struct qed_dev *cdev,
450 struct qed_sb_info *sb_info,
453 void (*simd_handler_config)(struct qed_dev *cdev,
456 void (*handler)(void *));
458 void (*simd_handler_clean)(struct qed_dev *cdev,
461 int (*dbg_all_data) (struct qed_dev *cdev, void *buffer);
463 int (*dbg_all_data_size) (struct qed_dev *cdev);
466 * @brief can_link_change - can the instance change the link or not
470 * @return true if link-change is allowed, false otherwise.
472 bool (*can_link_change)(struct qed_dev *cdev);
475 * @brief set_link - set links according to params
478 * @param params - values used to override the default link configuration
480 * @return 0 on success, error otherwise.
482 int (*set_link)(struct qed_dev *cdev,
483 struct qed_link_params *params);
486 * @brief get_link - returns the current link state.
489 * @param if_link - structure to be filled with current link configuration.
491 void (*get_link)(struct qed_dev *cdev,
492 struct qed_link_output *if_link);
495 * @brief - drains chip in case Tx completions fail to arrive due to pause.
499 int (*drain)(struct qed_dev *cdev);
502 * @brief update_msglvl - update module debug level
508 void (*update_msglvl)(struct qed_dev *cdev,
512 int (*chain_alloc)(struct qed_dev *cdev,
513 enum qed_chain_use_mode intended_use,
514 enum qed_chain_mode mode,
515 enum qed_chain_cnt_type cnt_type,
518 struct qed_chain *p_chain);
520 void (*chain_free)(struct qed_dev *cdev,
521 struct qed_chain *p_chain);
524 * @brief get_coalesce - Get coalesce parameters in usec
527 * @param rx_coal - Rx coalesce value in usec
528 * @param tx_coal - Tx coalesce value in usec
531 void (*get_coalesce)(struct qed_dev *cdev, u16 *rx_coal, u16 *tx_coal);
534 * @brief set_coalesce - Configure Rx coalesce value in usec
537 * @param rx_coal - Rx coalesce value in usec
538 * @param tx_coal - Tx coalesce value in usec
539 * @param qid - Queue index
540 * @param sb_id - Status Block Id
542 * @return 0 on success, error otherwise.
544 int (*set_coalesce)(struct qed_dev *cdev, u16 rx_coal, u16 tx_coal,
548 * @brief set_led - Configure LED mode
551 * @param mode - LED mode
553 * @return 0 on success, error otherwise.
555 int (*set_led)(struct qed_dev *cdev,
556 enum qed_led_mode mode);
559 #define MASK_FIELD(_name, _value) \
560 ((_value) &= (_name ## _MASK))
562 #define FIELD_VALUE(_name, _value) \
563 ((_value & _name ## _MASK) << _name ## _SHIFT)
565 #define SET_FIELD(value, name, flag) \
567 (value) &= ~(name ## _MASK << name ## _SHIFT); \
568 (value) |= (((u64)flag) << (name ## _SHIFT)); \
571 #define GET_FIELD(value, name) \
572 (((value) >> (name ## _SHIFT)) & name ## _MASK)
574 /* Debug print definitions */
575 #define DP_ERR(cdev, fmt, ...) \
576 pr_err("[%s:%d(%s)]" fmt, \
577 __func__, __LINE__, \
578 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
581 #define DP_NOTICE(cdev, fmt, ...) \
583 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
584 pr_notice("[%s:%d(%s)]" fmt, \
585 __func__, __LINE__, \
586 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
592 #define DP_INFO(cdev, fmt, ...) \
594 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) { \
595 pr_notice("[%s:%d(%s)]" fmt, \
596 __func__, __LINE__, \
597 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
602 #define DP_VERBOSE(cdev, module, fmt, ...) \
604 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
605 ((cdev)->dp_module & module))) { \
606 pr_notice("[%s:%d(%s)]" fmt, \
607 __func__, __LINE__, \
608 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
614 QED_LEVEL_VERBOSE = 0x0,
615 QED_LEVEL_INFO = 0x1,
616 QED_LEVEL_NOTICE = 0x2,
620 #define QED_LOG_LEVEL_SHIFT (30)
621 #define QED_LOG_VERBOSE_MASK (0x3fffffff)
622 #define QED_LOG_INFO_MASK (0x40000000)
623 #define QED_LOG_NOTICE_MASK (0x80000000)
626 QED_MSG_SPQ = 0x10000,
627 QED_MSG_STATS = 0x20000,
628 QED_MSG_DCB = 0x40000,
629 QED_MSG_IOV = 0x80000,
630 QED_MSG_SP = 0x100000,
631 QED_MSG_STORAGE = 0x200000,
632 QED_MSG_CXT = 0x800000,
633 QED_MSG_LL2 = 0x1000000,
634 QED_MSG_ILT = 0x2000000,
635 QED_MSG_RDMA = 0x4000000,
636 QED_MSG_DEBUG = 0x8000000,
637 /* to be added...up to 0x8000000 */
646 struct qed_eth_stats {
647 u64 no_buff_discards;
648 u64 packet_too_big_discard;
656 u64 mftag_filter_discards;
657 u64 mac_filter_discards;
664 u64 tx_err_drop_pkts;
665 u64 tpa_coalesced_pkts;
666 u64 tpa_coalesced_events;
668 u64 tpa_not_coalesced_pkts;
669 u64 tpa_coalesced_bytes;
672 u64 rx_64_byte_packets;
673 u64 rx_65_to_127_byte_packets;
674 u64 rx_128_to_255_byte_packets;
675 u64 rx_256_to_511_byte_packets;
676 u64 rx_512_to_1023_byte_packets;
677 u64 rx_1024_to_1518_byte_packets;
678 u64 rx_1519_to_1522_byte_packets;
679 u64 rx_1519_to_2047_byte_packets;
680 u64 rx_2048_to_4095_byte_packets;
681 u64 rx_4096_to_9216_byte_packets;
682 u64 rx_9217_to_16383_byte_packets;
684 u64 rx_mac_crtl_frames;
688 u64 rx_carrier_errors;
689 u64 rx_oversize_packets;
691 u64 rx_undersize_packets;
693 u64 tx_64_byte_packets;
694 u64 tx_65_to_127_byte_packets;
695 u64 tx_128_to_255_byte_packets;
696 u64 tx_256_to_511_byte_packets;
697 u64 tx_512_to_1023_byte_packets;
698 u64 tx_1024_to_1518_byte_packets;
699 u64 tx_1519_to_2047_byte_packets;
700 u64 tx_2048_to_4095_byte_packets;
701 u64 tx_4096_to_9216_byte_packets;
702 u64 tx_9217_to_16383_byte_packets;
705 u64 tx_lpi_entry_count;
706 u64 tx_total_collisions;
710 u64 rx_mac_uc_packets;
711 u64 rx_mac_mc_packets;
712 u64 rx_mac_bc_packets;
713 u64 rx_mac_frames_ok;
715 u64 tx_mac_uc_packets;
716 u64 tx_mac_mc_packets;
717 u64 tx_mac_bc_packets;
718 u64 tx_mac_ctrl_frames;
721 #define QED_SB_IDX 0x0002
724 #define TX_PI(tc) (RX_PI + 1 + tc)
726 struct qed_sb_cnt_info {
732 static inline u16 qed_sb_update_sb_idx(struct qed_sb_info *sb_info)
737 prod = le32_to_cpu(sb_info->sb_virt->prod_index) &
738 STATUS_BLOCK_PROD_INDEX_MASK;
739 if (sb_info->sb_ack != prod) {
740 sb_info->sb_ack = prod;
751 * @brief This function creates an update command for interrupts that is
752 * written to the IGU.
754 * @param sb_info - This is the structure allocated and
755 * initialized per status block. Assumption is
756 * that it was initialized using qed_sb_init
757 * @param int_cmd - Enable/Disable/Nop
758 * @param upd_flg - whether igu consumer should be
761 * @return inline void
763 static inline void qed_sb_ack(struct qed_sb_info *sb_info,
764 enum igu_int_cmd int_cmd,
767 struct igu_prod_cons_update igu_ack = { 0 };
769 igu_ack.sb_id_and_flags =
770 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
771 (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
772 (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
773 (IGU_SEG_ACCESS_REG <<
774 IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
776 DIRECT_REG_WR(sb_info->igu_addr, igu_ack.sb_id_and_flags);
778 /* Both segments (interrupts & acks) are written to same place address;
779 * Need to guarantee all commands will be received (in-order) by HW.
785 static inline void __internal_ram_wr(void *p_hwfn,
793 for (i = 0; i < size / sizeof(*data); i++)
794 DIRECT_REG_WR(&((u32 __iomem *)addr)[i], data[i]);
797 static inline void internal_ram_wr(void __iomem *addr,
801 __internal_ram_wr(NULL, addr, size, data);
807 QED_RSS_IPV4_TCP = 0x4,
808 QED_RSS_IPV6_TCP = 0x8,
809 QED_RSS_IPV4_UDP = 0x10,
810 QED_RSS_IPV6_UDP = 0x20,
813 #define QED_RSS_IND_TABLE_SIZE 128
814 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */