1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Intel Low Power Subsystem PWM controller driver */
4 #ifndef __PLATFORM_DATA_X86_PWM_LPSS_H
5 #define __PLATFORM_DATA_X86_PWM_LPSS_H
7 #include <linux/types.h>
13 struct pwm_lpss_boardinfo {
14 unsigned long clk_rate;
16 unsigned long base_unit_bits;
18 * Some versions of the IP may stuck in the state machine if enable
19 * bit is not set, and hence update bit will show busy status till
20 * the reset. For the rest it may be otherwise.
24 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
25 * messes with the PWM0 controllers state,
27 bool other_devices_aml_touches_pwm_regs;
30 struct pwm_lpss_chip *devm_pwm_lpss_probe(struct device *dev, void __iomem *base,
31 const struct pwm_lpss_boardinfo *info);
33 #endif /* __PLATFORM_DATA_X86_PWM_LPSS_H */