1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_ARM_PLAT_OMAP4_ISS_H
3 #define ARCH_ARM_PLAT_OMAP4_ISS_H
9 enum iss_interface_type {
10 ISS_INTERFACE_CSI2A_PHY1,
11 ISS_INTERFACE_CSI2B_PHY2,
15 * struct iss_csiphy_lane: CSI2 lane position and polarity
16 * @pos: position of the lane
17 * @pol: polarity of the lane
19 struct iss_csiphy_lane {
24 #define ISS_CSIPHY1_NUM_DATA_LANES 4
25 #define ISS_CSIPHY2_NUM_DATA_LANES 1
28 * struct iss_csiphy_lanes_cfg - CSI2 lane configuration
29 * @data: Configuration of one or two data lanes
30 * @clk: Clock lane configuration
32 struct iss_csiphy_lanes_cfg {
33 struct iss_csiphy_lane data[ISS_CSIPHY1_NUM_DATA_LANES];
34 struct iss_csiphy_lane clk;
38 * struct iss_csi2_platform_data - CSI2 interface platform data
39 * @crc: Enable the cyclic redundancy check
40 * @vpclk_div: Video port output clock control
42 struct iss_csi2_platform_data {
45 struct iss_csiphy_lanes_cfg lanecfg;
48 struct iss_subdev_i2c_board_info {
49 struct i2c_board_info *board_info;
53 struct iss_v4l2_subdevs_group {
54 struct iss_subdev_i2c_board_info *subdevs;
55 enum iss_interface_type interface;
57 struct iss_csi2_platform_data csi2;
58 } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
61 struct iss_platform_data {
62 struct iss_v4l2_subdevs_group *subdevs;
63 void (*set_constraints)(struct iss_device *iss, bool enable);