1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
22 * On almost all architectures and configurations, 0 can be used as the
23 * upper ceiling to free_pgtables(): on many architectures it has the same
24 * effect as using TASK_SIZE. However, there is one configuration which
25 * must impose a more careful limit, to avoid freeing kernel pgtables.
27 #ifndef USER_PGTABLES_CEILING
28 #define USER_PGTABLES_CEILING 0UL
32 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
34 * The pXx_index() functions return the index of the entry in the page
35 * table page which would control the given virtual address
37 * As these functions may be used by the same code for different levels of
38 * the page table folding, they are always available, regardless of
39 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
40 * because in such cases PTRS_PER_PxD equals 1.
43 static inline unsigned long pte_index(unsigned long address)
45 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
47 #define pte_index pte_index
50 static inline unsigned long pmd_index(unsigned long address)
52 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
54 #define pmd_index pmd_index
58 static inline unsigned long pud_index(unsigned long address)
60 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
62 #define pud_index pud_index
66 /* Must be a compile-time constant, so implement it as a macro */
67 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
70 #ifndef pte_offset_kernel
71 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
73 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
75 #define pte_offset_kernel pte_offset_kernel
78 #if defined(CONFIG_HIGHPTE)
79 #define pte_offset_map(dir, address) \
80 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
82 #define pte_unmap(pte) kunmap_atomic((pte))
84 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
85 #define pte_unmap(pte) ((void)(pte)) /* NOP */
88 /* Find an entry in the second-level page table.. */
90 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
92 return pud_pgtable(*pud) + pmd_index(address);
94 #define pmd_offset pmd_offset
98 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
100 return p4d_pgtable(*p4d) + pud_index(address);
102 #define pud_offset pud_offset
105 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
107 return (pgd + pgd_index(address));
111 * a shortcut to get a pgd_t in a given mm
114 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
118 * a shortcut which implies the use of the kernel's pgd, instead
122 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
126 * In many cases it is known that a virtual address is mapped at PMD or PTE
127 * level, so instead of traversing all the page table levels, we can get a
128 * pointer to the PMD entry in user or kernel page table or translate a virtual
129 * address to the pointer in the PTE in the kernel page tables with simple
132 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
134 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
137 static inline pmd_t *pmd_off_k(unsigned long va)
139 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
142 static inline pte_t *virt_to_kpte(unsigned long vaddr)
144 pmd_t *pmd = pmd_off_k(vaddr);
146 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
149 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
150 extern int ptep_set_access_flags(struct vm_area_struct *vma,
151 unsigned long address, pte_t *ptep,
152 pte_t entry, int dirty);
155 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
156 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
157 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
158 unsigned long address, pmd_t *pmdp,
159 pmd_t entry, int dirty);
160 extern int pudp_set_access_flags(struct vm_area_struct *vma,
161 unsigned long address, pud_t *pudp,
162 pud_t entry, int dirty);
164 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
165 unsigned long address, pmd_t *pmdp,
166 pmd_t entry, int dirty)
171 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
172 unsigned long address, pud_t *pudp,
173 pud_t entry, int dirty)
178 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
181 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
182 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
183 unsigned long address,
191 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
196 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
197 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
198 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
199 unsigned long address,
207 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
211 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
212 unsigned long address,
218 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
221 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
222 int ptep_clear_flush_young(struct vm_area_struct *vma,
223 unsigned long address, pte_t *ptep);
226 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
227 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
228 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
229 unsigned long address, pmd_t *pmdp);
232 * Despite relevant to THP only, this API is called from generic rmap code
233 * under PageTransHuge(), hence needs a dummy implementation for !THP
235 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
236 unsigned long address, pmd_t *pmdp)
241 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
244 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
245 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
246 unsigned long address,
250 pte_clear(mm, address, ptep);
255 #ifndef __HAVE_ARCH_PTEP_GET
256 static inline pte_t ptep_get(pte_t *ptep)
258 return READ_ONCE(*ptep);
262 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
263 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
264 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
265 unsigned long address,
272 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
273 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
274 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
275 unsigned long address,
283 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
284 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
286 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
287 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
288 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
289 unsigned long address, pmd_t *pmdp,
292 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
296 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
297 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
298 unsigned long address, pud_t *pudp,
301 return pudp_huge_get_and_clear(mm, address, pudp);
304 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
306 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
307 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
308 unsigned long address, pte_t *ptep,
312 pte = ptep_get_and_clear(mm, address, ptep);
319 * If two threads concurrently fault at the same page, the thread that
320 * won the race updates the PTE and its local TLB/Cache. The other thread
321 * gives up, simply does nothing, and continues; on architectures where
322 * software can update TLB, local TLB can be updated here to avoid next page
323 * fault. This function updates TLB only, do nothing with cache or others.
324 * It is the difference with function update_mmu_cache.
326 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
327 static inline void update_mmu_tlb(struct vm_area_struct *vma,
328 unsigned long address, pte_t *ptep)
331 #define __HAVE_ARCH_UPDATE_MMU_TLB
335 * Some architectures may be able to avoid expensive synchronization
336 * primitives when modifications are made to PTE's which are already
337 * not present, or in the process of an address space destruction.
339 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
340 static inline void pte_clear_not_present_full(struct mm_struct *mm,
341 unsigned long address,
345 pte_clear(mm, address, ptep);
349 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
350 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
351 unsigned long address,
355 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
356 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
357 unsigned long address,
359 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
360 unsigned long address,
364 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
366 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
368 pte_t old_pte = *ptep;
369 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
374 * On some architectures hardware does not set page access bit when accessing
375 * memory page, it is responsibilty of software setting this bit. It brings
376 * out extra page fault penalty to track page access bit. For optimization page
377 * access bit can be set during all page fault flow on these arches.
378 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
379 * where software maintains page access bit.
381 #ifndef pte_sw_mkyoung
382 static inline pte_t pte_sw_mkyoung(pte_t pte)
386 #define pte_sw_mkyoung pte_sw_mkyoung
389 #ifndef pte_savedwrite
390 #define pte_savedwrite pte_write
393 #ifndef pte_mk_savedwrite
394 #define pte_mk_savedwrite pte_mkwrite
397 #ifndef pte_clear_savedwrite
398 #define pte_clear_savedwrite pte_wrprotect
401 #ifndef pmd_savedwrite
402 #define pmd_savedwrite pmd_write
405 #ifndef pmd_mk_savedwrite
406 #define pmd_mk_savedwrite pmd_mkwrite
409 #ifndef pmd_clear_savedwrite
410 #define pmd_clear_savedwrite pmd_wrprotect
413 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
414 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
415 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
416 unsigned long address, pmd_t *pmdp)
418 pmd_t old_pmd = *pmdp;
419 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
422 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
423 unsigned long address, pmd_t *pmdp)
427 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
429 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
430 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
431 static inline void pudp_set_wrprotect(struct mm_struct *mm,
432 unsigned long address, pud_t *pudp)
434 pud_t old_pud = *pudp;
436 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
439 static inline void pudp_set_wrprotect(struct mm_struct *mm,
440 unsigned long address, pud_t *pudp)
444 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
447 #ifndef pmdp_collapse_flush
448 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
449 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
450 unsigned long address, pmd_t *pmdp);
452 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
453 unsigned long address,
459 #define pmdp_collapse_flush pmdp_collapse_flush
460 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
463 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
464 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
468 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
469 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
472 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
474 * This is an implementation of pmdp_establish() that is only suitable for an
475 * architecture that doesn't have hardware dirty/accessed bits. In this case we
476 * can't race with CPU which sets these bits and non-atomic aproach is fine.
478 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
479 unsigned long address, pmd_t *pmdp, pmd_t pmd)
481 pmd_t old_pmd = *pmdp;
482 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
487 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
488 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
492 #ifndef __HAVE_ARCH_PTE_SAME
493 static inline int pte_same(pte_t pte_a, pte_t pte_b)
495 return pte_val(pte_a) == pte_val(pte_b);
499 #ifndef __HAVE_ARCH_PTE_UNUSED
501 * Some architectures provide facilities to virtualization guests
502 * so that they can flag allocated pages as unused. This allows the
503 * host to transparently reclaim unused pages. This function returns
504 * whether the pte's page is unused.
506 static inline int pte_unused(pte_t pte)
512 #ifndef pte_access_permitted
513 #define pte_access_permitted(pte, write) \
514 (pte_present(pte) && (!(write) || pte_write(pte)))
517 #ifndef pmd_access_permitted
518 #define pmd_access_permitted(pmd, write) \
519 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
522 #ifndef pud_access_permitted
523 #define pud_access_permitted(pud, write) \
524 (pud_present(pud) && (!(write) || pud_write(pud)))
527 #ifndef p4d_access_permitted
528 #define p4d_access_permitted(p4d, write) \
529 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
532 #ifndef pgd_access_permitted
533 #define pgd_access_permitted(pgd, write) \
534 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
537 #ifndef __HAVE_ARCH_PMD_SAME
538 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
540 return pmd_val(pmd_a) == pmd_val(pmd_b);
543 static inline int pud_same(pud_t pud_a, pud_t pud_b)
545 return pud_val(pud_a) == pud_val(pud_b);
549 #ifndef __HAVE_ARCH_P4D_SAME
550 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
552 return p4d_val(p4d_a) == p4d_val(p4d_b);
556 #ifndef __HAVE_ARCH_PGD_SAME
557 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
559 return pgd_val(pgd_a) == pgd_val(pgd_b);
564 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
565 * TLB flush will be required as a result of the "set". For example, use
566 * in scenarios where it is known ahead of time that the routine is
567 * setting non-present entries, or re-setting an existing entry to the
568 * same value. Otherwise, use the typical "set" helpers and flush the
571 #define set_pte_safe(ptep, pte) \
573 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
574 set_pte(ptep, pte); \
577 #define set_pmd_safe(pmdp, pmd) \
579 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
580 set_pmd(pmdp, pmd); \
583 #define set_pud_safe(pudp, pud) \
585 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
586 set_pud(pudp, pud); \
589 #define set_p4d_safe(p4dp, p4d) \
591 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
592 set_p4d(p4dp, p4d); \
595 #define set_pgd_safe(pgdp, pgd) \
597 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
598 set_pgd(pgdp, pgd); \
601 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
603 * Some architectures support metadata associated with a page. When a
604 * page is being swapped out, this metadata must be saved so it can be
605 * restored when the page is swapped back in. SPARC M7 and newer
606 * processors support an ADI (Application Data Integrity) tag for the
607 * page as metadata for the page. arch_do_swap_page() can restore this
608 * metadata when a page is swapped back in.
610 static inline void arch_do_swap_page(struct mm_struct *mm,
611 struct vm_area_struct *vma,
613 pte_t pte, pte_t oldpte)
619 #ifndef __HAVE_ARCH_UNMAP_ONE
621 * Some architectures support metadata associated with a page. When a
622 * page is being swapped out, this metadata must be saved so it can be
623 * restored when the page is swapped back in. SPARC M7 and newer
624 * processors support an ADI (Application Data Integrity) tag for the
625 * page as metadata for the page. arch_unmap_one() can save this
626 * metadata on a swap-out of a page.
628 static inline int arch_unmap_one(struct mm_struct *mm,
629 struct vm_area_struct *vma,
638 * Allow architectures to preserve additional metadata associated with
639 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
640 * prototypes must be defined in the arch-specific asm/pgtable.h file.
642 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
643 static inline int arch_prepare_to_swap(struct page *page)
649 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
650 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
654 static inline void arch_swap_invalidate_area(int type)
659 #ifndef __HAVE_ARCH_SWAP_RESTORE
660 static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
665 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
666 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
669 #ifndef __HAVE_ARCH_MOVE_PTE
670 #define move_pte(pte, prot, old_addr, new_addr) (pte)
673 #ifndef pte_accessible
674 # define pte_accessible(mm, pte) ((void)(pte), 1)
677 #ifndef flush_tlb_fix_spurious_fault
678 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
682 * When walking page tables, get the address of the next boundary,
683 * or the end address of the range if that comes earlier. Although no
684 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
687 #define pgd_addr_end(addr, end) \
688 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
689 (__boundary - 1 < (end) - 1)? __boundary: (end); \
693 #define p4d_addr_end(addr, end) \
694 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
695 (__boundary - 1 < (end) - 1)? __boundary: (end); \
700 #define pud_addr_end(addr, end) \
701 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
702 (__boundary - 1 < (end) - 1)? __boundary: (end); \
707 #define pmd_addr_end(addr, end) \
708 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
709 (__boundary - 1 < (end) - 1)? __boundary: (end); \
714 * When walking page tables, we usually want to skip any p?d_none entries;
715 * and any p?d_bad entries - reporting the error before resetting to none.
716 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
718 void pgd_clear_bad(pgd_t *);
720 #ifndef __PAGETABLE_P4D_FOLDED
721 void p4d_clear_bad(p4d_t *);
723 #define p4d_clear_bad(p4d) do { } while (0)
726 #ifndef __PAGETABLE_PUD_FOLDED
727 void pud_clear_bad(pud_t *);
729 #define pud_clear_bad(p4d) do { } while (0)
732 void pmd_clear_bad(pmd_t *);
734 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
738 if (unlikely(pgd_bad(*pgd))) {
745 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
749 if (unlikely(p4d_bad(*p4d))) {
756 static inline int pud_none_or_clear_bad(pud_t *pud)
760 if (unlikely(pud_bad(*pud))) {
767 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
771 if (unlikely(pmd_bad(*pmd))) {
778 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
783 * Get the current pte state, but zero it out to make it
784 * non-present, preventing the hardware from asynchronously
787 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
790 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
792 pte_t *ptep, pte_t pte)
795 * The pte is non-present, so there's no hardware state to
798 set_pte_at(vma->vm_mm, addr, ptep, pte);
801 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
803 * Start a pte protection read-modify-write transaction, which
804 * protects against asynchronous hardware modifications to the pte.
805 * The intention is not to prevent the hardware from making pte
806 * updates, but to prevent any updates it may make from being lost.
808 * This does not protect against other software modifications of the
809 * pte; the appropriate pte lock must be held over the transation.
811 * Note that this interface is intended to be batchable, meaning that
812 * ptep_modify_prot_commit may not actually update the pte, but merely
813 * queue the update to be done at some later time. The update must be
814 * actually committed before the pte lock is released, however.
816 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
820 return __ptep_modify_prot_start(vma, addr, ptep);
824 * Commit an update to a pte, leaving any hardware-controlled bits in
825 * the PTE unmodified.
827 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
829 pte_t *ptep, pte_t old_pte, pte_t pte)
831 __ptep_modify_prot_commit(vma, addr, ptep, pte);
833 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
834 #endif /* CONFIG_MMU */
837 * No-op macros that just return the current protection value. Defined here
838 * because these macros can be used even if CONFIG_MMU is not defined.
842 #define pgprot_nx(prot) (prot)
845 #ifndef pgprot_noncached
846 #define pgprot_noncached(prot) (prot)
849 #ifndef pgprot_writecombine
850 #define pgprot_writecombine pgprot_noncached
853 #ifndef pgprot_writethrough
854 #define pgprot_writethrough pgprot_noncached
857 #ifndef pgprot_device
858 #define pgprot_device pgprot_noncached
862 #define pgprot_mhp(prot) (prot)
866 #ifndef pgprot_modify
867 #define pgprot_modify pgprot_modify
868 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
870 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
871 newprot = pgprot_noncached(newprot);
872 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
873 newprot = pgprot_writecombine(newprot);
874 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
875 newprot = pgprot_device(newprot);
879 #endif /* CONFIG_MMU */
881 #ifndef pgprot_encrypted
882 #define pgprot_encrypted(prot) (prot)
885 #ifndef pgprot_decrypted
886 #define pgprot_decrypted(prot) (prot)
890 * A facility to provide lazy MMU batching. This allows PTE updates and
891 * page invalidations to be delayed until a call to leave lazy MMU mode
892 * is issued. Some architectures may benefit from doing this, and it is
893 * beneficial for both shadow and direct mode hypervisors, which may batch
894 * the PTE updates which happen during this window. Note that using this
895 * interface requires that read hazards be removed from the code. A read
896 * hazard could result in the direct mode hypervisor case, since the actual
897 * write to the page tables may not yet have taken place, so reads though
898 * a raw PTE pointer after it has been modified are not guaranteed to be
899 * up to date. This mode can only be entered and left under the protection of
900 * the page table locks for all page tables which may be modified. In the UP
901 * case, this is required so that preemption is disabled, and in the SMP case,
902 * it must synchronize the delayed page table writes properly on other CPUs.
904 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
905 #define arch_enter_lazy_mmu_mode() do {} while (0)
906 #define arch_leave_lazy_mmu_mode() do {} while (0)
907 #define arch_flush_lazy_mmu_mode() do {} while (0)
911 * A facility to provide batching of the reload of page tables and
912 * other process state with the actual context switch code for
913 * paravirtualized guests. By convention, only one of the batched
914 * update (lazy) modes (CPU, MMU) should be active at any given time,
915 * entry should never be nested, and entry and exits should always be
916 * paired. This is for sanity of maintaining and reasoning about the
917 * kernel code. In this case, the exit (end of the context switch) is
918 * in architecture-specific code, and so doesn't need a generic
921 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
922 #define arch_start_context_switch(prev) do {} while (0)
925 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
926 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
927 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
932 static inline int pmd_swp_soft_dirty(pmd_t pmd)
937 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
942 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
943 static inline int pte_soft_dirty(pte_t pte)
948 static inline int pmd_soft_dirty(pmd_t pmd)
953 static inline pte_t pte_mksoft_dirty(pte_t pte)
958 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
963 static inline pte_t pte_clear_soft_dirty(pte_t pte)
968 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
973 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
978 static inline int pte_swp_soft_dirty(pte_t pte)
983 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
988 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
993 static inline int pmd_swp_soft_dirty(pmd_t pmd)
998 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1004 #ifndef __HAVE_PFNMAP_TRACKING
1006 * Interfaces that can be used by architecture code to keep track of
1007 * memory type of pfn mappings specified by the remap_pfn_range,
1012 * track_pfn_remap is called when a _new_ pfn mapping is being established
1013 * by remap_pfn_range() for physical range indicated by pfn and size.
1015 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1016 unsigned long pfn, unsigned long addr,
1023 * track_pfn_insert is called when a _new_ single pfn is established
1024 * by vmf_insert_pfn().
1026 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1032 * track_pfn_copy is called when vma that is covering the pfnmap gets
1033 * copied through copy_page_range().
1035 static inline int track_pfn_copy(struct vm_area_struct *vma)
1041 * untrack_pfn is called while unmapping a pfnmap for a region.
1042 * untrack can be called for a specific region indicated by pfn and size or
1043 * can be for the entire vma (in which case pfn, size are zero).
1045 static inline void untrack_pfn(struct vm_area_struct *vma,
1046 unsigned long pfn, unsigned long size)
1051 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1053 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1057 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1058 unsigned long pfn, unsigned long addr,
1059 unsigned long size);
1060 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1062 extern int track_pfn_copy(struct vm_area_struct *vma);
1063 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1064 unsigned long size);
1065 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1068 #ifdef __HAVE_COLOR_ZERO_PAGE
1069 static inline int is_zero_pfn(unsigned long pfn)
1071 extern unsigned long zero_pfn;
1072 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1073 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1076 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1079 static inline int is_zero_pfn(unsigned long pfn)
1081 extern unsigned long zero_pfn;
1082 return pfn == zero_pfn;
1085 static inline unsigned long my_zero_pfn(unsigned long addr)
1087 extern unsigned long zero_pfn;
1094 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1095 static inline int pmd_trans_huge(pmd_t pmd)
1100 static inline int pmd_write(pmd_t pmd)
1105 #endif /* pmd_write */
1106 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1109 static inline int pud_write(pud_t pud)
1114 #endif /* pud_write */
1116 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1117 static inline int pmd_devmap(pmd_t pmd)
1121 static inline int pud_devmap(pud_t pud)
1125 static inline int pgd_devmap(pgd_t pgd)
1131 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1132 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1133 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1134 static inline int pud_trans_huge(pud_t pud)
1140 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1141 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1143 pud_t pudval = READ_ONCE(*pud);
1145 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1147 if (unlikely(pud_bad(pudval))) {
1154 /* See pmd_trans_unstable for discussion. */
1155 static inline int pud_trans_unstable(pud_t *pud)
1157 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1158 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1159 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1165 #ifndef pmd_read_atomic
1166 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1169 * Depend on compiler for an atomic pmd read. NOTE: this is
1170 * only going to work, if the pmdval_t isn't larger than
1177 #ifndef arch_needs_pgtable_deposit
1178 #define arch_needs_pgtable_deposit() (false)
1181 * This function is meant to be used by sites walking pagetables with
1182 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1183 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1184 * into a null pmd and the transhuge page fault can convert a null pmd
1185 * into an hugepmd or into a regular pmd (if the hugepage allocation
1186 * fails). While holding the mmap_lock in read mode the pmd becomes
1187 * stable and stops changing under us only if it's not null and not a
1188 * transhuge pmd. When those races occurs and this function makes a
1189 * difference vs the standard pmd_none_or_clear_bad, the result is
1190 * undefined so behaving like if the pmd was none is safe (because it
1191 * can return none anyway). The compiler level barrier() is critically
1192 * important to compute the two checks atomically on the same pmdval.
1194 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1195 * care of reading the pmd atomically to avoid SMP race conditions
1196 * against pmd_populate() when the mmap_lock is hold for reading by the
1197 * caller (a special atomic read not done by "gcc" as in the generic
1198 * version above, is also needed when THP is disabled because the page
1199 * fault can populate the pmd from under us).
1201 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1203 pmd_t pmdval = pmd_read_atomic(pmd);
1205 * The barrier will stabilize the pmdval in a register or on
1206 * the stack so that it will stop changing under the code.
1208 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1209 * pmd_read_atomic is allowed to return a not atomic pmdval
1210 * (for example pointing to an hugepage that has never been
1211 * mapped in the pmd). The below checks will only care about
1212 * the low part of the pmd with 32bit PAE x86 anyway, with the
1213 * exception of pmd_none(). So the important thing is that if
1214 * the low part of the pmd is found null, the high part will
1215 * be also null or the pmd_none() check below would be
1218 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1222 * !pmd_present() checks for pmd migration entries
1224 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1225 * But using that requires moving current function and pmd_trans_unstable()
1226 * to linux/swapops.h to resovle dependency, which is too much code move.
1228 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1229 * because !pmd_present() pages can only be under migration not swapped
1232 * pmd_none() is preseved for future condition checks on pmd migration
1233 * entries and not confusing with this function name, although it is
1234 * redundant with !pmd_present().
1236 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1237 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1239 if (unlikely(pmd_bad(pmdval))) {
1247 * This is a noop if Transparent Hugepage Support is not built into
1248 * the kernel. Otherwise it is equivalent to
1249 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1250 * places that already verified the pmd is not none and they want to
1251 * walk ptes while holding the mmap sem in read mode (write mode don't
1252 * need this). If THP is not enabled, the pmd can't go away under the
1253 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1254 * run a pmd_trans_unstable before walking the ptes after
1255 * split_huge_pmd returns (because it may have run when the pmd become
1256 * null, but then a page fault can map in a THP and not a regular page).
1258 static inline int pmd_trans_unstable(pmd_t *pmd)
1260 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1261 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1267 #ifndef CONFIG_NUMA_BALANCING
1269 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1270 * the only case the kernel cares is for NUMA balancing and is only ever set
1271 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1272 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1273 * is the responsibility of the caller to distinguish between PROT_NONE
1274 * protections and NUMA hinting fault protections.
1276 static inline int pte_protnone(pte_t pte)
1281 static inline int pmd_protnone(pmd_t pmd)
1285 #endif /* CONFIG_NUMA_BALANCING */
1287 #endif /* CONFIG_MMU */
1289 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1291 #ifndef __PAGETABLE_P4D_FOLDED
1292 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1293 int p4d_clear_huge(p4d_t *p4d);
1295 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1299 static inline int p4d_clear_huge(p4d_t *p4d)
1303 #endif /* !__PAGETABLE_P4D_FOLDED */
1305 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1306 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1307 int pud_clear_huge(pud_t *pud);
1308 int pmd_clear_huge(pmd_t *pmd);
1309 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1310 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1311 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1312 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1313 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1317 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1321 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1325 static inline int p4d_clear_huge(p4d_t *p4d)
1329 static inline int pud_clear_huge(pud_t *pud)
1333 static inline int pmd_clear_huge(pmd_t *pmd)
1337 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1341 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1345 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1349 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1351 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1352 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1354 * ARCHes with special requirements for evicting THP backing TLB entries can
1355 * implement this. Otherwise also, it can help optimize normal TLB flush in
1356 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1357 * entire TLB if flush span is greater than a threshold, which will
1358 * likely be true for a single huge page. Thus a single THP flush will
1359 * invalidate the entire TLB which is not desirable.
1360 * e.g. see arch/arc: flush_pmd_tlb_range
1362 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1363 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1365 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1366 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1371 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1372 unsigned long size, pgprot_t *vma_prot);
1374 #ifndef CONFIG_X86_ESPFIX64
1375 static inline void init_espfix_bsp(void) { }
1378 extern void __init pgtable_cache_init(void);
1380 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1381 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1386 static inline bool arch_has_pfn_modify_check(void)
1390 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1393 * Architecture PAGE_KERNEL_* fallbacks
1395 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1396 * because they really don't support them, or the port needs to be updated to
1397 * reflect the required functionality. Below are a set of relatively safe
1398 * fallbacks, as best effort, which we can count on in lieu of the architectures
1399 * not defining them on their own yet.
1402 #ifndef PAGE_KERNEL_RO
1403 # define PAGE_KERNEL_RO PAGE_KERNEL
1406 #ifndef PAGE_KERNEL_EXEC
1407 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1411 * Page Table Modification bits for pgtbl_mod_mask.
1413 * These are used by the p?d_alloc_track*() set of functions an in the generic
1414 * vmalloc/ioremap code to track at which page-table levels entries have been
1415 * modified. Based on that the code can better decide when vmalloc and ioremap
1416 * mapping changes need to be synchronized to other page-tables in the system.
1418 #define __PGTBL_PGD_MODIFIED 0
1419 #define __PGTBL_P4D_MODIFIED 1
1420 #define __PGTBL_PUD_MODIFIED 2
1421 #define __PGTBL_PMD_MODIFIED 3
1422 #define __PGTBL_PTE_MODIFIED 4
1424 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1425 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1426 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1427 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1428 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1430 /* Page-Table Modification Mask */
1431 typedef unsigned int pgtbl_mod_mask;
1433 #endif /* !__ASSEMBLY__ */
1435 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1436 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1438 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1439 * with physical address space extension, but falls back to
1440 * BITS_PER_LONG otherwise.
1442 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1444 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1448 #ifndef has_transparent_hugepage
1449 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1450 #define has_transparent_hugepage() 1
1452 #define has_transparent_hugepage() 0
1457 * On some architectures it depends on the mm if the p4d/pud or pmd
1458 * layer of the page table hierarchy is folded or not.
1460 #ifndef mm_p4d_folded
1461 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1464 #ifndef mm_pud_folded
1465 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1468 #ifndef mm_pmd_folded
1469 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1472 #ifndef p4d_offset_lockless
1473 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1475 #ifndef pud_offset_lockless
1476 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1478 #ifndef pmd_offset_lockless
1479 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1483 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1484 * This differs from p?d_huge() by the fact that they are always available (if
1485 * the architecture supports large pages at the appropriate level) even
1486 * if CONFIG_HUGETLB_PAGE is not defined.
1487 * Only meaningful when called on a valid entry.
1490 #define pgd_leaf(x) 0
1493 #define p4d_leaf(x) 0
1496 #define pud_leaf(x) 0
1499 #define pmd_leaf(x) 0
1502 #endif /* _LINUX_PGTABLE_H */