include/linux/mtd/spinand.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2016-2017 Micron Technology, Inc.
   4  *
   5  *  Authors:
   6  *      Peter Pan <peterpandong@micron.com>
   7  */
   8 #ifndef __LINUX_MTD_SPINAND_H
   9 #define __LINUX_MTD_SPINAND_H
  10
  11 #include <linux/mutex.h>
  12 #include <linux/bitops.h>
  13 #include <linux/device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/nand.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/spi-mem.h>
  18
  19 /**
  20  * Standard SPI NAND flash operations
  21  */
  22
  23 #define SPINAND_RESET_OP                                                \
  24         SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1),                             \
  25                    SPI_MEM_OP_NO_ADDR,                                  \
  26                    SPI_MEM_OP_NO_DUMMY,                                 \
  27                    SPI_MEM_OP_NO_DATA)
  28
  29 #define SPINAND_WR_EN_DIS_OP(enable)                                    \
  30         SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1),           \
  31                    SPI_MEM_OP_NO_ADDR,                                  \
  32                    SPI_MEM_OP_NO_DUMMY,                                 \
  33                    SPI_MEM_OP_NO_DATA)
  34
  35 #define SPINAND_READID_OP(ndummy, buf, len)                             \
  36         SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1),                             \
  37                    SPI_MEM_OP_NO_ADDR,                                  \
  38                    SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  39                    SPI_MEM_OP_DATA_IN(len, buf, 1))
  40
  41 #define SPINAND_SET_FEATURE_OP(reg, valptr)                             \
  42         SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1),                             \
  43                    SPI_MEM_OP_ADDR(1, reg, 1),                          \
  44                    SPI_MEM_OP_NO_DUMMY,                                 \
  45                    SPI_MEM_OP_DATA_OUT(1, valptr, 1))
  46
  47 #define SPINAND_GET_FEATURE_OP(reg, valptr)                             \
  48         SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1),                             \
  49                    SPI_MEM_OP_ADDR(1, reg, 1),                          \
  50                    SPI_MEM_OP_NO_DUMMY,                                 \
  51                    SPI_MEM_OP_DATA_IN(1, valptr, 1))
  52
  53 #define SPINAND_BLK_ERASE_OP(addr)                                      \
  54         SPI_MEM_OP(SPI_MEM_OP_CMD(0xd8, 1),                             \
  55                    SPI_MEM_OP_ADDR(3, addr, 1),                         \
  56                    SPI_MEM_OP_NO_DUMMY,                                 \
  57                    SPI_MEM_OP_NO_DATA)
  58
  59 #define SPINAND_PAGE_READ_OP(addr)                                      \
  60         SPI_MEM_OP(SPI_MEM_OP_CMD(0x13, 1),                             \
  61                    SPI_MEM_OP_ADDR(3, addr, 1),                         \
  62                    SPI_MEM_OP_NO_DUMMY,                                 \
  63                    SPI_MEM_OP_NO_DATA)
  64
  65 #define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len)   \
  66         SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1),               \
  67                    SPI_MEM_OP_ADDR(2, addr, 1),                         \
  68                    SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  69                    SPI_MEM_OP_DATA_IN(len, buf, 1))
  70
  71 #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len)      \
  72         SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1),                             \
  73                    SPI_MEM_OP_ADDR(2, addr, 1),                         \
  74                    SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  75                    SPI_MEM_OP_DATA_IN(len, buf, 2))
  76
  77 #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len)      \
  78         SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1),                             \
  79                    SPI_MEM_OP_ADDR(2, addr, 1),                         \
  80                    SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  81                    SPI_MEM_OP_DATA_IN(len, buf, 4))
  82
  83 #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len)  \
  84         SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1),                             \
  85                    SPI_MEM_OP_ADDR(2, addr, 2),                         \
  86                    SPI_MEM_OP_DUMMY(ndummy, 2),                         \
  87                    SPI_MEM_OP_DATA_IN(len, buf, 2))
  88
  89 #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len)  \
  90         SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1),                             \
  91                    SPI_MEM_OP_ADDR(2, addr, 4),                         \
  92                    SPI_MEM_OP_DUMMY(ndummy, 4),                         \
  93                    SPI_MEM_OP_DATA_IN(len, buf, 4))
  94
  95 #define SPINAND_PROG_EXEC_OP(addr)                                      \
  96         SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1),                             \
  97                    SPI_MEM_OP_ADDR(3, addr, 1),                         \
  98                    SPI_MEM_OP_NO_DUMMY,                                 \
  99                    SPI_MEM_OP_NO_DATA)
 100
 101 #define SPINAND_PROG_LOAD(reset, addr, buf, len)                        \
 102         SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x02 : 0x84, 1),              \
 103                    SPI_MEM_OP_ADDR(2, addr, 1),                         \
 104                    SPI_MEM_OP_NO_DUMMY,                                 \
 105                    SPI_MEM_OP_DATA_OUT(len, buf, 1))
 106
 107 #define SPINAND_PROG_LOAD_X4(reset, addr, buf, len)                     \
 108         SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x32 : 0x34, 1),              \
 109                    SPI_MEM_OP_ADDR(2, addr, 1),                         \
 110                    SPI_MEM_OP_NO_DUMMY,                                 \
 111                    SPI_MEM_OP_DATA_OUT(len, buf, 4))
 112
 113 /**
 114  * Standard SPI NAND flash commands
 115  */
 116 #define SPINAND_CMD_PROG_LOAD_X4                0x32
 117 #define SPINAND_CMD_PROG_LOAD_RDM_DATA_X4       0x34
 118
 119 /* feature register */
 120 #define REG_BLOCK_LOCK          0xa0
 121 #define BL_ALL_UNLOCKED         0x00
 122
 123 /* configuration register */
 124 #define REG_CFG                 0xb0
 125 #define CFG_OTP_ENABLE          BIT(6)
 126 #define CFG_ECC_ENABLE          BIT(4)
 127 #define CFG_QUAD_ENABLE         BIT(0)
 128
 129 /* status register */
 130 #define REG_STATUS              0xc0
 131 #define STATUS_BUSY             BIT(0)
 132 #define STATUS_ERASE_FAILED     BIT(2)
 133 #define STATUS_PROG_FAILED      BIT(3)
 134 #define STATUS_ECC_MASK         GENMASK(5, 4)
 135 #define STATUS_ECC_NO_BITFLIPS  (0 << 4)
 136 #define STATUS_ECC_HAS_BITFLIPS (1 << 4)
 137 #define STATUS_ECC_UNCOR_ERROR  (2 << 4)
 138
 139 struct spinand_op;
 140 struct spinand_device;
 141
 142 #define SPINAND_MAX_ID_LEN      4
 143
 144 /**
 145  * struct spinand_id - SPI NAND id structure
 146  * @data: buffer containing the id bytes. Currently 4 bytes large, but can
 147  *        be extended if required
 148  * @len: ID length
 149  *
 150  * struct_spinand_id->data contains all bytes returned after a READ_ID command,
 151  * including dummy bytes if the chip does not emit ID bytes right after the
 152  * READ_ID command. The responsibility to extract real ID bytes is left to
 153  * struct_manufacurer_ops->detect().
 154  */
 155 struct spinand_id {
 156         u8 data[SPINAND_MAX_ID_LEN];
 157         int len;
 158 };
 159
 160 /**
 161  * struct manufacurer_ops - SPI NAND manufacturer specific operations
 162  * @detect: detect a SPI NAND device. Every time a SPI NAND device is probed
 163  *          the core calls the struct_manufacurer_ops->detect() hook of each
 164  *          registered manufacturer until one of them return 1. Note that
 165  *          the first thing to check in this hook is that the manufacturer ID
 166  *          in struct_spinand_device->id matches the manufacturer whose
 167  *          ->detect() hook has been called. Should return 1 if there's a
 168  *          match, 0 if the manufacturer ID does not match and a negative
 169  *          error code otherwise. When true is returned, the core assumes
 170  *          that properties of the NAND chip (spinand->base.memorg and
 171  *          spinand->base.eccreq) have been filled
 172  * @init: initialize a SPI NAND device
 173  * @cleanup: cleanup a SPI NAND device
 174  *
 175  * Each SPI NAND manufacturer driver should implement this interface so that
 176  * NAND chips coming from this vendor can be detected and initialized properly.
 177  */
 178 struct spinand_manufacturer_ops {
 179         int (*detect)(struct spinand_device *spinand);
 180         int (*init)(struct spinand_device *spinand);
 181         void (*cleanup)(struct spinand_device *spinand);
 182 };
 183
 184 /**
 185  * struct spinand_manufacturer - SPI NAND manufacturer instance
 186  * @id: manufacturer ID
 187  * @name: manufacturer name
 188  * @ops: manufacturer operations
 189  */
 190 struct spinand_manufacturer {
 191         u8 id;
 192         char *name;
 193         const struct spinand_manufacturer_ops *ops;
 194 };
 195
 196 /* SPI NAND manufacturers */
 197 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 198 extern const struct spinand_manufacturer micron_spinand_manufacturer;
 199 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 200
 201 /**
 202  * struct spinand_op_variants - SPI NAND operation variants
 203  * @ops: the list of variants for a given operation
 204  * @nops: the number of variants
 205  *
 206  * Some operations like read-from-cache/write-to-cache have several variants
 207  * depending on the number of IO lines you use to transfer data or address
 208  * cycles. This structure is a way to describe the different variants supported
 209  * by a chip and let the core pick the best one based on the SPI mem controller
 210  * capabilities.
 211  */
 212 struct spinand_op_variants {
 213         const struct spi_mem_op *ops;
 214         unsigned int nops;
 215 };
 216
 217 #define SPINAND_OP_VARIANTS(name, ...)                                  \
 218         const struct spinand_op_variants name = {                       \
 219                 .ops = (struct spi_mem_op[]) { __VA_ARGS__ },           \
 220                 .nops = sizeof((struct spi_mem_op[]){ __VA_ARGS__ }) /  \
 221                         sizeof(struct spi_mem_op),                      \
 222         }
 223
 224 /**
 225  * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND
 226  *                    chip
 227  * @get_status: get the ECC status. Should return a positive number encoding
 228  *              the number of corrected bitflips if correction was possible or
 229  *              -EBADMSG if there are uncorrectable errors. I can also return
 230  *              other negative error codes if the error is not caused by
 231  *              uncorrectable bitflips
 232  * @ooblayout: the OOB layout used by the on-die ECC implementation
 233  */
 234 struct spinand_ecc_info {
 235         int (*get_status)(struct spinand_device *spinand, u8 status);
 236         const struct mtd_ooblayout_ops *ooblayout;
 237 };
 238
 239 #define SPINAND_HAS_QE_BIT              BIT(0)
 240
 241 /**
 242  * struct spinand_info - Structure used to describe SPI NAND chips
 243  * @model: model name
 244  * @devid: device ID
 245  * @flags: OR-ing of the SPINAND_XXX flags
 246  * @memorg: memory organization
 247  * @eccreq: ECC requirements
 248  * @eccinfo: on-die ECC info
 249  * @op_variants: operations variants
 250  * @op_variants.read_cache: variants of the read-cache operation
 251  * @op_variants.write_cache: variants of the write-cache operation
 252  * @op_variants.update_cache: variants of the update-cache operation
 253  * @select_target: function used to select a target/die. Required only for
 254  *                 multi-die chips
 255  *
 256  * Each SPI NAND manufacturer driver should have a spinand_info table
 257  * describing all the chips supported by the driver.
 258  */
 259 struct spinand_info {
 260         const char *model;
 261         u8 devid;
 262         u32 flags;
 263         struct nand_memory_organization memorg;
 264         struct nand_ecc_req eccreq;
 265         struct spinand_ecc_info eccinfo;
 266         struct {
 267                 const struct spinand_op_variants *read_cache;
 268                 const struct spinand_op_variants *write_cache;
 269                 const struct spinand_op_variants *update_cache;
 270         } op_variants;
 271         int (*select_target)(struct spinand_device *spinand,
 272                              unsigned int target);
 273 };
 274
 275 #define SPINAND_INFO_OP_VARIANTS(__read, __write, __update)             \
 276         {                                                               \
 277                 .read_cache = __read,                                   \
 278                 .write_cache = __write,                                 \
 279                 .update_cache = __update,                               \
 280         }
 281
 282 #define SPINAND_ECCINFO(__ooblayout, __get_status)                      \
 283         .eccinfo = {                                                    \
 284                 .ooblayout = __ooblayout,                               \
 285                 .get_status = __get_status,                             \
 286         }
 287
 288 #define SPINAND_SELECT_TARGET(__func)                                   \
 289         .select_target = __func,
 290
 291 #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants,  \
 292                      __flags, ...)                                      \
 293         {                                                               \
 294                 .model = __model,                                       \
 295                 .devid = __id,                                          \
 296                 .memorg = __memorg,                                     \
 297                 .eccreq = __eccreq,                                     \
 298                 .op_variants = __op_variants,                           \
 299                 .flags = __flags,                                       \
 300                 __VA_ARGS__                                             \
 301         }
 302
 303 /**
 304  * struct spinand_device - SPI NAND device instance
 305  * @base: NAND device instance
 306  * @spimem: pointer to the SPI mem object
 307  * @lock: lock used to serialize accesses to the NAND
 308  * @id: NAND ID as returned by READ_ID
 309  * @flags: NAND flags
 310  * @op_templates: various SPI mem op templates
 311  * @op_templates.read_cache: read cache op template
 312  * @op_templates.write_cache: write cache op template
 313  * @op_templates.update_cache: update cache op template
 314  * @select_target: select a specific target/die. Usually called before sending
 315  *                 a command addressing a page or an eraseblock embedded in
 316  *                 this die. Only required if your chip exposes several dies
 317  * @cur_target: currently selected target/die
 318  * @eccinfo: on-die ECC information
 319  * @cfg_cache: config register cache. One entry per die
 320  * @databuf: bounce buffer for data
 321  * @oobbuf: bounce buffer for OOB data
 322  * @scratchbuf: buffer used for everything but page accesses. This is needed
 323  *              because the spi-mem interface explicitly requests that buffers
 324  *              passed in spi_mem_op be DMA-able, so we can't based the bufs on
 325  *              the stack
 326  * @manufacturer: SPI NAND manufacturer information
 327  * @priv: manufacturer private data
 328  */
 329 struct spinand_device {
 330         struct nand_device base;
 331         struct spi_mem *spimem;
 332         struct mutex lock;
 333         struct spinand_id id;
 334         u32 flags;
 335
 336         struct {
 337                 const struct spi_mem_op *read_cache;
 338                 const struct spi_mem_op *write_cache;
 339                 const struct spi_mem_op *update_cache;
 340         } op_templates;
 341
 342         int (*select_target)(struct spinand_device *spinand,
 343                              unsigned int target);
 344         unsigned int cur_target;
 345
 346         struct spinand_ecc_info eccinfo;
 347
 348         u8 *cfg_cache;
 349         u8 *databuf;
 350         u8 *oobbuf;
 351         u8 *scratchbuf;
 352         const struct spinand_manufacturer *manufacturer;
 353         void *priv;
 354 };
 355
 356 /**
 357  * mtd_to_spinand() - Get the SPI NAND device attached to an MTD instance
 358  * @mtd: MTD instance
 359  *
 360  * Return: the SPI NAND device attached to @mtd.
 361  */
 362 static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd)
 363 {
 364         return container_of(mtd_to_nanddev(mtd), struct spinand_device, base);
 365 }
 366
 367 /**
 368  * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device
 369  * @spinand: SPI NAND device
 370  *
 371  * Return: the MTD device embedded in @spinand.
 372  */
 373 static inline struct mtd_info *spinand_to_mtd(struct spinand_device *spinand)
 374 {
 375         return nanddev_to_mtd(&spinand->base);
 376 }
 377
 378 /**
 379  * nand_to_spinand() - Get the SPI NAND device embedding an NAND object
 380  * @nand: NAND object
 381  *
 382  * Return: the SPI NAND device embedding @nand.
 383  */
 384 static inline struct spinand_device *nand_to_spinand(struct nand_device *nand)
 385 {
 386         return container_of(nand, struct spinand_device, base);
 387 }
 388
 389 /**
 390  * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object
 391  * @spinand: SPI NAND device
 392  *
 393  * Return: the NAND device embedded in @spinand.
 394  */
 395 static inline struct nand_device *
 396 spinand_to_nand(struct spinand_device *spinand)
 397 {
 398         return &spinand->base;
 399 }
 400
 401 /**
 402  * spinand_set_of_node - Attach a DT node to a SPI NAND device
 403  * @spinand: SPI NAND device
 404  * @np: DT node
 405  *
 406  * Attach a DT node to a SPI NAND device.
 407  */
 408 static inline void spinand_set_of_node(struct spinand_device *spinand,
 409                                        struct device_node *np)
 410 {
 411         nanddev_set_of_node(&spinand->base, np);
 412 }
 413
 414 int spinand_match_and_init(struct spinand_device *dev,
 415                            const struct spinand_info *table,
 416                            unsigned int table_size, u8 devid);
 417
 418 int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
 419 int spinand_select_target(struct spinand_device *spinand, unsigned int target);
 420
 421 #endif /* __LINUX_MTD_SPINAND_H */