2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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33 #ifndef MLX5_CORE_CQ_H
34 #define MLX5_CORE_CQ_H
36 #include <rdma/ib_verbs.h>
37 #include <linux/mlx5/driver.h>
45 struct mlx5_uars_page *uar;
47 struct completion free;
50 void (*comp) (struct mlx5_core_cq *);
51 void (*event) (struct mlx5_core_cq *, enum mlx5_event);
54 struct mlx5_rsc_debug *dbg;
57 struct list_head list;
58 void (*comp)(struct mlx5_core_cq *);
61 int reset_notify_added;
62 struct list_head reset_notify;
67 MLX5_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01,
68 MLX5_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02,
69 MLX5_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04,
70 MLX5_CQE_SYNDROME_WR_FLUSH_ERR = 0x05,
71 MLX5_CQE_SYNDROME_MW_BIND_ERR = 0x06,
72 MLX5_CQE_SYNDROME_BAD_RESP_ERR = 0x10,
73 MLX5_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11,
74 MLX5_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12,
75 MLX5_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13,
76 MLX5_CQE_SYNDROME_REMOTE_OP_ERR = 0x14,
77 MLX5_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15,
78 MLX5_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16,
79 MLX5_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22,
83 MLX5_CQE_OWNER_MASK = 1,
85 MLX5_CQE_RESP_WR_IMM = 1,
86 MLX5_CQE_RESP_SEND = 2,
87 MLX5_CQE_RESP_SEND_IMM = 3,
88 MLX5_CQE_RESP_SEND_INV = 4,
89 MLX5_CQE_RESIZE_CQ = 5,
90 MLX5_CQE_SIG_ERR = 12,
91 MLX5_CQE_REQ_ERR = 13,
92 MLX5_CQE_RESP_ERR = 14,
93 MLX5_CQE_INVALID = 15,
97 MLX5_CQ_MODIFY_PERIOD = 1 << 0,
98 MLX5_CQ_MODIFY_COUNT = 1 << 1,
99 MLX5_CQ_MODIFY_OVERRUN = 1 << 2,
103 MLX5_CQ_OPMOD_RESIZE = 1,
104 MLX5_MODIFY_CQ_MASK_LOG_SIZE = 1 << 0,
105 MLX5_MODIFY_CQ_MASK_PG_OFFSET = 1 << 1,
106 MLX5_MODIFY_CQ_MASK_PG_SIZE = 1 << 2,
109 struct mlx5_cq_modify_params {
130 static inline int cqe_sz_to_mlx_sz(u8 size)
132 return size == 64 ? CQE_SIZE_64 : CQE_SIZE_128;
135 static inline void mlx5_cq_set_ci(struct mlx5_core_cq *cq)
137 *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
141 MLX5_CQ_DB_REQ_NOT_SOL = 1 << 24,
142 MLX5_CQ_DB_REQ_NOT = 0 << 24
145 static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
146 void __iomem *uar_page,
154 ci = cons_index & 0xffffff;
156 *cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
158 /* Make sure that the doorbell record in host memory is
159 * written before ringing the doorbell via PCI MMIO.
163 doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
164 doorbell[1] = cpu_to_be32(cq->cqn);
166 mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, NULL);
169 int mlx5_init_cq_table(struct mlx5_core_dev *dev);
170 void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev);
171 int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
173 int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
174 int mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
175 u32 *out, int outlen);
176 int mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
178 int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
179 struct mlx5_core_cq *cq, u16 cq_period,
181 int mlx5_debug_cq_add(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
182 void mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
184 #endif /* MLX5_CORE_CQ_H */