1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/device.h>
8 #include <linux/jiffies.h>
9 #include <linux/mmc/card.h>
10 #include <linux/platform_device.h>
11 #include <linux/pm_runtime.h>
13 #define tmio_ioread8(addr) readb(addr)
14 #define tmio_ioread16(addr) readw(addr)
15 #define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
16 #define tmio_ioread32(addr) \
17 (((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
19 #define tmio_iowrite8(val, addr) writeb((val), (addr))
20 #define tmio_iowrite16(val, addr) writew((val), (addr))
21 #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
22 #define tmio_iowrite32(val, addr) \
24 writew((val), (addr)); \
25 writew((val) >> 16, (addr) + 2); \
29 #define CNF_CTL_BASE 0x10
30 #define CNF_INT_PIN 0x3d
31 #define CNF_STOP_CLK_CTL 0x40
32 #define CNF_GCLK_CTL 0x41
33 #define CNF_SD_CLK_MODE 0x42
34 #define CNF_PIN_STATUS 0x44
35 #define CNF_PWR_CTL_1 0x48
36 #define CNF_PWR_CTL_2 0x49
37 #define CNF_PWR_CTL_3 0x4a
38 #define CNF_CARD_DETECT_MODE 0x4c
39 #define CNF_SD_SLOT 0x50
40 #define CNF_EXT_GCLK_CTL_1 0xf0
41 #define CNF_EXT_GCLK_CTL_2 0xf1
42 #define CNF_EXT_GCLK_CTL_3 0xf9
43 #define CNF_SD_LED_EN_1 0xfa
44 #define CNF_SD_LED_EN_2 0xfe
46 #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
48 #define sd_config_write8(base, shift, reg, val) \
49 tmio_iowrite8((val), (base) + ((reg) << (shift)))
50 #define sd_config_write16(base, shift, reg, val) \
51 tmio_iowrite16((val), (base) + ((reg) << (shift)))
52 #define sd_config_write32(base, shift, reg, val) \
54 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
55 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
58 /* tmio MMC platform flags */
59 #define TMIO_MMC_WRPROTECT_DISABLE BIT(0)
61 * Some controllers can support a 2-byte block size when the bus width
62 * is configured in 4-bit mode.
64 #define TMIO_MMC_BLKSZ_2BYTES BIT(1)
66 * Some controllers can support SDIO IRQ signalling.
68 #define TMIO_MMC_SDIO_IRQ BIT(2)
70 /* Some features are only available or tested on R-Car Gen2 or later */
71 #define TMIO_MMC_MIN_RCAR2 BIT(3)
74 * Some controllers require waiting for the SD bus to become
75 * idle before writing to some registers.
77 #define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
79 * A GPIO is used for card hotplug detection. We need an extra flag for this,
80 * because 0 is a valid GPIO number too, and requiring users to specify
81 * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
83 #define TMIO_MMC_USE_GPIO_CD BIT(5)
86 * Some controllers doesn't have over 0x100 register.
87 * it is used to checking accessibility of
88 * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
90 #define TMIO_MMC_HAVE_HIGH_REG BIT(6)
93 * Some controllers have CMD12 automatically
94 * issue/non-issue register
96 #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
98 /* Controller has some SDIO status bits which must be 1 */
99 #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
102 * Some controllers have a 32-bit wide data port register
104 #define TMIO_MMC_32BIT_DATA_PORT BIT(9)
107 * Some controllers allows to set SDx actual clock
109 #define TMIO_MMC_CLK_ACTUAL BIT(10)
111 /* Some controllers have a CBSY bit */
112 #define TMIO_MMC_HAVE_CBSY BIT(11)
114 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
115 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
116 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
117 void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
122 * data for the MMC controller
124 struct tmio_mmc_data {
128 unsigned long capabilities;
129 unsigned long capabilities2;
131 u32 ocr_mask; /* available voltages */
132 unsigned int cd_gpio;
134 dma_addr_t dma_rx_offset;
135 unsigned int max_blk_count;
136 unsigned short max_segs;
137 void (*set_pwr)(struct platform_device *host, int state);
138 void (*set_clk_div)(struct platform_device *host, int state);
142 * data for the NAND controller
144 struct tmio_nand_data {
145 struct nand_bbt_descr *badblock_pattern;
146 struct mtd_partition *partition;
147 unsigned int num_partitions;
148 const char *const *part_parsers;
151 #define FBIO_TMIO_ACC_WRITE 0x7C639300
152 #define FBIO_TMIO_ACC_SYNC 0x7C639301
154 struct tmio_fb_data {
155 int (*lcd_set_power)(struct platform_device *fb_dev,
157 int (*lcd_mode)(struct platform_device *fb_dev,
158 const struct fb_videomode *mode);
160 struct fb_videomode *modes;
162 /* in mm: size of screen */