1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018 MediaTek Inc.
7 #ifndef __MTK_CMDQ_MAILBOX_H__
8 #define __MTK_CMDQ_MAILBOX_H__
10 #include <linux/platform_device.h>
11 #include <linux/slab.h>
12 #include <linux/types.h>
14 #define CMDQ_INST_SIZE 8 /* instruction is 64-bit */
15 #define CMDQ_SUBSYS_SHIFT 16
16 #define CMDQ_OP_CODE_SHIFT 24
17 #define CMDQ_JUMP_PASS CMDQ_INST_SIZE
19 #define CMDQ_WFE_UPDATE BIT(31)
20 #define CMDQ_WFE_WAIT BIT(15)
21 #define CMDQ_WFE_WAIT_VALUE 0x1
28 * write value into target register
29 * format: op subsys address value
34 * wait for event and clear
35 * it is just clear if no wait
36 * format: [wait] op event update:1 to_wait:1 wait:1
37 * [clear] op event update:1 to_wait:0 wait:0
43 CMDQ_CODE_MASK = 0x02,
44 CMDQ_CODE_WRITE = 0x04,
45 CMDQ_CODE_JUMP = 0x10,
56 enum cmdq_cb_status sta;
60 typedef void (*cmdq_async_flush_cb)(struct cmdq_cb_data data);
63 cmdq_async_flush_cb cb;
70 size_t cmd_buf_size; /* command occupied size */
71 size_t buf_size; /* real buffer size */
72 struct cmdq_task_cb cb;
73 struct cmdq_task_cb async_cb;
77 #endif /* __MTK_CMDQ_MAILBOX_H__ */