1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/blkdev.h>
6 #include <linux/types.h>
7 #include <uapi/linux/lightnvm.h>
20 #define NVM_GEN_CH_BITS (8)
21 #define NVM_GEN_LUN_BITS (8)
22 #define NVM_GEN_BLK_BITS (16)
23 #define NVM_GEN_RESERVED (32)
26 #define NVM_12_PG_BITS (16)
27 #define NVM_12_PL_BITS (4)
28 #define NVM_12_SEC_BITS (4)
29 #define NVM_12_RESERVED (8)
32 #define NVM_20_SEC_BITS (24)
33 #define NVM_20_RESERVED (8)
36 NVM_OCSSD_SPEC_12 = 12,
37 NVM_OCSSD_SPEC_20 = 20,
41 /* Generic structure for all addresses */
43 /* generic device format */
45 u64 ch : NVM_GEN_CH_BITS;
46 u64 lun : NVM_GEN_LUN_BITS;
47 u64 blk : NVM_GEN_BLK_BITS;
48 u64 reserved : NVM_GEN_RESERVED;
51 /* 1.2 device format */
53 u64 ch : NVM_GEN_CH_BITS;
54 u64 lun : NVM_GEN_LUN_BITS;
55 u64 blk : NVM_GEN_BLK_BITS;
56 u64 pg : NVM_12_PG_BITS;
57 u64 pl : NVM_12_PL_BITS;
58 u64 sec : NVM_12_SEC_BITS;
59 u64 reserved : NVM_12_RESERVED;
62 /* 2.0 device format */
64 u64 grp : NVM_GEN_CH_BITS;
65 u64 pu : NVM_GEN_LUN_BITS;
66 u64 chk : NVM_GEN_BLK_BITS;
67 u64 sec : NVM_20_SEC_BITS;
68 u64 reserved : NVM_20_RESERVED;
86 typedef int (nvm_id_fn)(struct nvm_dev *);
87 typedef int (nvm_op_bb_tbl_fn)(struct nvm_dev *, struct ppa_addr, u8 *);
88 typedef int (nvm_op_set_bb_fn)(struct nvm_dev *, struct ppa_addr *, int, int);
89 typedef int (nvm_get_chk_meta_fn)(struct nvm_dev *, sector_t, int,
90 struct nvm_chk_meta *);
91 typedef int (nvm_submit_io_fn)(struct nvm_dev *, struct nvm_rq *, void *);
92 typedef void *(nvm_create_dma_pool_fn)(struct nvm_dev *, char *, int);
93 typedef void (nvm_destroy_dma_pool_fn)(void *);
94 typedef void *(nvm_dev_dma_alloc_fn)(struct nvm_dev *, void *, gfp_t,
96 typedef void (nvm_dev_dma_free_fn)(void *, void*, dma_addr_t);
100 nvm_op_bb_tbl_fn *get_bb_tbl;
101 nvm_op_set_bb_fn *set_bb_tbl;
103 nvm_get_chk_meta_fn *get_chk_meta;
105 nvm_submit_io_fn *submit_io;
107 nvm_create_dma_pool_fn *create_dma_pool;
108 nvm_destroy_dma_pool_fn *destroy_dma_pool;
109 nvm_dev_dma_alloc_fn *dev_dma_alloc;
110 nvm_dev_dma_free_fn *dev_dma_free;
115 #include <linux/file.h>
116 #include <linux/dmapool.h>
119 /* HW Responsibilities */
120 NVM_RSP_L2P = 1 << 0,
121 NVM_RSP_ECC = 1 << 1,
123 /* Physical Adressing Mode */
124 NVM_ADDRMODE_LINEAR = 0,
125 NVM_ADDRMODE_CHANNEL = 1,
127 /* Plane programming mode for LUN */
128 NVM_PLANE_SINGLE = 1,
129 NVM_PLANE_DOUBLE = 2,
133 NVM_RSP_SUCCESS = 0x0,
134 NVM_RSP_NOT_CHANGEABLE = 0x1,
135 NVM_RSP_ERR_FAILWRITE = 0x40ff,
136 NVM_RSP_ERR_EMPTYPAGE = 0x42ff,
137 NVM_RSP_ERR_FAILECC = 0x4281,
138 NVM_RSP_ERR_FAILCRC = 0x4004,
139 NVM_RSP_WARN_HIGHECC = 0x4700,
142 NVM_OP_PWRITE = 0x91,
146 /* PPA Command Flags */
147 NVM_IO_SNGL_ACCESS = 0x0,
148 NVM_IO_DUAL_ACCESS = 0x1,
149 NVM_IO_QUAD_ACCESS = 0x2,
151 /* NAND Access Modes */
152 NVM_IO_SUSPEND = 0x80,
153 NVM_IO_SLC_MODE = 0x100,
154 NVM_IO_SCRAMBLE_ENABLE = 0x200,
157 NVM_BLK_T_FREE = 0x0,
159 NVM_BLK_T_GRWN_BAD = 0x2,
161 NVM_BLK_T_HOST = 0x8,
163 /* Memory capabilities */
164 NVM_ID_CAP_SLC = 0x1,
165 NVM_ID_CAP_CMD_SUSPEND = 0x2,
166 NVM_ID_CAP_SCRAMBLE = 0x4,
167 NVM_ID_CAP_ENCRYPT = 0x8,
170 NVM_ID_FMTYPE_SLC = 0,
171 NVM_ID_FMTYPE_MLC = 1,
173 /* Device capabilities */
174 NVM_ID_DCAP_BBLKMGMT = 0x1,
175 NVM_UD_DCAP_ECC = 0x2,
178 struct nvm_id_lp_mlc {
183 struct nvm_id_lp_tbl {
185 struct nvm_id_lp_mlc mlc;
188 struct nvm_addrf_12 {
233 NVM_CHK_ST_FREE = 1 << 0,
234 NVM_CHK_ST_CLOSED = 1 << 1,
235 NVM_CHK_ST_OPEN = 1 << 2,
236 NVM_CHK_ST_OFFLINE = 1 << 3,
239 NVM_CHK_TP_W_SEQ = 1 << 0,
240 NVM_CHK_TP_W_RAN = 1 << 1,
241 NVM_CHK_TP_SZ_SPEC = 1 << 4,
245 * Note: The structure size is linked to nvme_nvm_chk_meta such that the same
246 * buffer can be used when converting from little endian to cpu addressing.
248 struct nvm_chk_meta {
259 struct list_head list;
260 struct nvm_tgt_dev *dev;
261 struct nvm_tgt_type *type;
262 struct gendisk *disk;
265 #define ADDR_EMPTY (~0ULL)
267 #define NVM_TARGET_DEFAULT_OP (101)
268 #define NVM_TARGET_MIN_OP (3)
269 #define NVM_TARGET_MAX_OP (80)
271 #define NVM_VERSION_MAJOR 1
272 #define NVM_VERSION_MINOR 0
273 #define NVM_VERSION_PATCH 0
275 #define NVM_MAX_VLBA (64) /* max logical blocks in a vector command */
278 typedef void (nvm_end_io_fn)(struct nvm_rq *);
281 struct nvm_tgt_dev *dev;
286 struct ppa_addr ppa_addr;
287 dma_addr_t dma_ppa_list;
290 struct ppa_addr *ppa_list;
293 dma_addr_t dma_meta_list;
295 nvm_end_io_fn *end_io;
301 u64 ppa_status; /* ppa media status */
304 int is_seq; /* Sequential hint flag. 1.2 only */
309 static inline struct nvm_rq *nvm_rq_from_pdu(void *pdu)
311 return pdu - sizeof(struct nvm_rq);
314 static inline void *nvm_rq_to_pdu(struct nvm_rq *rqdata)
319 static inline struct ppa_addr *nvm_rq_to_ppa_list(struct nvm_rq *rqd)
321 return (rqd->nr_ppas > 1) ? rqd->ppa_list : &rqd->ppa_addr;
325 NVM_BLK_ST_FREE = 0x1, /* Free block */
326 NVM_BLK_ST_TGT = 0x2, /* Block in use by target */
327 NVM_BLK_ST_BAD = 0x8, /* Bad block */
330 /* Instance geometry */
332 /* device reported version */
336 /* kernel short version */
339 /* instance specific geometry */
341 int num_lun; /* per channel */
343 /* calculated values */
344 int all_luns; /* across channels */
345 int all_chunks; /* across channels */
347 int op; /* over-provision in instance */
349 sector_t total_secs; /* across channels */
352 u32 num_chk; /* chunks per lun */
353 u32 clba; /* sectors per chunk */
354 u16 csecs; /* sector size */
355 u16 sos; /* out-of-band area size */
356 bool ext; /* metadata in extended data buffer */
357 u32 mdts; /* Max data transfer size*/
359 /* device write constrains */
360 u32 ws_min; /* minimum write size */
361 u32 ws_opt; /* optimal write size */
362 u32 mw_cunits; /* distance required for successful read */
363 u32 maxoc; /* maximum open chunks */
364 u32 maxocpu; /* maximum open chunks per parallel unit */
366 /* device capabilities */
370 u32 trdt; /* Avg. Tread (ns) */
371 u32 trdm; /* Max Tread (ns) */
372 u32 tprt; /* Avg. Tprog (ns) */
373 u32 tprm; /* Max Tprog (ns) */
374 u32 tbet; /* Avg. Terase (ns) */
375 u32 tbem; /* Max Terase (ns) */
377 /* generic address format */
378 struct nvm_addrf addrf;
380 /* 1.2 compatibility */
397 /* sub-device structure */
399 /* Device information */
402 /* Base ppas for target LUNs */
403 struct ppa_addr *luns;
405 struct request_queue *q;
407 struct nvm_dev *parent;
412 struct nvm_dev_ops *ops;
414 struct list_head devices;
416 /* Device information */
419 unsigned long *lun_map;
423 struct request_queue *q;
424 char name[DISK_NAME_LEN];
433 /* target management */
434 struct list_head area_list;
435 struct list_head targets;
438 static inline struct ppa_addr generic_to_dev_addr(struct nvm_dev *dev,
441 struct nvm_geo *geo = &dev->geo;
444 if (geo->version == NVM_OCSSD_SPEC_12) {
445 struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
447 l.ppa = ((u64)r.g.ch) << ppaf->ch_offset;
448 l.ppa |= ((u64)r.g.lun) << ppaf->lun_offset;
449 l.ppa |= ((u64)r.g.blk) << ppaf->blk_offset;
450 l.ppa |= ((u64)r.g.pg) << ppaf->pg_offset;
451 l.ppa |= ((u64)r.g.pl) << ppaf->pln_offset;
452 l.ppa |= ((u64)r.g.sec) << ppaf->sec_offset;
454 struct nvm_addrf *lbaf = &geo->addrf;
456 l.ppa = ((u64)r.m.grp) << lbaf->ch_offset;
457 l.ppa |= ((u64)r.m.pu) << lbaf->lun_offset;
458 l.ppa |= ((u64)r.m.chk) << lbaf->chk_offset;
459 l.ppa |= ((u64)r.m.sec) << lbaf->sec_offset;
465 static inline struct ppa_addr dev_to_generic_addr(struct nvm_dev *dev,
468 struct nvm_geo *geo = &dev->geo;
473 if (geo->version == NVM_OCSSD_SPEC_12) {
474 struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
476 l.g.ch = (r.ppa & ppaf->ch_mask) >> ppaf->ch_offset;
477 l.g.lun = (r.ppa & ppaf->lun_mask) >> ppaf->lun_offset;
478 l.g.blk = (r.ppa & ppaf->blk_mask) >> ppaf->blk_offset;
479 l.g.pg = (r.ppa & ppaf->pg_mask) >> ppaf->pg_offset;
480 l.g.pl = (r.ppa & ppaf->pln_mask) >> ppaf->pln_offset;
481 l.g.sec = (r.ppa & ppaf->sec_mask) >> ppaf->sec_offset;
483 struct nvm_addrf *lbaf = &geo->addrf;
485 l.m.grp = (r.ppa & lbaf->ch_mask) >> lbaf->ch_offset;
486 l.m.pu = (r.ppa & lbaf->lun_mask) >> lbaf->lun_offset;
487 l.m.chk = (r.ppa & lbaf->chk_mask) >> lbaf->chk_offset;
488 l.m.sec = (r.ppa & lbaf->sec_mask) >> lbaf->sec_offset;
494 static inline u64 dev_to_chunk_addr(struct nvm_dev *dev, void *addrf,
497 struct nvm_geo *geo = &dev->geo;
500 if (geo->version == NVM_OCSSD_SPEC_12) {
501 struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)addrf;
503 caddr = (u64)p.g.pg << ppaf->pg_offset;
504 caddr |= (u64)p.g.pl << ppaf->pln_offset;
505 caddr |= (u64)p.g.sec << ppaf->sec_offset;
513 static inline struct ppa_addr nvm_ppa32_to_ppa64(struct nvm_dev *dev,
514 void *addrf, u32 ppa32)
516 struct ppa_addr ppa64;
521 ppa64.ppa = ADDR_EMPTY;
522 } else if (ppa32 & (1U << 31)) {
523 ppa64.c.line = ppa32 & ((~0U) >> 1);
524 ppa64.c.is_cached = 1;
526 struct nvm_geo *geo = &dev->geo;
528 if (geo->version == NVM_OCSSD_SPEC_12) {
529 struct nvm_addrf_12 *ppaf = addrf;
531 ppa64.g.ch = (ppa32 & ppaf->ch_mask) >>
533 ppa64.g.lun = (ppa32 & ppaf->lun_mask) >>
535 ppa64.g.blk = (ppa32 & ppaf->blk_mask) >>
537 ppa64.g.pg = (ppa32 & ppaf->pg_mask) >>
539 ppa64.g.pl = (ppa32 & ppaf->pln_mask) >>
541 ppa64.g.sec = (ppa32 & ppaf->sec_mask) >>
544 struct nvm_addrf *lbaf = addrf;
546 ppa64.m.grp = (ppa32 & lbaf->ch_mask) >>
548 ppa64.m.pu = (ppa32 & lbaf->lun_mask) >>
550 ppa64.m.chk = (ppa32 & lbaf->chk_mask) >>
552 ppa64.m.sec = (ppa32 & lbaf->sec_mask) >>
560 static inline u32 nvm_ppa64_to_ppa32(struct nvm_dev *dev,
561 void *addrf, struct ppa_addr ppa64)
565 if (ppa64.ppa == ADDR_EMPTY) {
567 } else if (ppa64.c.is_cached) {
568 ppa32 |= ppa64.c.line;
571 struct nvm_geo *geo = &dev->geo;
573 if (geo->version == NVM_OCSSD_SPEC_12) {
574 struct nvm_addrf_12 *ppaf = addrf;
576 ppa32 |= ppa64.g.ch << ppaf->ch_offset;
577 ppa32 |= ppa64.g.lun << ppaf->lun_offset;
578 ppa32 |= ppa64.g.blk << ppaf->blk_offset;
579 ppa32 |= ppa64.g.pg << ppaf->pg_offset;
580 ppa32 |= ppa64.g.pl << ppaf->pln_offset;
581 ppa32 |= ppa64.g.sec << ppaf->sec_offset;
583 struct nvm_addrf *lbaf = addrf;
585 ppa32 |= ppa64.m.grp << lbaf->ch_offset;
586 ppa32 |= ppa64.m.pu << lbaf->lun_offset;
587 ppa32 |= ppa64.m.chk << lbaf->chk_offset;
588 ppa32 |= ppa64.m.sec << lbaf->sec_offset;
595 static inline int nvm_next_ppa_in_chk(struct nvm_tgt_dev *dev,
596 struct ppa_addr *ppa)
598 struct nvm_geo *geo = &dev->geo;
601 if (geo->version == NVM_OCSSD_SPEC_12) {
602 int sec = ppa->g.sec;
605 if (sec == geo->ws_min) {
610 if (pg == geo->num_pg) {
615 if (pl == geo->num_pln)
625 if (ppa->m.sec == geo->clba)
632 typedef sector_t (nvm_tgt_capacity_fn)(void *);
633 typedef void *(nvm_tgt_init_fn)(struct nvm_tgt_dev *, struct gendisk *,
635 typedef void (nvm_tgt_exit_fn)(void *, bool);
636 typedef int (nvm_tgt_sysfs_init_fn)(struct gendisk *);
637 typedef void (nvm_tgt_sysfs_exit_fn)(struct gendisk *);
640 NVM_TGT_F_DEV_L2P = 0,
641 NVM_TGT_F_HOST_L2P = 1 << 0,
644 struct nvm_tgt_type {
646 unsigned int version[3];
649 /* target entry points */
650 const struct block_device_operations *bops;
651 nvm_tgt_capacity_fn *capacity;
653 /* module-specific init/teardown */
654 nvm_tgt_init_fn *init;
655 nvm_tgt_exit_fn *exit;
658 nvm_tgt_sysfs_init_fn *sysfs_init;
659 nvm_tgt_sysfs_exit_fn *sysfs_exit;
661 /* For internal use */
662 struct list_head list;
663 struct module *owner;
666 extern int nvm_register_tgt_type(struct nvm_tgt_type *);
667 extern void nvm_unregister_tgt_type(struct nvm_tgt_type *);
669 extern void *nvm_dev_dma_alloc(struct nvm_dev *, gfp_t, dma_addr_t *);
670 extern void nvm_dev_dma_free(struct nvm_dev *, void *, dma_addr_t);
672 extern struct nvm_dev *nvm_alloc_dev(int);
673 extern int nvm_register(struct nvm_dev *);
674 extern void nvm_unregister(struct nvm_dev *);
676 extern int nvm_get_chunk_meta(struct nvm_tgt_dev *, struct ppa_addr,
677 int, struct nvm_chk_meta *);
678 extern int nvm_set_chunk_meta(struct nvm_tgt_dev *, struct ppa_addr *,
680 extern int nvm_submit_io(struct nvm_tgt_dev *, struct nvm_rq *, void *);
681 extern int nvm_submit_io_sync(struct nvm_tgt_dev *, struct nvm_rq *, void *);
682 extern void nvm_end_io(struct nvm_rq *);
684 #else /* CONFIG_NVM */
687 static inline struct nvm_dev *nvm_alloc_dev(int node)
689 return ERR_PTR(-EINVAL);
691 static inline int nvm_register(struct nvm_dev *dev)
695 static inline void nvm_unregister(struct nvm_dev *dev) {}
696 #endif /* CONFIG_NVM */
697 #endif /* LIGHTNVM.H */