1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Analog Devices Generic AXI ADC IP core driver/library
4 * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
6 * Copyright 2012-2020 Analog Devices Inc.
8 #ifndef __ADI_AXI_ADC_H__
9 #define __ADI_AXI_ADC_H__
15 * struct adi_axi_adc_chip_info - Chip specific information
17 * @id Chip ID (usually product ID)
18 * @channels Channel specifications of type @struct iio_chan_spec
19 * @num_channels Number of @channels
20 * @scale_table Supported scales by the chip; tuples of 2 ints
21 * @num_scales Number of scales in the table
22 * @max_rate Maximum sampling rate supported by the device
24 struct adi_axi_adc_chip_info {
28 const struct iio_chan_spec *channels;
29 unsigned int num_channels;
31 const unsigned int (*scale_table)[2];
34 unsigned long max_rate;
38 * struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC
39 * @chip_info chip info details for the client ADC
40 * @preenable_setup op to run in the client before enabling the AXI ADC
41 * @reg_access IIO debugfs_reg_access hook for the client ADC
42 * @read_raw IIO read_raw hook for the client ADC
43 * @write_raw IIO write_raw hook for the client ADC
45 struct adi_axi_adc_conv {
46 const struct adi_axi_adc_chip_info *chip_info;
48 int (*preenable_setup)(struct adi_axi_adc_conv *conv);
49 int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg,
50 unsigned int writeval, unsigned int *readval);
51 int (*read_raw)(struct adi_axi_adc_conv *conv,
52 struct iio_chan_spec const *chan,
53 int *val, int *val2, long mask);
54 int (*write_raw)(struct adi_axi_adc_conv *conv,
55 struct iio_chan_spec const *chan,
56 int val, int val2, long mask);
59 struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
62 void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv);