1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 #ifndef __LINUX_CLK_TEGRA_H_
7 #define __LINUX_CLK_TEGRA_H_
9 #include <linux/types.h>
10 #include <linux/bug.h>
13 * Tegra CPU clock and reset control ops
16 * keep waiting until the CPU in reset state
18 * put the CPU in reset state
20 * release the CPU from reset state
26 * CPU is ready for rail off
28 * save the clock settings when CPU go into low-power state
30 * restore the clock settings when CPU exit low-power state
32 struct tegra_cpu_car_ops {
33 void (*wait_for_reset)(u32 cpu);
34 void (*put_in_reset)(u32 cpu);
35 void (*out_of_reset)(u32 cpu);
36 void (*enable_clock)(u32 cpu);
37 void (*disable_clock)(u32 cpu);
38 #ifdef CONFIG_PM_SLEEP
39 bool (*rail_off_ready)(void);
40 void (*suspend)(void);
45 extern struct tegra_cpu_car_ops *tegra_cpu_car_ops;
47 static inline void tegra_wait_cpu_in_reset(u32 cpu)
49 if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset))
52 tegra_cpu_car_ops->wait_for_reset(cpu);
55 static inline void tegra_put_cpu_in_reset(u32 cpu)
57 if (WARN_ON(!tegra_cpu_car_ops->put_in_reset))
60 tegra_cpu_car_ops->put_in_reset(cpu);
63 static inline void tegra_cpu_out_of_reset(u32 cpu)
65 if (WARN_ON(!tegra_cpu_car_ops->out_of_reset))
68 tegra_cpu_car_ops->out_of_reset(cpu);
71 static inline void tegra_enable_cpu_clock(u32 cpu)
73 if (WARN_ON(!tegra_cpu_car_ops->enable_clock))
76 tegra_cpu_car_ops->enable_clock(cpu);
79 static inline void tegra_disable_cpu_clock(u32 cpu)
81 if (WARN_ON(!tegra_cpu_car_ops->disable_clock))
84 tegra_cpu_car_ops->disable_clock(cpu);
87 #ifdef CONFIG_PM_SLEEP
88 static inline bool tegra_cpu_rail_off_ready(void)
90 if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready))
93 return tegra_cpu_car_ops->rail_off_ready();
96 static inline void tegra_cpu_clock_suspend(void)
98 if (WARN_ON(!tegra_cpu_car_ops->suspend))
101 tegra_cpu_car_ops->suspend();
104 static inline void tegra_cpu_clock_resume(void)
106 if (WARN_ON(!tegra_cpu_car_ops->resume))
109 tegra_cpu_car_ops->resume();
113 extern void tegra210_xusb_pll_hw_control_enable(void);
114 extern void tegra210_xusb_pll_hw_sequence_start(void);
115 extern void tegra210_sata_pll_hw_control_enable(void);
116 extern void tegra210_sata_pll_hw_sequence_start(void);
117 extern void tegra210_set_sata_pll_seq_sw(bool state);
118 extern void tegra210_put_utmipll_in_iddq(void);
119 extern void tegra210_put_utmipll_out_iddq(void);
120 extern int tegra210_clk_handle_mbist_war(unsigned int id);
122 #endif /* __LINUX_CLK_TEGRA_H_ */