include/linux/arm-smccc.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2015, Linaro Limited
   4  */
   5 #ifndef __LINUX_ARM_SMCCC_H
   6 #define __LINUX_ARM_SMCCC_H
   7
   8 #include <uapi/linux/const.h>
   9
  10 /*
  11  * This file provides common defines for ARM SMC Calling Convention as
  12  * specified in
  13  * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
  14  */
  15
  16 #define ARM_SMCCC_STD_CALL              _AC(0,U)
  17 #define ARM_SMCCC_FAST_CALL             _AC(1,U)
  18 #define ARM_SMCCC_TYPE_SHIFT            31
  19
  20 #define ARM_SMCCC_SMC_32                0
  21 #define ARM_SMCCC_SMC_64                1
  22 #define ARM_SMCCC_CALL_CONV_SHIFT       30
  23
  24 #define ARM_SMCCC_OWNER_MASK            0x3F
  25 #define ARM_SMCCC_OWNER_SHIFT           24
  26
  27 #define ARM_SMCCC_FUNC_MASK             0xFFFF
  28
  29 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
  30         ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
  31 #define ARM_SMCCC_IS_64(smc_val) \
  32         ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
  33 #define ARM_SMCCC_FUNC_NUM(smc_val)     ((smc_val) & ARM_SMCCC_FUNC_MASK)
  34 #define ARM_SMCCC_OWNER_NUM(smc_val) \
  35         (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
  36
  37 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
  38         (((type) << ARM_SMCCC_TYPE_SHIFT) | \
  39         ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
  40         (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
  41         ((func_num) & ARM_SMCCC_FUNC_MASK))
  42
  43 #define ARM_SMCCC_OWNER_ARCH            0
  44 #define ARM_SMCCC_OWNER_CPU             1
  45 #define ARM_SMCCC_OWNER_SIP             2
  46 #define ARM_SMCCC_OWNER_OEM             3
  47 #define ARM_SMCCC_OWNER_STANDARD        4
  48 #define ARM_SMCCC_OWNER_TRUSTED_APP     48
  49 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
  50 #define ARM_SMCCC_OWNER_TRUSTED_OS      50
  51 #define ARM_SMCCC_OWNER_TRUSTED_OS_END  63
  52
  53 #define ARM_SMCCC_QUIRK_NONE            0
  54 #define ARM_SMCCC_QUIRK_QCOM_A6         1 /* Save/restore register a6 */
  55
  56 #define ARM_SMCCC_VERSION_1_0           0x10000
  57 #define ARM_SMCCC_VERSION_1_1           0x10001
  58
  59 #define ARM_SMCCC_VERSION_FUNC_ID                                       \
  60         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  61                            ARM_SMCCC_SMC_32,                            \
  62                            0, 0)
  63
  64 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID                                 \
  65         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  66                            ARM_SMCCC_SMC_32,                            \
  67                            0, 1)
  68
  69 #define ARM_SMCCC_ARCH_WORKAROUND_1                                     \
  70         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  71                            ARM_SMCCC_SMC_32,                            \
  72                            0, 0x8000)
  73
  74 #define ARM_SMCCC_ARCH_WORKAROUND_2                                     \
  75         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  76                            ARM_SMCCC_SMC_32,                            \
  77                            0, 0x7fff)
  78
  79 #define ARM_SMCCC_ARCH_WORKAROUND_3                                     \
  80         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  81                            ARM_SMCCC_SMC_32,                            \
  82                            0, 0x3fff)
  83
  84 #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED    1
  85
  86 #ifndef __ASSEMBLY__
  87
  88 #include <linux/linkage.h>
  89 #include <linux/types.h>
  90
  91 enum arm_smccc_conduit {
  92         SMCCC_CONDUIT_NONE,
  93         SMCCC_CONDUIT_SMC,
  94         SMCCC_CONDUIT_HVC,
  95 };
  96
  97 /**
  98  * arm_smccc_1_1_get_conduit()
  99  *
 100  * Returns the conduit to be used for SMCCCv1.1 or later.
 101  *
 102  * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
 103  */
 104 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
 105
 106 /**
 107  * struct arm_smccc_res - Result from SMC/HVC call
 108  * @a0-a3 result values from registers 0 to 3
 109  */
 110 struct arm_smccc_res {
 111         unsigned long a0;
 112         unsigned long a1;
 113         unsigned long a2;
 114         unsigned long a3;
 115 };
 116
 117 /**
 118  * struct arm_smccc_quirk - Contains quirk information
 119  * @id: quirk identification
 120  * @state: quirk specific information
 121  * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
 122  */
 123 struct arm_smccc_quirk {
 124         int     id;
 125         union {
 126                 unsigned long a6;
 127         } state;
 128 };
 129
 130 /**
 131  * __arm_smccc_smc() - make SMC calls
 132  * @a0-a7: arguments passed in registers 0 to 7
 133  * @res: result values from registers 0 to 3
 134  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 135  *
 136  * This function is used to make SMC calls following SMC Calling Convention.
 137  * The content of the supplied param are copied to registers 0 to 7 prior
 138  * to the SMC instruction. The return values are updated with the content
 139  * from register 0 to 3 on return from the SMC instruction.  An optional
 140  * quirk structure provides vendor specific behavior.
 141  */
 142 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
 143                         unsigned long a2, unsigned long a3, unsigned long a4,
 144                         unsigned long a5, unsigned long a6, unsigned long a7,
 145                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 146
 147 /**
 148  * __arm_smccc_hvc() - make HVC calls
 149  * @a0-a7: arguments passed in registers 0 to 7
 150  * @res: result values from registers 0 to 3
 151  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 152  *
 153  * This function is used to make HVC calls following SMC Calling
 154  * Convention.  The content of the supplied param are copied to registers 0
 155  * to 7 prior to the HVC instruction. The return values are updated with
 156  * the content from register 0 to 3 on return from the HVC instruction.  An
 157  * optional quirk structure provides vendor specific behavior.
 158  */
 159 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
 160                         unsigned long a2, unsigned long a3, unsigned long a4,
 161                         unsigned long a5, unsigned long a6, unsigned long a7,
 162                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 163
 164 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
 165
 166 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
 167
 168 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
 169
 170 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
 171
 172 /* SMCCC v1.1 implementation madness follows */
 173 #ifdef CONFIG_ARM64
 174
 175 #define SMCCC_SMC_INST  "smc    #0"
 176 #define SMCCC_HVC_INST  "hvc    #0"
 177
 178 #elif defined(CONFIG_ARM)
 179 #include <asm/opcodes-sec.h>
 180 #include <asm/opcodes-virt.h>
 181
 182 #define SMCCC_SMC_INST  __SMC(0)
 183 #define SMCCC_HVC_INST  __HVC(0)
 184
 185 #endif
 186
 187 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
 188
 189 #define __count_args(...)                                               \
 190         ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
 191
 192 #define __constraint_write_0                                            \
 193         "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
 194 #define __constraint_write_1                                            \
 195         "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
 196 #define __constraint_write_2                                            \
 197         "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
 198 #define __constraint_write_3                                            \
 199         "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
 200 #define __constraint_write_4    __constraint_write_3
 201 #define __constraint_write_5    __constraint_write_4
 202 #define __constraint_write_6    __constraint_write_5
 203 #define __constraint_write_7    __constraint_write_6
 204
 205 #define __constraint_read_0
 206 #define __constraint_read_1
 207 #define __constraint_read_2
 208 #define __constraint_read_3
 209 #define __constraint_read_4     "r" (r4)
 210 #define __constraint_read_5     __constraint_read_4, "r" (r5)
 211 #define __constraint_read_6     __constraint_read_5, "r" (r6)
 212 #define __constraint_read_7     __constraint_read_6, "r" (r7)
 213
 214 #define __declare_arg_0(a0, res)                                        \
 215         struct arm_smccc_res   *___res = res;                           \
 216         register unsigned long r0 asm("r0") = (u32)a0;                  \
 217         register unsigned long r1 asm("r1");                            \
 218         register unsigned long r2 asm("r2");                            \
 219         register unsigned long r3 asm("r3")
 220
 221 #define __declare_arg_1(a0, a1, res)                                    \
 222         typeof(a1) __a1 = a1;                                           \
 223         struct arm_smccc_res   *___res = res;                           \
 224         register unsigned long r0 asm("r0") = (u32)a0;                  \
 225         register unsigned long r1 asm("r1") = __a1;                     \
 226         register unsigned long r2 asm("r2");                            \
 227         register unsigned long r3 asm("r3")
 228
 229 #define __declare_arg_2(a0, a1, a2, res)                                \
 230         typeof(a1) __a1 = a1;                                           \
 231         typeof(a2) __a2 = a2;                                           \
 232         struct arm_smccc_res   *___res = res;                           \
 233         register unsigned long r0 asm("r0") = (u32)a0;                  \
 234         register unsigned long r1 asm("r1") = __a1;                     \
 235         register unsigned long r2 asm("r2") = __a2;                     \
 236         register unsigned long r3 asm("r3")
 237
 238 #define __declare_arg_3(a0, a1, a2, a3, res)                            \
 239         typeof(a1) __a1 = a1;                                           \
 240         typeof(a2) __a2 = a2;                                           \
 241         typeof(a3) __a3 = a3;                                           \
 242         struct arm_smccc_res   *___res = res;                           \
 243         register unsigned long r0 asm("r0") = (u32)a0;                  \
 244         register unsigned long r1 asm("r1") = __a1;                     \
 245         register unsigned long r2 asm("r2") = __a2;                     \
 246         register unsigned long r3 asm("r3") = __a3
 247
 248 #define __declare_arg_4(a0, a1, a2, a3, a4, res)                        \
 249         typeof(a4) __a4 = a4;                                           \
 250         __declare_arg_3(a0, a1, a2, a3, res);                           \
 251         register unsigned long r4 asm("r4") = __a4
 252
 253 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)                    \
 254         typeof(a5) __a5 = a5;                                           \
 255         __declare_arg_4(a0, a1, a2, a3, a4, res);                       \
 256         register unsigned long r5 asm("r5") = __a5
 257
 258 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)                \
 259         typeof(a6) __a6 = a6;                                           \
 260         __declare_arg_5(a0, a1, a2, a3, a4, a5, res);                   \
 261         register unsigned long r6 asm("r6") = __a6
 262
 263 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)            \
 264         typeof(a7) __a7 = a7;                                           \
 265         __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);               \
 266         register unsigned long r7 asm("r7") = __a7
 267
 268 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
 269 #define __declare_args(count, ...)  ___declare_args(count, __VA_ARGS__)
 270
 271 #define ___constraints(count)                                           \
 272         : __constraint_write_ ## count                                  \
 273         : __constraint_read_ ## count                                   \
 274         : "memory"
 275 #define __constraints(count)    ___constraints(count)
 276
 277 /*
 278  * We have an output list that is not necessarily used, and GCC feels
 279  * entitled to optimise the whole sequence away. "volatile" is what
 280  * makes it stick.
 281  */
 282 #define __arm_smccc_1_1(inst, ...)                                      \
 283         do {                                                            \
 284                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 285                 asm volatile(inst "\n"                                  \
 286                              __constraints(__count_args(__VA_ARGS__))); \
 287                 if (___res)                                             \
 288                         *___res = (typeof(*___res)){r0, r1, r2, r3};    \
 289         } while (0)
 290
 291 /*
 292  * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
 293  *
 294  * This is a variadic macro taking one to eight source arguments, and
 295  * an optional return structure.
 296  *
 297  * @a0-a7: arguments passed in registers 0 to 7
 298  * @res: result values from registers 0 to 3
 299  *
 300  * This macro is used to make SMC calls following SMC Calling Convention v1.1.
 301  * The content of the supplied param are copied to registers 0 to 7 prior
 302  * to the SMC instruction. The return values are updated with the content
 303  * from register 0 to 3 on return from the SMC instruction if not NULL.
 304  */
 305 #define arm_smccc_1_1_smc(...)  __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
 306
 307 /*
 308  * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
 309  *
 310  * This is a variadic macro taking one to eight source arguments, and
 311  * an optional return structure.
 312  *
 313  * @a0-a7: arguments passed in registers 0 to 7
 314  * @res: result values from registers 0 to 3
 315  *
 316  * This macro is used to make HVC calls following SMC Calling Convention v1.1.
 317  * The content of the supplied param are copied to registers 0 to 7 prior
 318  * to the HVC instruction. The return values are updated with the content
 319  * from register 0 to 3 on return from the HVC instruction if not NULL.
 320  */
 321 #define arm_smccc_1_1_hvc(...)  __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
 322
 323 /* Return codes defined in ARM DEN 0070A */
 324 #define SMCCC_RET_SUCCESS                       0
 325 #define SMCCC_RET_NOT_SUPPORTED                 -1
 326 #define SMCCC_RET_NOT_REQUIRED                  -2
 327
 328 /*
 329  * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
 330  * Used when the SMCCC conduit is not defined. The empty asm statement
 331  * avoids compiler warnings about unused variables.
 332  */
 333 #define __fail_smccc_1_1(...)                                           \
 334         do {                                                            \
 335                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 336                 asm ("" __constraints(__count_args(__VA_ARGS__)));      \
 337                 if (___res)                                             \
 338                         ___res->a0 = SMCCC_RET_NOT_SUPPORTED;           \
 339         } while (0)
 340
 341 /*
 342  * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
 343  *
 344  * This is a variadic macro taking one to eight source arguments, and
 345  * an optional return structure.
 346  *
 347  * @a0-a7: arguments passed in registers 0 to 7
 348  * @res: result values from registers 0 to 3
 349  *
 350  * This macro will make either an HVC call or an SMC call depending on the
 351  * current SMCCC conduit. If no valid conduit is available then -1
 352  * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
 353  *
 354  * The return value also provides the conduit that was used.
 355  */
 356 #define arm_smccc_1_1_invoke(...) ({                                    \
 357                 int method = arm_smccc_1_1_get_conduit();               \
 358                 switch (method) {                                       \
 359                 case SMCCC_CONDUIT_HVC:                                 \
 360                         arm_smccc_1_1_hvc(__VA_ARGS__);                 \
 361                         break;                                          \
 362                 case SMCCC_CONDUIT_SMC:                                 \
 363                         arm_smccc_1_1_smc(__VA_ARGS__);                 \
 364                         break;                                          \
 365                 default:                                                \
 366                         __fail_smccc_1_1(__VA_ARGS__);                  \
 367                         method = SMCCC_CONDUIT_NONE;                    \
 368                         break;                                          \
 369                 }                                                       \
 370                 method;                                                 \
 371         })
 372
 373 /* Paravirtualised time calls (defined by ARM DEN0057A) */
 374 #define ARM_SMCCC_HV_PV_TIME_FEATURES                           \
 375         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
 376                            ARM_SMCCC_SMC_64,                    \
 377                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
 378                            0x20)
 379
 380 #define ARM_SMCCC_HV_PV_TIME_ST                                 \
 381         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
 382                            ARM_SMCCC_SMC_64,                    \
 383                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
 384                            0x21)
 385
 386 #endif /*__ASSEMBLY__*/
 387 #endif /*__LINUX_ARM_SMCCC_H*/