include/dt-bindings/interconnect/qcom,sm8350.h

   1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
   2 /*
   3  * Qualcomm SM8350 interconnect IDs
   4  *
   5  * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
   6  * Copyright (c) 2021, Linaro Limited
   7  */
   8
   9 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H
  10 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H
  11
  12 #define MASTER_QSPI_0                   0
  13 #define MASTER_QUP_1                    1
  14 #define MASTER_A1NOC_CFG                2
  15 #define MASTER_SDCC_4                   3
  16 #define MASTER_UFS_MEM                  4
  17 #define MASTER_USB3_0                   5
  18 #define MASTER_USB3_1                   6
  19 #define SLAVE_A1NOC_SNOC                7
  20 #define SLAVE_SERVICE_A1NOC             8
  21
  22 #define MASTER_QDSS_BAM                 0
  23 #define MASTER_QUP_0                    1
  24 #define MASTER_QUP_2                    2
  25 #define MASTER_A2NOC_CFG                3
  26 #define MASTER_CRYPTO                   4
  27 #define MASTER_IPA                      5
  28 #define MASTER_PCIE_0                   6
  29 #define MASTER_PCIE_1                   7
  30 #define MASTER_QDSS_ETR                 8
  31 #define MASTER_SDCC_2                   9
  32 #define MASTER_UFS_CARD                 10
  33 #define SLAVE_A2NOC_SNOC                11
  34 #define SLAVE_ANOC_PCIE_GEM_NOC         12
  35 #define SLAVE_SERVICE_A2NOC             13
  36
  37 #define MASTER_GEM_NOC_CNOC             0
  38 #define MASTER_GEM_NOC_PCIE_SNOC        1
  39 #define MASTER_QDSS_DAP                 2
  40 #define SLAVE_AHB2PHY_SOUTH             3
  41 #define SLAVE_AHB2PHY_NORTH             4
  42 #define SLAVE_AOSS                      5
  43 #define SLAVE_APPSS                     6
  44 #define SLAVE_CAMERA_CFG                7
  45 #define SLAVE_CLK_CTL                   8
  46 #define SLAVE_CDSP_CFG                  9
  47 #define SLAVE_RBCPR_CX_CFG              10
  48 #define SLAVE_RBCPR_MMCX_CFG            11
  49 #define SLAVE_RBCPR_MX_CFG              12
  50 #define SLAVE_CRYPTO_0_CFG              13
  51 #define SLAVE_CX_RDPM                   14
  52 #define SLAVE_DCC_CFG                   15
  53 #define SLAVE_DISPLAY_CFG               16
  54 #define SLAVE_GFX3D_CFG                 17
  55 #define SLAVE_HWKM                      18
  56 #define SLAVE_IMEM_CFG                  19
  57 #define SLAVE_IPA_CFG                   20
  58 #define SLAVE_IPC_ROUTER_CFG            21
  59 #define SLAVE_LPASS                     22
  60 #define SLAVE_CNOC_MSS                  23
  61 #define SLAVE_MX_RDPM                   24
  62 #define SLAVE_PCIE_0_CFG                25
  63 #define SLAVE_PCIE_1_CFG                26
  64 #define SLAVE_PDM                       27
  65 #define SLAVE_PIMEM_CFG                 28
  66 #define SLAVE_PKA_WRAPPER_CFG           29
  67 #define SLAVE_PMU_WRAPPER_CFG           30
  68 #define SLAVE_QDSS_CFG                  31
  69 #define SLAVE_QSPI_0                    32
  70 #define SLAVE_QUP_0                     33
  71 #define SLAVE_QUP_1                     34
  72 #define SLAVE_QUP_2                     35
  73 #define SLAVE_SDCC_2                    36
  74 #define SLAVE_SDCC_4                    37
  75 #define SLAVE_SECURITY                  38
  76 #define SLAVE_SPSS_CFG                  39
  77 #define SLAVE_TCSR                      40
  78 #define SLAVE_TLMM                      41
  79 #define SLAVE_UFS_CARD_CFG              42
  80 #define SLAVE_UFS_MEM_CFG               43
  81 #define SLAVE_USB3_0                    44
  82 #define SLAVE_USB3_1                    45
  83 #define SLAVE_VENUS_CFG                 46
  84 #define SLAVE_VSENSE_CTRL_CFG           47
  85 #define SLAVE_A1NOC_CFG                 48
  86 #define SLAVE_A2NOC_CFG                 49
  87 #define SLAVE_DDRSS_CFG                 50
  88 #define SLAVE_CNOC_MNOC_CFG             51
  89 #define SLAVE_SNOC_CFG                  52
  90 #define SLAVE_BOOT_IMEM                 53
  91 #define SLAVE_IMEM                      54
  92 #define SLAVE_PIMEM                     55
  93 #define SLAVE_SERVICE_CNOC              56
  94 #define SLAVE_PCIE_0                    57
  95 #define SLAVE_PCIE_1                    58
  96 #define SLAVE_QDSS_STM                  59
  97 #define SLAVE_TCU                       60
  98
  99 #define MASTER_CNOC_DC_NOC              0
 100 #define SLAVE_LLCC_CFG                  1
 101 #define SLAVE_GEM_NOC_CFG               2
 102
 103 #define MASTER_GPU_TCU                  0
 104 #define MASTER_SYS_TCU                  1
 105 #define MASTER_APPSS_PROC               2
 106 #define MASTER_COMPUTE_NOC              3
 107 #define MASTER_GEM_NOC_CFG              4
 108 #define MASTER_GFX3D                    5
 109 #define MASTER_MNOC_HF_MEM_NOC          6
 110 #define MASTER_MNOC_SF_MEM_NOC          7
 111 #define MASTER_ANOC_PCIE_GEM_NOC        8
 112 #define MASTER_SNOC_GC_MEM_NOC          9
 113 #define MASTER_SNOC_SF_MEM_NOC          10
 114 #define SLAVE_MSS_PROC_MS_MPU_CFG       11
 115 #define SLAVE_MCDMA_MS_MPU_CFG          12
 116 #define SLAVE_GEM_NOC_CNOC              13
 117 #define SLAVE_LLCC                      14
 118 #define SLAVE_MEM_NOC_PCIE_SNOC         15
 119 #define SLAVE_SERVICE_GEM_NOC_1         16
 120 #define SLAVE_SERVICE_GEM_NOC_2         17
 121 #define SLAVE_SERVICE_GEM_NOC           18
 122 #define MASTER_MNOC_HF_MEM_NOC_DISP     19
 123 #define MASTER_MNOC_SF_MEM_NOC_DISP     20
 124 #define SLAVE_LLCC_DISP                 21
 125
 126 #define MASTER_CNOC_LPASS_AG_NOC        0
 127 #define SLAVE_LPASS_CORE_CFG            1
 128 #define SLAVE_LPASS_LPI_CFG             2
 129 #define SLAVE_LPASS_MPU_CFG             3
 130 #define SLAVE_LPASS_TOP_CFG             4
 131 #define SLAVE_SERVICES_LPASS_AML_NOC    5
 132 #define SLAVE_SERVICE_LPASS_AG_NOC      6
 133
 134 #define MASTER_LLCC                     0
 135 #define SLAVE_EBI1                      1
 136 #define MASTER_LLCC_DISP                2
 137 #define SLAVE_EBI1_DISP                 3
 138
 139 #define MASTER_CAMNOC_HF                0
 140 #define MASTER_CAMNOC_ICP               1
 141 #define MASTER_CAMNOC_SF                2
 142 #define MASTER_CNOC_MNOC_CFG            3
 143 #define MASTER_VIDEO_P0                 4
 144 #define MASTER_VIDEO_P1                 5
 145 #define MASTER_VIDEO_PROC               6
 146 #define MASTER_MDP0                     7
 147 #define MASTER_MDP1                     8
 148 #define MASTER_ROTATOR                  9
 149 #define SLAVE_MNOC_HF_MEM_NOC           10
 150 #define SLAVE_MNOC_SF_MEM_NOC           11
 151 #define SLAVE_SERVICE_MNOC              12
 152 #define MASTER_MDP0_DISP                13
 153 #define MASTER_MDP1_DISP                14
 154 #define MASTER_ROTATOR_DISP             15
 155 #define SLAVE_MNOC_HF_MEM_NOC_DISP      16
 156 #define SLAVE_MNOC_SF_MEM_NOC_DISP      17
 157
 158 #define MASTER_CDSP_NOC_CFG             0
 159 #define MASTER_CDSP_PROC                1
 160 #define SLAVE_CDSP_MEM_NOC              2
 161 #define SLAVE_SERVICE_NSP_NOC           3
 162
 163 #define MASTER_A1NOC_SNOC               0
 164 #define MASTER_A2NOC_SNOC               1
 165 #define MASTER_SNOC_CFG                 2
 166 #define MASTER_PIMEM                    3
 167 #define MASTER_GIC                      4
 168 #define SLAVE_SNOC_GEM_NOC_GC           5
 169 #define SLAVE_SNOC_GEM_NOC_SF           6
 170 #define SLAVE_SERVICE_SNOC              7
 171
 172 #endif