1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Qualcomm SC7180 interconnect IDs
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H
9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H
11 #define MASTER_A1NOC_CFG 0
13 #define MASTER_QUP_0 2
14 #define MASTER_SDCC_2 3
16 #define MASTER_UFS_MEM 5
17 #define SLAVE_A1NOC_SNOC 6
18 #define SLAVE_SERVICE_A1NOC 7
20 #define MASTER_A2NOC_CFG 0
21 #define MASTER_QDSS_BAM 1
22 #define MASTER_QUP_1 2
24 #define MASTER_CRYPTO 4
26 #define MASTER_QDSS_ETR 6
27 #define SLAVE_A2NOC_SNOC 7
28 #define SLAVE_SERVICE_A2NOC 8
30 #define MASTER_CAMNOC_HF0_UNCOMP 0
31 #define MASTER_CAMNOC_HF1_UNCOMP 1
32 #define MASTER_CAMNOC_SF_UNCOMP 2
33 #define SLAVE_CAMNOC_UNCOMP 3
36 #define MASTER_NPU_PROC 1
37 #define SLAVE_CDSP_GEM_NOC 2
39 #define MASTER_SNOC_CNOC 0
40 #define MASTER_QDSS_DAP 1
41 #define SLAVE_A1NOC_CFG 2
42 #define SLAVE_A2NOC_CFG 3
43 #define SLAVE_AHB2PHY_SOUTH 4
44 #define SLAVE_AHB2PHY_CENTER 5
47 #define SLAVE_BOOT_ROM 8
48 #define SLAVE_CAMERA_CFG 9
49 #define SLAVE_CAMERA_NRT_THROTTLE_CFG 10
50 #define SLAVE_CAMERA_RT_THROTTLE_CFG 11
51 #define SLAVE_CLK_CTL 12
52 #define SLAVE_RBCPR_CX_CFG 13
53 #define SLAVE_RBCPR_MX_CFG 14
54 #define SLAVE_CRYPTO_0_CFG 15
55 #define SLAVE_DCC_CFG 16
56 #define SLAVE_CNOC_DDRSS 17
57 #define SLAVE_DISPLAY_CFG 18
58 #define SLAVE_DISPLAY_RT_THROTTLE_CFG 19
59 #define SLAVE_DISPLAY_THROTTLE_CFG 20
60 #define SLAVE_EMMC_CFG 21
62 #define SLAVE_GFX3D_CFG 23
63 #define SLAVE_IMEM_CFG 24
64 #define SLAVE_IPA_CFG 25
65 #define SLAVE_CNOC_MNOC_CFG 26
66 #define SLAVE_CNOC_MSS 27
67 #define SLAVE_NPU_CFG 28
68 #define SLAVE_NPU_DMA_BWMON_CFG 29
69 #define SLAVE_NPU_PROC_BWMON_CFG 30
71 #define SLAVE_PIMEM_CFG 32
73 #define SLAVE_QDSS_CFG 34
74 #define SLAVE_QM_CFG 35
75 #define SLAVE_QM_MPU_CFG 36
76 #define SLAVE_QSPI_0 37
77 #define SLAVE_QUP_0 38
78 #define SLAVE_QUP_1 39
79 #define SLAVE_SDCC_2 40
80 #define SLAVE_SECURITY 41
81 #define SLAVE_SNOC_CFG 42
83 #define SLAVE_TLMM_WEST 44
84 #define SLAVE_TLMM_NORTH 45
85 #define SLAVE_TLMM_SOUTH 46
86 #define SLAVE_UFS_MEM_CFG 47
88 #define SLAVE_VENUS_CFG 49
89 #define SLAVE_VENUS_THROTTLE_CFG 50
90 #define SLAVE_VSENSE_CTRL_CFG 51
91 #define SLAVE_SERVICE_CNOC 52
93 #define MASTER_CNOC_DC_NOC 0
94 #define SLAVE_GEM_NOC_CFG 1
95 #define SLAVE_LLCC_CFG 2
97 #define MASTER_APPSS_PROC 0
98 #define MASTER_SYS_TCU 1
99 #define MASTER_GEM_NOC_CFG 2
100 #define MASTER_COMPUTE_NOC 3
101 #define MASTER_MNOC_HF_MEM_NOC 4
102 #define MASTER_MNOC_SF_MEM_NOC 5
103 #define MASTER_SNOC_GC_MEM_NOC 6
104 #define MASTER_SNOC_SF_MEM_NOC 7
105 #define MASTER_GFX3D 8
106 #define SLAVE_MSS_PROC_MS_MPU_CFG 9
107 #define SLAVE_GEM_NOC_SNOC 10
108 #define SLAVE_LLCC 11
109 #define SLAVE_SERVICE_GEM_NOC 12
111 #define MASTER_LLCC 0
114 #define MASTER_CNOC_MNOC_CFG 0
115 #define MASTER_CAMNOC_HF0 1
116 #define MASTER_CAMNOC_HF1 2
117 #define MASTER_CAMNOC_SF 3
118 #define MASTER_MDP0 4
119 #define MASTER_ROTATOR 5
120 #define MASTER_VIDEO_P0 6
121 #define MASTER_VIDEO_PROC 7
122 #define SLAVE_MNOC_HF_MEM_NOC 8
123 #define SLAVE_MNOC_SF_MEM_NOC 9
124 #define SLAVE_SERVICE_MNOC 10
126 #define MASTER_NPU_SYS 0
127 #define MASTER_NPU_NOC_CFG 1
128 #define SLAVE_NPU_CAL_DP0 2
129 #define SLAVE_NPU_CP 3
130 #define SLAVE_NPU_INT_DMA_BWMON_CFG 4
131 #define SLAVE_NPU_DPM 5
132 #define SLAVE_ISENSE_CFG 6
133 #define SLAVE_NPU_LLM_CFG 7
134 #define SLAVE_NPU_TCM 8
135 #define SLAVE_NPU_COMPUTE_NOC 9
136 #define SLAVE_SERVICE_NPU_NOC 10
138 #define MASTER_QUP_CORE_0 0
139 #define MASTER_QUP_CORE_1 1
140 #define SLAVE_QUP_CORE_0 2
141 #define SLAVE_QUP_CORE_1 3
143 #define MASTER_SNOC_CFG 0
144 #define MASTER_A1NOC_SNOC 1
145 #define MASTER_A2NOC_SNOC 2
146 #define MASTER_GEM_NOC_SNOC 3
147 #define MASTER_PIMEM 4
148 #define SLAVE_APPSS 5
149 #define SLAVE_SNOC_CNOC 6
150 #define SLAVE_SNOC_GEM_NOC_GC 7
151 #define SLAVE_SNOC_GEM_NOC_SF 8
153 #define SLAVE_PIMEM 10
154 #define SLAVE_SERVICE_SNOC 11
155 #define SLAVE_QDSS_STM 12