1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Interconnect framework driver for i.MX SoC
5 * Copyright (c) 2019, BayLibre
6 * Copyright (c) 2019-2020, NXP
7 * Author: Alexandre Bailon <abailon@baylibre.com>
10 #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
11 #define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
13 #define IMX8MM_ICN_NOC 1
14 #define IMX8MM_ICS_DRAM 2
15 #define IMX8MM_ICS_OCRAM 3
16 #define IMX8MM_ICM_A53 4
18 #define IMX8MM_ICM_VPU_H1 5
19 #define IMX8MM_ICM_VPU_G1 6
20 #define IMX8MM_ICM_VPU_G2 7
21 #define IMX8MM_ICN_VIDEO 8
23 #define IMX8MM_ICM_GPU2D 9
24 #define IMX8MM_ICM_GPU3D 10
25 #define IMX8MM_ICN_GPU 11
27 #define IMX8MM_ICM_CSI 12
28 #define IMX8MM_ICM_LCDIF 13
29 #define IMX8MM_ICN_MIPI 14
31 #define IMX8MM_ICM_USB1 15
32 #define IMX8MM_ICM_USB2 16
33 #define IMX8MM_ICM_PCIE 17
34 #define IMX8MM_ICN_HSIO 18
36 #define IMX8MM_ICM_SDMA2 19
37 #define IMX8MM_ICM_SDMA3 20
38 #define IMX8MM_ICN_AUDIO 21
40 #define IMX8MM_ICN_ENET 22
41 #define IMX8MM_ICM_ENET 23
43 #define IMX8MM_ICN_MAIN 24
44 #define IMX8MM_ICM_NAND 25
45 #define IMX8MM_ICM_SDMA1 26
46 #define IMX8MM_ICM_USDHC1 27
47 #define IMX8MM_ICM_USDHC2 28
48 #define IMX8MM_ICM_USDHC3 29
50 #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */