1 #ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__
2 #define __DT_BINDINGS_DMA_JZ4780_DMA_H__
5 * Request type numbers for the JZ4780 DMA controller (written to the DRTn
6 * register for the channel).
8 #define JZ4780_DMA_I2S1_TX 0x4
9 #define JZ4780_DMA_I2S1_RX 0x5
10 #define JZ4780_DMA_I2S0_TX 0x6
11 #define JZ4780_DMA_I2S0_RX 0x7
12 #define JZ4780_DMA_AUTO 0x8
13 #define JZ4780_DMA_SADC_RX 0x9
14 #define JZ4780_DMA_UART4_TX 0xc
15 #define JZ4780_DMA_UART4_RX 0xd
16 #define JZ4780_DMA_UART3_TX 0xe
17 #define JZ4780_DMA_UART3_RX 0xf
18 #define JZ4780_DMA_UART2_TX 0x10
19 #define JZ4780_DMA_UART2_RX 0x11
20 #define JZ4780_DMA_UART1_TX 0x12
21 #define JZ4780_DMA_UART1_RX 0x13
22 #define JZ4780_DMA_UART0_TX 0x14
23 #define JZ4780_DMA_UART0_RX 0x15
24 #define JZ4780_DMA_SSI0_TX 0x16
25 #define JZ4780_DMA_SSI0_RX 0x17
26 #define JZ4780_DMA_SSI1_TX 0x18
27 #define JZ4780_DMA_SSI1_RX 0x19
28 #define JZ4780_DMA_MSC0_TX 0x1a
29 #define JZ4780_DMA_MSC0_RX 0x1b
30 #define JZ4780_DMA_MSC1_TX 0x1c
31 #define JZ4780_DMA_MSC1_RX 0x1d
32 #define JZ4780_DMA_MSC2_TX 0x1e
33 #define JZ4780_DMA_MSC2_RX 0x1f
34 #define JZ4780_DMA_PCM0_TX 0x20
35 #define JZ4780_DMA_PCM0_RX 0x21
36 #define JZ4780_DMA_SMB0_TX 0x24
37 #define JZ4780_DMA_SMB0_RX 0x25
38 #define JZ4780_DMA_SMB1_TX 0x26
39 #define JZ4780_DMA_SMB1_RX 0x27
40 #define JZ4780_DMA_SMB2_TX 0x28
41 #define JZ4780_DMA_SMB2_RX 0x29
42 #define JZ4780_DMA_SMB3_TX 0x2a
43 #define JZ4780_DMA_SMB3_RX 0x2b
44 #define JZ4780_DMA_SMB4_TX 0x2c
45 #define JZ4780_DMA_SMB4_RX 0x2d
46 #define JZ4780_DMA_DES_TX 0x2e
47 #define JZ4780_DMA_DES_RX 0x2f
49 #endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */