2 * Copyright (C) 2017 Priit Laes <plaes@plaes.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
42 #ifndef _DT_BINDINGS_CLK_SUN4I_A10_H_
43 #define _DT_BINDINGS_CLK_SUN4I_A10_H_
49 #define CLK_AHB_OTG 26
50 #define CLK_AHB_EHCI0 27
51 #define CLK_AHB_OHCI0 28
52 #define CLK_AHB_EHCI1 29
53 #define CLK_AHB_OHCI1 30
55 #define CLK_AHB_DMA 32
56 #define CLK_AHB_BIST 33
57 #define CLK_AHB_MMC0 34
58 #define CLK_AHB_MMC1 35
59 #define CLK_AHB_MMC2 36
60 #define CLK_AHB_MMC3 37
62 #define CLK_AHB_NAND 39
63 #define CLK_AHB_SDRAM 40
64 #define CLK_AHB_ACE 41
65 #define CLK_AHB_EMAC 42
67 #define CLK_AHB_SPI0 44
68 #define CLK_AHB_SPI1 45
69 #define CLK_AHB_SPI2 46
70 #define CLK_AHB_SPI3 47
71 #define CLK_AHB_PATA 48
72 #define CLK_AHB_SATA 49
73 #define CLK_AHB_GPS 50
74 #define CLK_AHB_HSTIMER 51
76 #define CLK_AHB_TVD 53
77 #define CLK_AHB_TVE0 54
78 #define CLK_AHB_TVE1 55
79 #define CLK_AHB_LCD0 56
80 #define CLK_AHB_LCD1 57
81 #define CLK_AHB_CSI0 58
82 #define CLK_AHB_CSI1 59
83 #define CLK_AHB_HDMI0 60
84 #define CLK_AHB_HDMI1 61
85 #define CLK_AHB_DE_BE0 62
86 #define CLK_AHB_DE_BE1 63
87 #define CLK_AHB_DE_FE0 64
88 #define CLK_AHB_DE_FE1 65
89 #define CLK_AHB_GMAC 66
91 #define CLK_AHB_GPU 68
94 #define CLK_APB0_CODEC 69
95 #define CLK_APB0_SPDIF 70
96 #define CLK_APB0_I2S0 71
97 #define CLK_APB0_AC97 72
98 #define CLK_APB0_I2S1 73
99 #define CLK_APB0_PIO 74
100 #define CLK_APB0_IR0 75
101 #define CLK_APB0_IR1 76
102 #define CLK_APB0_I2S2 77
103 #define CLK_APB0_KEYPAD 78
106 #define CLK_APB1_I2C0 79
107 #define CLK_APB1_I2C1 80
108 #define CLK_APB1_I2C2 81
109 #define CLK_APB1_I2C3 82
110 #define CLK_APB1_CAN 83
111 #define CLK_APB1_SCR 84
112 #define CLK_APB1_PS20 85
113 #define CLK_APB1_PS21 86
114 #define CLK_APB1_I2C4 87
115 #define CLK_APB1_UART0 88
116 #define CLK_APB1_UART1 89
117 #define CLK_APB1_UART2 90
118 #define CLK_APB1_UART3 91
119 #define CLK_APB1_UART4 92
120 #define CLK_APB1_UART5 93
121 #define CLK_APB1_UART6 94
122 #define CLK_APB1_UART7 95
128 #define CLK_MMC0_OUTPUT 99
129 #define CLK_MMC0_SAMPLE 100
131 #define CLK_MMC1_OUTPUT 102
132 #define CLK_MMC1_SAMPLE 103
134 #define CLK_MMC2_OUTPUT 105
135 #define CLK_MMC2_SAMPLE 106
137 #define CLK_MMC3_OUTPUT 108
138 #define CLK_MMC3_SAMPLE 109
149 #define CLK_SPDIF 120
150 #define CLK_KEYPAD 121
152 #define CLK_USB_OHCI0 123
153 #define CLK_USB_OHCI1 124
154 #define CLK_USB_PHY 125
161 #define CLK_DRAM_VE 130
162 #define CLK_DRAM_CSI0 131
163 #define CLK_DRAM_CSI1 132
164 #define CLK_DRAM_TS 133
165 #define CLK_DRAM_TVD 134
166 #define CLK_DRAM_TVE0 135
167 #define CLK_DRAM_TVE1 136
168 #define CLK_DRAM_OUT 137
169 #define CLK_DRAM_DE_FE1 138
170 #define CLK_DRAM_DE_FE0 139
171 #define CLK_DRAM_DE_BE0 140
172 #define CLK_DRAM_DE_BE1 141
173 #define CLK_DRAM_MP 142
174 #define CLK_DRAM_ACE 143
176 /* Display Engine Clocks */
177 #define CLK_DE_BE0 144
178 #define CLK_DE_BE1 145
179 #define CLK_DE_FE0 146
180 #define CLK_DE_FE1 147
181 #define CLK_DE_MP 148
182 #define CLK_TCON0_CH0 149
183 #define CLK_TCON1_CH0 150
184 #define CLK_CSI_SCLK 151
185 #define CLK_TVD_SCLK2 152
187 #define CLK_TCON0_CH1_SCLK2 154
188 #define CLK_TCON0_CH1 155
189 #define CLK_TCON1_CH1_SCLK2 156
190 #define CLK_TCON1_CH1 157
193 #define CLK_CODEC 160
200 #endif /* _DT_BINDINGS_CLK_SUN4I_A10_H_ */