arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / include / dt-bindings / clock / ingenic,jz4755-cgu.h
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * This header provides clock numbers for the ingenic,jz4755-cgu DT binding.
4  */
5
6 #ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
7 #define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
8
9 #define JZ4755_CLK_EXT          0
10 #define JZ4755_CLK_OSC32K       1
11 #define JZ4755_CLK_PLL          2
12 #define JZ4755_CLK_PLL_HALF     3
13 #define JZ4755_CLK_EXT_HALF     4
14 #define JZ4755_CLK_CCLK         5
15 #define JZ4755_CLK_H0CLK        6
16 #define JZ4755_CLK_PCLK         7
17 #define JZ4755_CLK_MCLK         8
18 #define JZ4755_CLK_H1CLK        9
19 #define JZ4755_CLK_UDC          10
20 #define JZ4755_CLK_LCD          11
21 #define JZ4755_CLK_UART0        12
22 #define JZ4755_CLK_UART1        13
23 #define JZ4755_CLK_UART2        14
24 #define JZ4755_CLK_DMA          15
25 #define JZ4755_CLK_MMC          16
26 #define JZ4755_CLK_MMC0         17
27 #define JZ4755_CLK_MMC1         18
28 #define JZ4755_CLK_EXT512       19
29 #define JZ4755_CLK_RTC          20
30 #define JZ4755_CLK_UDC_PHY      21
31 #define JZ4755_CLK_I2S          22
32 #define JZ4755_CLK_SPI          23
33 #define JZ4755_CLK_AIC          24
34 #define JZ4755_CLK_ADC          25
35 #define JZ4755_CLK_TCU          26
36 #define JZ4755_CLK_BCH          27
37 #define JZ4755_CLK_I2C          28
38 #define JZ4755_CLK_TVE          29
39 #define JZ4755_CLK_CIM          30
40 #define JZ4755_CLK_AUX_CPU      31
41 #define JZ4755_CLK_AHB1         32
42 #define JZ4755_CLK_IDCT         33
43 #define JZ4755_CLK_DB           34
44 #define JZ4755_CLK_ME           35
45 #define JZ4755_CLK_MC           36
46 #define JZ4755_CLK_TSSI         37
47 #define JZ4755_CLK_IPU          38
48
49 #endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */