GNU Linux-libre 6.9.1-gnu
[releases.git] / include / dt-bindings / clock / imx6sl-clock.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright 2013 Freescale Semiconductor, Inc.
4  */
5
6 #ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
7 #define __DT_BINDINGS_CLOCK_IMX6SL_H
8
9 #define IMX6SL_CLK_DUMMY                0
10 #define IMX6SL_CLK_CKIL                 1
11 #define IMX6SL_CLK_OSC                  2
12 #define IMX6SL_CLK_PLL1_SYS             3
13 #define IMX6SL_CLK_PLL2_BUS             4
14 #define IMX6SL_CLK_PLL3_USB_OTG         5
15 #define IMX6SL_CLK_PLL4_AUDIO           6
16 #define IMX6SL_CLK_PLL5_VIDEO           7
17 #define IMX6SL_CLK_PLL6_ENET            8
18 #define IMX6SL_CLK_PLL7_USB_HOST        9
19 #define IMX6SL_CLK_USBPHY1              10
20 #define IMX6SL_CLK_USBPHY2              11
21 #define IMX6SL_CLK_USBPHY1_GATE         12
22 #define IMX6SL_CLK_USBPHY2_GATE         13
23 #define IMX6SL_CLK_PLL4_POST_DIV        14
24 #define IMX6SL_CLK_PLL5_POST_DIV        15
25 #define IMX6SL_CLK_PLL5_VIDEO_DIV       16
26 #define IMX6SL_CLK_ENET_REF             17
27 #define IMX6SL_CLK_PLL2_PFD0            18
28 #define IMX6SL_CLK_PLL2_PFD1            19
29 #define IMX6SL_CLK_PLL2_PFD2            20
30 #define IMX6SL_CLK_PLL3_PFD0            21
31 #define IMX6SL_CLK_PLL3_PFD1            22
32 #define IMX6SL_CLK_PLL3_PFD2            23
33 #define IMX6SL_CLK_PLL3_PFD3            24
34 #define IMX6SL_CLK_PLL2_198M            25
35 #define IMX6SL_CLK_PLL3_120M            26
36 #define IMX6SL_CLK_PLL3_80M             27
37 #define IMX6SL_CLK_PLL3_60M             28
38 #define IMX6SL_CLK_STEP                 29
39 #define IMX6SL_CLK_PLL1_SW              30
40 #define IMX6SL_CLK_OCRAM_ALT_SEL        31
41 #define IMX6SL_CLK_OCRAM_SEL            32
42 #define IMX6SL_CLK_PRE_PERIPH2_SEL      33
43 #define IMX6SL_CLK_PRE_PERIPH_SEL       34
44 #define IMX6SL_CLK_PERIPH2_CLK2_SEL     35
45 #define IMX6SL_CLK_PERIPH_CLK2_SEL      36
46 #define IMX6SL_CLK_CSI_SEL              37
47 #define IMX6SL_CLK_LCDIF_AXI_SEL        38
48 #define IMX6SL_CLK_USDHC1_SEL           39
49 #define IMX6SL_CLK_USDHC2_SEL           40
50 #define IMX6SL_CLK_USDHC3_SEL           41
51 #define IMX6SL_CLK_USDHC4_SEL           42
52 #define IMX6SL_CLK_SSI1_SEL             43
53 #define IMX6SL_CLK_SSI2_SEL             44
54 #define IMX6SL_CLK_SSI3_SEL             45
55 #define IMX6SL_CLK_PERCLK_SEL           46
56 #define IMX6SL_CLK_PXP_AXI_SEL          47
57 #define IMX6SL_CLK_EPDC_AXI_SEL         48
58 #define IMX6SL_CLK_GPU2D_OVG_SEL        49
59 #define IMX6SL_CLK_GPU2D_SEL            50
60 #define IMX6SL_CLK_LCDIF_PIX_SEL        51
61 #define IMX6SL_CLK_EPDC_PIX_SEL         52
62 #define IMX6SL_CLK_SPDIF0_SEL           53
63 #define IMX6SL_CLK_SPDIF1_SEL           54
64 #define IMX6SL_CLK_EXTERN_AUDIO_SEL     55
65 #define IMX6SL_CLK_ECSPI_SEL            56
66 #define IMX6SL_CLK_UART_SEL             57
67 #define IMX6SL_CLK_PERIPH               58
68 #define IMX6SL_CLK_PERIPH2              59
69 #define IMX6SL_CLK_OCRAM_PODF           60
70 #define IMX6SL_CLK_PERIPH_CLK2_PODF     61
71 #define IMX6SL_CLK_PERIPH2_CLK2_PODF    62
72 #define IMX6SL_CLK_IPG                  63
73 #define IMX6SL_CLK_CSI_PODF             64
74 #define IMX6SL_CLK_LCDIF_AXI_PODF       65
75 #define IMX6SL_CLK_USDHC1_PODF          66
76 #define IMX6SL_CLK_USDHC2_PODF          67
77 #define IMX6SL_CLK_USDHC3_PODF          68
78 #define IMX6SL_CLK_USDHC4_PODF          69
79 #define IMX6SL_CLK_SSI1_PRED            70
80 #define IMX6SL_CLK_SSI1_PODF            71
81 #define IMX6SL_CLK_SSI2_PRED            72
82 #define IMX6SL_CLK_SSI2_PODF            73
83 #define IMX6SL_CLK_SSI3_PRED            74
84 #define IMX6SL_CLK_SSI3_PODF            75
85 #define IMX6SL_CLK_PERCLK               76
86 #define IMX6SL_CLK_PXP_AXI_PODF         77
87 #define IMX6SL_CLK_EPDC_AXI_PODF        78
88 #define IMX6SL_CLK_GPU2D_OVG_PODF       79
89 #define IMX6SL_CLK_GPU2D_PODF           80
90 #define IMX6SL_CLK_LCDIF_PIX_PRED       81
91 #define IMX6SL_CLK_EPDC_PIX_PRED        82
92 #define IMX6SL_CLK_LCDIF_PIX_PODF       83
93 #define IMX6SL_CLK_EPDC_PIX_PODF        84
94 #define IMX6SL_CLK_SPDIF0_PRED          85
95 #define IMX6SL_CLK_SPDIF0_PODF          86
96 #define IMX6SL_CLK_SPDIF1_PRED          87
97 #define IMX6SL_CLK_SPDIF1_PODF          88
98 #define IMX6SL_CLK_EXTERN_AUDIO_PRED    89
99 #define IMX6SL_CLK_EXTERN_AUDIO_PODF    90
100 #define IMX6SL_CLK_ECSPI_ROOT           91
101 #define IMX6SL_CLK_UART_ROOT            92
102 #define IMX6SL_CLK_AHB                  93
103 #define IMX6SL_CLK_MMDC_ROOT            94
104 #define IMX6SL_CLK_ARM                  95
105 #define IMX6SL_CLK_ECSPI1               96
106 #define IMX6SL_CLK_ECSPI2               97
107 #define IMX6SL_CLK_ECSPI3               98
108 #define IMX6SL_CLK_ECSPI4               99
109 #define IMX6SL_CLK_EPIT1                100
110 #define IMX6SL_CLK_EPIT2                101
111 #define IMX6SL_CLK_EXTERN_AUDIO         102
112 #define IMX6SL_CLK_GPT                  103
113 #define IMX6SL_CLK_GPT_SERIAL           104
114 #define IMX6SL_CLK_GPU2D_OVG            105
115 #define IMX6SL_CLK_I2C1                 106
116 #define IMX6SL_CLK_I2C2                 107
117 #define IMX6SL_CLK_I2C3                 108
118 #define IMX6SL_CLK_OCOTP                109
119 #define IMX6SL_CLK_CSI                  110
120 #define IMX6SL_CLK_PXP_AXI              111
121 #define IMX6SL_CLK_EPDC_AXI             112
122 #define IMX6SL_CLK_LCDIF_AXI            113
123 #define IMX6SL_CLK_LCDIF_PIX            114
124 #define IMX6SL_CLK_EPDC_PIX             115
125 #define IMX6SL_CLK_OCRAM                116
126 #define IMX6SL_CLK_PWM1                 117
127 #define IMX6SL_CLK_PWM2                 118
128 #define IMX6SL_CLK_PWM3                 119
129 #define IMX6SL_CLK_PWM4                 120
130 #define IMX6SL_CLK_SDMA                 121
131 #define IMX6SL_CLK_SPDIF                122
132 #define IMX6SL_CLK_SSI1                 123
133 #define IMX6SL_CLK_SSI2                 124
134 #define IMX6SL_CLK_SSI3                 125
135 #define IMX6SL_CLK_UART                 126
136 #define IMX6SL_CLK_UART_SERIAL          127
137 #define IMX6SL_CLK_USBOH3               128
138 #define IMX6SL_CLK_USDHC1               129
139 #define IMX6SL_CLK_USDHC2               130
140 #define IMX6SL_CLK_USDHC3               131
141 #define IMX6SL_CLK_USDHC4               132
142 #define IMX6SL_CLK_PLL4_AUDIO_DIV       133
143 #define IMX6SL_CLK_SPBA                 134
144 #define IMX6SL_CLK_ENET                 135
145 #define IMX6SL_CLK_LVDS1_SEL            136
146 #define IMX6SL_CLK_LVDS1_OUT            137
147 #define IMX6SL_CLK_LVDS1_IN             138
148 #define IMX6SL_CLK_ANACLK1              139
149 #define IMX6SL_PLL1_BYPASS_SRC          140
150 #define IMX6SL_PLL2_BYPASS_SRC          141
151 #define IMX6SL_PLL3_BYPASS_SRC          142
152 #define IMX6SL_PLL4_BYPASS_SRC          143
153 #define IMX6SL_PLL5_BYPASS_SRC          144
154 #define IMX6SL_PLL6_BYPASS_SRC          145
155 #define IMX6SL_PLL7_BYPASS_SRC          146
156 #define IMX6SL_CLK_PLL1                 147
157 #define IMX6SL_CLK_PLL2                 148
158 #define IMX6SL_CLK_PLL3                 149
159 #define IMX6SL_CLK_PLL4                 150
160 #define IMX6SL_CLK_PLL5                 151
161 #define IMX6SL_CLK_PLL6                 152
162 #define IMX6SL_CLK_PLL7                 153
163 #define IMX6SL_PLL1_BYPASS              154
164 #define IMX6SL_PLL2_BYPASS              155
165 #define IMX6SL_PLL3_BYPASS              156
166 #define IMX6SL_PLL4_BYPASS              157
167 #define IMX6SL_PLL5_BYPASS              158
168 #define IMX6SL_PLL6_BYPASS              159
169 #define IMX6SL_PLL7_BYPASS              160
170 #define IMX6SL_CLK_SSI1_IPG             161
171 #define IMX6SL_CLK_SSI2_IPG             162
172 #define IMX6SL_CLK_SSI3_IPG             163
173 #define IMX6SL_CLK_SPDIF_GCLK           164
174 #define IMX6SL_CLK_MMDC_P0_IPG          165
175 #define IMX6SL_CLK_MMDC_P1_IPG          166
176 #define IMX6SL_CLK_END                  167
177
178 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */