1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables (2)
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
50 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
52 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
53 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
54 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
55 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
56 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
59 * All tables must be byte-packed to match the ACPI specification, since
60 * the tables are provided by the system BIOS.
65 * Note: C bitfields are not used for this reason:
67 * "Bitfields are great and easy to read, but unfortunately the C language
68 * does not specify the layout of bitfields in memory, which means they are
69 * essentially useless for dealing with packed data in on-disk formats or
70 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
71 * this decision was a design error in C. Ritchie could have picked an order
72 * and stuck with it." Norman Ramsey.
73 * See http://stackoverflow.com/a/1053662/41661
76 /*******************************************************************************
78 * AEST - Arm Error Source Table
80 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
83 ******************************************************************************/
85 struct acpi_table_aest {
86 struct acpi_table_header header;
89 /* Common Subtable header - one per Node Structure (Subtable) */
91 struct acpi_aest_hdr {
95 u32 node_specific_offset;
96 u32 node_interface_offset;
97 u32 node_interrupt_offset;
98 u32 node_interrupt_count;
101 u64 error_injection_rate;
104 /* Values for Type above */
106 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0
107 #define ACPI_AEST_MEMORY_ERROR_NODE 1
108 #define ACPI_AEST_SMMU_ERROR_NODE 2
109 #define ACPI_AEST_VENDOR_ERROR_NODE 3
110 #define ACPI_AEST_GIC_ERROR_NODE 4
111 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
114 * AEST subtables (Error nodes)
117 /* 0: Processor Error */
119 typedef struct acpi_aest_processor {
125 u64 processor_affinity;
127 } acpi_aest_processor;
129 /* Values for resource_type above, related structs below */
131 #define ACPI_AEST_CACHE_RESOURCE 0
132 #define ACPI_AEST_TLB_RESOURCE 1
133 #define ACPI_AEST_GENERIC_RESOURCE 2
134 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
136 /* 0R: Processor Cache Resource Substructure */
138 typedef struct acpi_aest_processor_cache {
142 } acpi_aest_processor_cache;
144 /* Values for cache_type above */
146 #define ACPI_AEST_CACHE_DATA 0
147 #define ACPI_AEST_CACHE_INSTRUCTION 1
148 #define ACPI_AEST_CACHE_UNIFIED 2
149 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
151 /* 1R: Processor TLB Resource Substructure */
153 typedef struct acpi_aest_processor_tlb {
157 } acpi_aest_processor_tlb;
159 /* 2R: Processor Generic Resource Substructure */
161 typedef struct acpi_aest_processor_generic {
164 } acpi_aest_processor_generic;
166 /* 1: Memory Error */
168 typedef struct acpi_aest_memory {
169 u32 srat_proximity_domain;
175 typedef struct acpi_aest_smmu {
176 u32 iort_node_reference;
177 u32 subcomponent_reference;
181 /* 3: Vendor Defined */
183 typedef struct acpi_aest_vendor {
186 u8 vendor_specific_data[16];
192 typedef struct acpi_aest_gic {
198 /* Values for interface_type above */
200 #define ACPI_AEST_GIC_CPU 0
201 #define ACPI_AEST_GIC_DISTRIBUTOR 1
202 #define ACPI_AEST_GIC_REDISTRIBUTOR 2
203 #define ACPI_AEST_GIC_ITS 3
204 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
206 /* Node Interface Structure */
208 typedef struct acpi_aest_node_interface {
213 u32 error_record_index;
214 u32 error_record_count;
215 u64 error_record_implemented;
216 u64 error_status_reporting;
219 } acpi_aest_node_interface;
221 /* Values for Type field above */
223 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0
224 #define ACPI_AEST_NODE_MEMORY_MAPPED 1
225 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
227 /* Node Interrupt Structure */
229 typedef struct acpi_aest_node_interrupt {
237 } acpi_aest_node_interrupt;
239 /* Values for Type field above */
241 #define ACPI_AEST_NODE_FAULT_HANDLING 0
242 #define ACPI_AEST_NODE_ERROR_RECOVERY 1
243 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
245 /*******************************************************************************
246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
248 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
251 ******************************************************************************/
252 struct acpi_table_agdi {
253 struct acpi_table_header header; /* Common ACPI table header */
260 /* Mask for Flags field above */
262 #define ACPI_AGDI_SIGNALING_MODE (1)
264 /*******************************************************************************
266 * APMT - ARM Performance Monitoring Unit Table
269 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
270 * ARM DEN0117 v1.0 November 25, 2021
272 ******************************************************************************/
274 struct acpi_table_apmt {
275 struct acpi_table_header header; /* Common ACPI table header */
278 #define ACPI_APMT_NODE_ID_LENGTH 4
283 struct acpi_apmt_node {
299 /* Masks for Flags field above */
301 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
302 #define ACPI_APMT_FLAGS_AFFINITY (1<<1)
303 #define ACPI_APMT_FLAGS_ATOMIC (1<<2)
305 /* Values for Flags dual page field above */
307 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
308 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
310 /* Values for Flags processor affinity field above */
311 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
312 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
314 /* Values for Flags 64-bit atomic field above */
315 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
316 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
318 /* Values for Type field above */
320 enum acpi_apmt_node_type {
321 ACPI_APMT_NODE_TYPE_MC = 0x00,
322 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
323 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
324 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
325 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
326 ACPI_APMT_NODE_TYPE_COUNT
329 /* Masks for ovflw_irq_flags field above */
331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
332 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
334 /* Values for ovflw_irq_flags mode field above */
336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
337 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
339 /* Values for ovflw_irq_flags type field above */
341 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
343 /*******************************************************************************
345 * BDAT - BIOS Data ACPI Table
347 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
350 ******************************************************************************/
352 struct acpi_table_bdat {
353 struct acpi_table_header header;
354 struct acpi_generic_address gas;
357 /*******************************************************************************
359 * CCEL - CC-Event Log
360 * From: "Guest-Host-Communication Interface (GHCI) for Intel
361 * Trust Domain Extensions (Intel TDX)". Feb 2022
363 ******************************************************************************/
365 struct acpi_table_ccel {
366 struct acpi_table_header header; /* Common ACPI table header */
370 u64 log_area_minimum_length;
371 u64 log_area_start_address;
374 /*******************************************************************************
376 * IORT - IO Remapping Table
378 * Conforms to "IO Remapping Table System Software on ARM Platforms",
379 * Document number: ARM DEN 0049E.e, Sep 2022
381 ******************************************************************************/
383 struct acpi_table_iort {
384 struct acpi_table_header header;
393 struct acpi_iort_node {
403 /* Values for subtable Type above */
405 enum acpi_iort_node_type {
406 ACPI_IORT_NODE_ITS_GROUP = 0x00,
407 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
408 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
409 ACPI_IORT_NODE_SMMU = 0x03,
410 ACPI_IORT_NODE_SMMU_V3 = 0x04,
411 ACPI_IORT_NODE_PMCG = 0x05,
412 ACPI_IORT_NODE_RMR = 0x06,
415 struct acpi_iort_id_mapping {
416 u32 input_base; /* Lowest value in input range */
417 u32 id_count; /* Number of IDs */
418 u32 output_base; /* Lowest value in output range */
419 u32 output_reference; /* A reference to the output node */
423 /* Masks for Flags field above for IORT subtable */
425 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
427 struct acpi_iort_memory_access {
434 /* Values for cache_coherency field above */
436 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
437 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
439 /* Masks for Hints field above */
441 #define ACPI_IORT_HT_TRANSIENT (1)
442 #define ACPI_IORT_HT_WRITE (1<<1)
443 #define ACPI_IORT_HT_READ (1<<2)
444 #define ACPI_IORT_HT_OVERRIDE (1<<3)
446 /* Masks for memory_flags field above */
448 #define ACPI_IORT_MF_COHERENCY (1)
449 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
452 * IORT node specific subtables
454 struct acpi_iort_its_group {
456 u32 identifiers[]; /* GIC ITS identifier array */
459 struct acpi_iort_named_component {
461 u64 memory_properties; /* Memory access properties */
462 u8 memory_address_limit; /* Memory address size limit */
463 char device_name[]; /* Path of namespace object */
466 /* Masks for Flags field above */
468 #define ACPI_IORT_NC_STALL_SUPPORTED (1)
469 #define ACPI_IORT_NC_PASID_BITS (31<<1)
471 struct acpi_iort_root_complex {
472 u64 memory_properties; /* Memory access properties */
474 u32 pci_segment_number;
475 u8 memory_address_limit; /* Memory address size limit */
476 u16 pasid_capabilities; /* PASID Capabilities */
477 u8 reserved[]; /* Reserved, must be zero */
480 /* Masks for ats_attribute field above */
482 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
483 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
484 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
486 /* Masks for pasid_capabilities field above */
487 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
489 struct acpi_iort_smmu {
490 u64 base_address; /* SMMU base address */
491 u64 span; /* Length of memory range */
494 u32 global_interrupt_offset;
495 u32 context_interrupt_count;
496 u32 context_interrupt_offset;
497 u32 pmu_interrupt_count;
498 u32 pmu_interrupt_offset;
499 u64 interrupts[]; /* Interrupt array */
502 /* Values for Model field above */
504 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
505 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
506 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
507 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
508 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
509 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
511 /* Masks for Flags field above */
513 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
514 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
516 /* Global interrupt format */
518 struct acpi_iort_smmu_gsi {
522 u32 nsg_cfg_irpt_flags;
525 struct acpi_iort_smmu_v3 {
526 u64 base_address; /* SMMUv3 base address */
536 u32 id_mapping_index;
539 /* Values for Model field above */
541 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
542 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
543 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
545 /* Masks for Flags field above */
547 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
548 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
549 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
550 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
552 struct acpi_iort_pmcg {
553 u64 page0_base_address;
556 u64 page1_base_address;
559 struct acpi_iort_rmr {
565 /* Masks for Flags field above */
566 #define ACPI_IORT_RMR_REMAP_PERMITTED (1)
567 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
570 * Macro to access the Access Attributes in flags field above:
571 * Access Attributes is encoded in bits 9:2
573 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
575 /* Values for above Access Attributes */
577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
578 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
579 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
580 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
581 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
582 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
584 struct acpi_iort_rmr_desc {
590 /*******************************************************************************
592 * IVRS - I/O Virtualization Reporting Structure
595 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
596 * Revision 1.26, February 2009.
598 ******************************************************************************/
600 struct acpi_table_ivrs {
601 struct acpi_table_header header; /* Common ACPI table header */
602 u32 info; /* Common virtualization info */
606 /* Values for Info field above */
608 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
609 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
610 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
612 /* IVRS subtable header */
614 struct acpi_ivrs_header {
615 u8 type; /* Subtable type */
617 u16 length; /* Subtable length */
618 u16 device_id; /* ID of IOMMU */
621 /* Values for subtable Type above */
623 enum acpi_ivrs_type {
624 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
625 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
626 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
627 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
628 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
629 ACPI_IVRS_TYPE_MEMORY3 = 0x22
632 /* Masks for Flags field above for IVHD subtable */
634 #define ACPI_IVHD_TT_ENABLE (1)
635 #define ACPI_IVHD_PASS_PW (1<<1)
636 #define ACPI_IVHD_RES_PASS_PW (1<<2)
637 #define ACPI_IVHD_ISOC (1<<3)
638 #define ACPI_IVHD_IOTLB (1<<4)
640 /* Masks for Flags field above for IVMD subtable */
642 #define ACPI_IVMD_UNITY (1)
643 #define ACPI_IVMD_READ (1<<1)
644 #define ACPI_IVMD_WRITE (1<<2)
645 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
648 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
651 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
653 struct acpi_ivrs_hardware_10 {
654 struct acpi_ivrs_header header;
655 u16 capability_offset; /* Offset for IOMMU control fields */
656 u64 base_address; /* IOMMU control registers */
657 u16 pci_segment_group;
658 u16 info; /* MSI number and unit ID */
659 u32 feature_reporting;
662 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
664 struct acpi_ivrs_hardware_11 {
665 struct acpi_ivrs_header header;
666 u16 capability_offset; /* Offset for IOMMU control fields */
667 u64 base_address; /* IOMMU control registers */
668 u16 pci_segment_group;
669 u16 info; /* MSI number and unit ID */
671 u64 efr_register_image;
675 /* Masks for Info field above */
677 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
678 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
681 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
682 * Upper two bits of the Type field are the (encoded) length of the structure.
683 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
684 * are reserved for future use but not defined.
686 struct acpi_ivrs_de_header {
692 /* Length of device entry is in the top two bits of Type field above */
694 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
696 /* Values for device entry Type field above */
698 enum acpi_ivrs_device_entry_type {
699 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
701 ACPI_IVRS_TYPE_PAD4 = 0,
702 ACPI_IVRS_TYPE_ALL = 1,
703 ACPI_IVRS_TYPE_SELECT = 2,
704 ACPI_IVRS_TYPE_START = 3,
705 ACPI_IVRS_TYPE_END = 4,
707 /* 8-byte device entries */
709 ACPI_IVRS_TYPE_PAD8 = 64,
710 ACPI_IVRS_TYPE_NOT_USED = 65,
711 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
712 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
713 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
714 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
715 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
717 /* Variable-length device entries */
719 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
722 /* Values for Data field above */
724 #define ACPI_IVHD_INIT_PASS (1)
725 #define ACPI_IVHD_EINT_PASS (1<<1)
726 #define ACPI_IVHD_NMI_PASS (1<<2)
727 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
728 #define ACPI_IVHD_LINT0_PASS (1<<6)
729 #define ACPI_IVHD_LINT1_PASS (1<<7)
731 /* Types 0-4: 4-byte device entry */
733 struct acpi_ivrs_device4 {
734 struct acpi_ivrs_de_header header;
737 /* Types 66-67: 8-byte device entry */
739 struct acpi_ivrs_device8a {
740 struct acpi_ivrs_de_header header;
746 /* Types 70-71: 8-byte device entry */
748 struct acpi_ivrs_device8b {
749 struct acpi_ivrs_de_header header;
753 /* Values for extended_data above */
755 #define ACPI_IVHD_ATS_DISABLED (1<<31)
757 /* Type 72: 8-byte device entry */
759 struct acpi_ivrs_device8c {
760 struct acpi_ivrs_de_header header;
766 /* Values for Variety field above */
768 #define ACPI_IVHD_IOAPIC 1
769 #define ACPI_IVHD_HPET 2
771 /* Type 240: variable-length device entry */
773 struct acpi_ivrs_device_hid {
774 struct acpi_ivrs_de_header header;
781 /* Values for uid_type above */
783 #define ACPI_IVRS_UID_NOT_PRESENT 0
784 #define ACPI_IVRS_UID_IS_INTEGER 1
785 #define ACPI_IVRS_UID_IS_STRING 2
787 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
789 struct acpi_ivrs_memory {
790 struct acpi_ivrs_header header;
797 /*******************************************************************************
799 * LPIT - Low Power Idle Table
801 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
803 ******************************************************************************/
805 struct acpi_table_lpit {
806 struct acpi_table_header header; /* Common ACPI table header */
809 /* LPIT subtable header */
811 struct acpi_lpit_header {
812 u32 type; /* Subtable type */
813 u32 length; /* Subtable length */
819 /* Values for subtable Type above */
821 enum acpi_lpit_type {
822 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
823 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
826 /* Masks for Flags field above */
828 #define ACPI_LPIT_STATE_DISABLED (1)
829 #define ACPI_LPIT_NO_COUNTER (1<<1)
832 * LPIT subtables, correspond to Type in struct acpi_lpit_header
835 /* 0x00: Native C-state instruction based LPI structure */
837 struct acpi_lpit_native {
838 struct acpi_lpit_header header;
839 struct acpi_generic_address entry_trigger;
842 struct acpi_generic_address residency_counter;
843 u64 counter_frequency;
846 /*******************************************************************************
848 * MADT - Multiple APIC Description Table
851 ******************************************************************************/
853 struct acpi_table_madt {
854 struct acpi_table_header header; /* Common ACPI table header */
855 u32 address; /* Physical address of local APIC */
859 /* Masks for Flags field above */
861 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
863 /* Values for PCATCompat flag */
865 #define ACPI_MADT_DUAL_PIC 1
866 #define ACPI_MADT_MULTIPLE_APIC 0
868 /* Values for MADT subtable type in struct acpi_subtable_header */
870 enum acpi_madt_type {
871 ACPI_MADT_TYPE_LOCAL_APIC = 0,
872 ACPI_MADT_TYPE_IO_APIC = 1,
873 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
874 ACPI_MADT_TYPE_NMI_SOURCE = 3,
875 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
876 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
877 ACPI_MADT_TYPE_IO_SAPIC = 6,
878 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
879 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
880 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
881 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
882 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
883 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
884 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
885 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
886 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
887 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
888 ACPI_MADT_TYPE_CORE_PIC = 17,
889 ACPI_MADT_TYPE_LIO_PIC = 18,
890 ACPI_MADT_TYPE_HT_PIC = 19,
891 ACPI_MADT_TYPE_EIO_PIC = 20,
892 ACPI_MADT_TYPE_MSI_PIC = 21,
893 ACPI_MADT_TYPE_BIO_PIC = 22,
894 ACPI_MADT_TYPE_LPC_PIC = 23,
895 ACPI_MADT_TYPE_RINTC = 24,
896 ACPI_MADT_TYPE_IMSIC = 25,
897 ACPI_MADT_TYPE_APLIC = 26,
898 ACPI_MADT_TYPE_PLIC = 27,
899 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
900 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
904 * MADT Subtables, correspond to Type in struct acpi_subtable_header
907 /* 0: Processor Local APIC */
909 struct acpi_madt_local_apic {
910 struct acpi_subtable_header header;
911 u8 processor_id; /* ACPI processor id */
912 u8 id; /* Processor's local APIC id */
918 struct acpi_madt_io_apic {
919 struct acpi_subtable_header header;
920 u8 id; /* I/O APIC ID */
921 u8 reserved; /* reserved - must be zero */
922 u32 address; /* APIC physical address */
923 u32 global_irq_base; /* Global system interrupt where INTI lines start */
926 /* 2: Interrupt Override */
928 struct acpi_madt_interrupt_override {
929 struct acpi_subtable_header header;
930 u8 bus; /* 0 - ISA */
931 u8 source_irq; /* Interrupt source (IRQ) */
932 u32 global_irq; /* Global system interrupt */
938 struct acpi_madt_nmi_source {
939 struct acpi_subtable_header header;
941 u32 global_irq; /* Global system interrupt */
944 /* 4: Local APIC NMI */
946 struct acpi_madt_local_apic_nmi {
947 struct acpi_subtable_header header;
948 u8 processor_id; /* ACPI processor id */
950 u8 lint; /* LINTn to which NMI is connected */
953 /* 5: Address Override */
955 struct acpi_madt_local_apic_override {
956 struct acpi_subtable_header header;
957 u16 reserved; /* Reserved, must be zero */
958 u64 address; /* APIC physical address */
963 struct acpi_madt_io_sapic {
964 struct acpi_subtable_header header;
965 u8 id; /* I/O SAPIC ID */
966 u8 reserved; /* Reserved, must be zero */
967 u32 global_irq_base; /* Global interrupt for SAPIC start */
968 u64 address; /* SAPIC physical address */
973 struct acpi_madt_local_sapic {
974 struct acpi_subtable_header header;
975 u8 processor_id; /* ACPI processor id */
976 u8 id; /* SAPIC ID */
977 u8 eid; /* SAPIC EID */
978 u8 reserved[3]; /* Reserved, must be zero */
980 u32 uid; /* Numeric UID - ACPI 3.0 */
981 char uid_string[]; /* String UID - ACPI 3.0 */
984 /* 8: Platform Interrupt Source */
986 struct acpi_madt_interrupt_source {
987 struct acpi_subtable_header header;
989 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
990 u8 id; /* Processor ID */
991 u8 eid; /* Processor EID */
992 u8 io_sapic_vector; /* Vector value for PMI interrupts */
993 u32 global_irq; /* Global system interrupt */
994 u32 flags; /* Interrupt Source Flags */
997 /* Masks for Flags field above */
999 #define ACPI_MADT_CPEI_OVERRIDE (1)
1001 /* 9: Processor Local X2APIC (ACPI 4.0) */
1003 struct acpi_madt_local_x2apic {
1004 struct acpi_subtable_header header;
1005 u16 reserved; /* reserved - must be zero */
1006 u32 local_apic_id; /* Processor x2APIC ID */
1008 u32 uid; /* ACPI processor UID */
1011 /* 10: Local X2APIC NMI (ACPI 4.0) */
1013 struct acpi_madt_local_x2apic_nmi {
1014 struct acpi_subtable_header header;
1016 u32 uid; /* ACPI processor UID */
1017 u8 lint; /* LINTn to which NMI is connected */
1018 u8 reserved[3]; /* reserved - must be zero */
1021 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1023 struct acpi_madt_generic_interrupt {
1024 struct acpi_subtable_header header;
1025 u16 reserved; /* reserved - must be zero */
1026 u32 cpu_interface_number;
1029 u32 parking_version;
1030 u32 performance_interrupt;
1033 u64 gicv_base_address;
1034 u64 gich_base_address;
1036 u64 gicr_base_address;
1038 u8 efficiency_class;
1040 u16 spe_interrupt; /* ACPI 6.3 */
1041 u16 trbe_interrupt; /* ACPI 6.5 */
1044 /* Masks for Flags field above */
1046 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
1047 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1048 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1049 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1050 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1052 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1054 struct acpi_madt_generic_distributor {
1055 struct acpi_subtable_header header;
1056 u16 reserved; /* reserved - must be zero */
1059 u32 global_irq_base;
1061 u8 reserved2[3]; /* reserved - must be zero */
1064 /* Values for Version field above */
1066 enum acpi_madt_gic_version {
1067 ACPI_MADT_GIC_VERSION_NONE = 0,
1068 ACPI_MADT_GIC_VERSION_V1 = 1,
1069 ACPI_MADT_GIC_VERSION_V2 = 2,
1070 ACPI_MADT_GIC_VERSION_V3 = 3,
1071 ACPI_MADT_GIC_VERSION_V4 = 4,
1072 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1075 /* 13: Generic MSI Frame (ACPI 5.1) */
1077 struct acpi_madt_generic_msi_frame {
1078 struct acpi_subtable_header header;
1079 u16 reserved; /* reserved - must be zero */
1087 /* Masks for Flags field above */
1089 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1091 /* 14: Generic Redistributor (ACPI 5.1) */
1093 struct acpi_madt_generic_redistributor {
1094 struct acpi_subtable_header header;
1096 u8 reserved; /* reserved - must be zero */
1101 #define ACPI_MADT_GICR_NON_COHERENT (1)
1103 /* 15: Generic Translator (ACPI 6.0) */
1105 struct acpi_madt_generic_translator {
1106 struct acpi_subtable_header header;
1108 u8 reserved; /* reserved - must be zero */
1114 #define ACPI_MADT_ITS_NON_COHERENT (1)
1116 /* 16: Multiprocessor wakeup (ACPI 6.4) */
1118 struct acpi_madt_multiproc_wakeup {
1119 struct acpi_subtable_header header;
1120 u16 mailbox_version;
1121 u32 reserved; /* reserved - must be zero */
1125 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1126 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1128 struct acpi_madt_multiproc_wakeup_mailbox {
1130 u16 reserved; /* reserved - must be zero */
1133 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1134 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1137 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1139 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1141 struct acpi_madt_core_pic {
1142 struct acpi_subtable_header header;
1149 /* Values for Version field above */
1151 enum acpi_madt_core_pic_version {
1152 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1153 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1154 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1157 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1159 struct acpi_madt_lio_pic {
1160 struct acpi_subtable_header header;
1168 /* Values for Version field above */
1170 enum acpi_madt_lio_pic_version {
1171 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1172 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1173 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1176 /* 19: HT Interrupt Controller (ACPI 6.5) */
1178 struct acpi_madt_ht_pic {
1179 struct acpi_subtable_header header;
1186 /* Values for Version field above */
1188 enum acpi_madt_ht_pic_version {
1189 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1190 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1191 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1194 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1196 struct acpi_madt_eio_pic {
1197 struct acpi_subtable_header header;
1204 /* Values for Version field above */
1206 enum acpi_madt_eio_pic_version {
1207 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1208 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1209 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1212 /* 21: MSI Interrupt Controller (ACPI 6.5) */
1214 struct acpi_madt_msi_pic {
1215 struct acpi_subtable_header header;
1222 /* Values for Version field above */
1224 enum acpi_madt_msi_pic_version {
1225 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1226 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1227 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1230 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1232 struct acpi_madt_bio_pic {
1233 struct acpi_subtable_header header;
1241 /* Values for Version field above */
1243 enum acpi_madt_bio_pic_version {
1244 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1245 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1246 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1249 /* 23: LPC Interrupt Controller (ACPI 6.5) */
1251 struct acpi_madt_lpc_pic {
1252 struct acpi_subtable_header header;
1259 /* Values for Version field above */
1261 enum acpi_madt_lpc_pic_version {
1262 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1263 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1264 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1267 /* 24: RISC-V INTC */
1268 struct acpi_madt_rintc {
1269 struct acpi_subtable_header header;
1274 u32 uid; /* ACPI processor UID */
1275 u32 ext_intc_id; /* External INTC Id */
1276 u64 imsic_addr; /* IMSIC base address */
1277 u32 imsic_size; /* IMSIC size */
1280 /* Values for RISC-V INTC Version field above */
1282 enum acpi_madt_rintc_version {
1283 ACPI_MADT_RINTC_VERSION_NONE = 0,
1284 ACPI_MADT_RINTC_VERSION_V1 = 1,
1285 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1288 /* 25: RISC-V IMSIC */
1289 struct acpi_madt_imsic {
1290 struct acpi_subtable_header header;
1296 u8 guest_index_bits;
1298 u8 group_index_bits;
1299 u8 group_index_shift;
1302 /* 26: RISC-V APLIC */
1303 struct acpi_madt_aplic {
1304 struct acpi_subtable_header header;
1316 /* 27: RISC-V PLIC */
1317 struct acpi_madt_plic {
1318 struct acpi_subtable_header header;
1332 struct acpi_madt_oem_data {
1333 ACPI_FLEX_ARRAY(u8, oem_data);
1337 * Common flags fields for MADT subtables
1340 /* MADT Local APIC flags */
1342 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1343 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1345 /* MADT MPS INTI flags (inti_flags) */
1347 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1348 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1350 /* Values for MPS INTI flags */
1352 #define ACPI_MADT_POLARITY_CONFORMS 0
1353 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1354 #define ACPI_MADT_POLARITY_RESERVED 2
1355 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1357 #define ACPI_MADT_TRIGGER_CONFORMS (0)
1358 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
1359 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1360 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1362 /*******************************************************************************
1364 * MCFG - PCI Memory Mapped Configuration table and subtable
1367 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1369 ******************************************************************************/
1371 struct acpi_table_mcfg {
1372 struct acpi_table_header header; /* Common ACPI table header */
1378 struct acpi_mcfg_allocation {
1379 u64 address; /* Base address, processor-relative */
1380 u16 pci_segment; /* PCI segment group number */
1381 u8 start_bus_number; /* Starting PCI Bus number */
1382 u8 end_bus_number; /* Final PCI Bus number */
1386 /*******************************************************************************
1388 * MCHI - Management Controller Host Interface Table
1391 * Conforms to "Management Component Transport Protocol (MCTP) Host
1392 * Interface Specification", Revision 1.0.0a, October 13, 2009
1394 ******************************************************************************/
1396 struct acpi_table_mchi {
1397 struct acpi_table_header header; /* Common ACPI table header */
1404 u32 global_interrupt;
1405 struct acpi_generic_address control_register;
1412 /*******************************************************************************
1414 * MPAM - Memory System Resource Partitioning and Monitoring
1416 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1417 * Document number: ARM DEN 0065, December, 2022.
1419 ******************************************************************************/
1421 /* MPAM RIS locator types. Table 11, Location types */
1422 enum acpi_mpam_locator_type {
1423 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1424 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1425 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1426 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1427 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1428 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1429 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1432 /* MPAM Functional dependency descriptor. Table 10 */
1433 struct acpi_mpam_func_deps {
1438 /* MPAM Processor cache locator descriptor. Table 13 */
1439 struct acpi_mpam_resource_cache_locator {
1440 u64 cache_reference;
1444 /* MPAM Memory locator descriptor. Table 14 */
1445 struct acpi_mpam_resource_memory_locator {
1446 u64 proximity_domain;
1450 /* MPAM SMMU locator descriptor. Table 15 */
1451 struct acpi_mpam_resource_smmu_locator {
1456 /* MPAM Memory-side cache locator descriptor. Table 16 */
1457 struct acpi_mpam_resource_memcache_locator {
1463 /* MPAM ACPI device locator descriptor. Table 17 */
1464 struct acpi_mpam_resource_acpi_locator {
1469 /* MPAM Interconnect locator descriptor. Table 18 */
1470 struct acpi_mpam_resource_interconnect_locator {
1471 u64 inter_connect_desc_tbl_off;
1475 /* MPAM Locator structure. Table 12 */
1476 struct acpi_mpam_resource_generic_locator {
1481 union acpi_mpam_resource_locator {
1482 struct acpi_mpam_resource_cache_locator cache_locator;
1483 struct acpi_mpam_resource_memory_locator memory_locator;
1484 struct acpi_mpam_resource_smmu_locator smmu_locator;
1485 struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1486 struct acpi_mpam_resource_acpi_locator acpi_locator;
1487 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1488 struct acpi_mpam_resource_generic_locator generic_locator;
1491 /* Memory System Component Resource Node Structure Table 9 */
1492 struct acpi_mpam_resource_node {
1497 union acpi_mpam_resource_locator locator;
1498 u32 num_functional_deps;
1501 /* Memory System Component (MSC) Node Structure. Table 4 */
1502 struct acpi_mpam_msc_node {
1509 u32 overflow_interrupt;
1510 u32 overflow_interrupt_flags;
1512 u32 overflow_interrupt_affinity;
1513 u32 error_interrupt;
1514 u32 error_interrupt_flags;
1516 u32 error_interrupt_affinity;
1518 u64 hardware_id_linked_device;
1519 u32 instance_id_linked_device;
1520 u32 num_resouce_nodes;
1523 struct acpi_table_mpam {
1524 struct acpi_table_header header; /* Common ACPI table header */
1527 /*******************************************************************************
1529 * MPST - Memory Power State Table (ACPI 5.0)
1532 ******************************************************************************/
1534 #define ACPI_MPST_CHANNEL_INFO \
1537 u16 power_node_count; \
1542 struct acpi_table_mpst {
1543 struct acpi_table_header header; /* Common ACPI table header */
1544 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1547 /* Memory Platform Communication Channel Info */
1549 struct acpi_mpst_channel {
1550 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1553 /* Memory Power Node Structure */
1555 struct acpi_mpst_power_node {
1562 u32 num_power_states;
1563 u32 num_physical_components;
1566 /* Values for Flags field above */
1568 #define ACPI_MPST_ENABLED 1
1569 #define ACPI_MPST_POWER_MANAGED 2
1570 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1572 /* Memory Power State Structure (follows POWER_NODE above) */
1574 struct acpi_mpst_power_state {
1579 /* Physical Component ID Structure (follows POWER_STATE above) */
1581 struct acpi_mpst_component {
1585 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1587 struct acpi_mpst_data_hdr {
1588 u16 characteristics_count;
1592 struct acpi_mpst_power_data {
1602 /* Values for Flags field above */
1604 #define ACPI_MPST_PRESERVE 1
1605 #define ACPI_MPST_AUTOENTRY 2
1606 #define ACPI_MPST_AUTOEXIT 4
1608 /* Shared Memory Region (not part of an ACPI table) */
1610 struct acpi_mpst_shared {
1614 u32 command_register;
1615 u32 status_register;
1618 u64 energy_consumed;
1622 /*******************************************************************************
1624 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1627 ******************************************************************************/
1629 struct acpi_table_msct {
1630 struct acpi_table_header header; /* Common ACPI table header */
1631 u32 proximity_offset; /* Location of proximity info struct(s) */
1632 u32 max_proximity_domains; /* Max number of proximity domains */
1633 u32 max_clock_domains; /* Max number of clock domains */
1634 u64 max_address; /* Max physical address in system */
1637 /* subtable - Maximum Proximity Domain Information. Version 1 */
1639 struct acpi_msct_proximity {
1642 u32 range_start; /* Start of domain range */
1643 u32 range_end; /* End of domain range */
1644 u32 processor_capacity;
1645 u64 memory_capacity; /* In bytes */
1648 /*******************************************************************************
1650 * MSDM - Microsoft Data Management table
1652 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1653 * November 29, 2011. Copyright 2011 Microsoft
1655 ******************************************************************************/
1657 /* Basic MSDM table is only the common ACPI header */
1659 struct acpi_table_msdm {
1660 struct acpi_table_header header; /* Common ACPI table header */
1663 /*******************************************************************************
1665 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1668 ******************************************************************************/
1670 struct acpi_table_nfit {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672 u32 reserved; /* Reserved, must be zero */
1675 /* Subtable header for NFIT */
1677 struct acpi_nfit_header {
1682 /* Values for subtable type in struct acpi_nfit_header */
1684 enum acpi_nfit_type {
1685 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1686 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1687 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1688 ACPI_NFIT_TYPE_SMBIOS = 3,
1689 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1690 ACPI_NFIT_TYPE_DATA_REGION = 5,
1691 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1692 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1693 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1700 /* 0: System Physical Address Range Structure */
1702 struct acpi_nfit_system_address {
1703 struct acpi_nfit_header header;
1706 u32 reserved; /* Reserved, must be zero */
1707 u32 proximity_domain;
1712 u64 location_cookie; /* ACPI 6.4 */
1717 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1718 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1719 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1721 /* Range Type GUIDs appear in the include/acuuid.h file */
1723 /* 1: Memory Device to System Address Range Map Structure */
1725 struct acpi_nfit_memory_map {
1726 struct acpi_nfit_header header;
1735 u16 interleave_index;
1736 u16 interleave_ways;
1738 u16 reserved; /* Reserved, must be zero */
1743 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1744 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1745 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1746 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1747 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1748 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1749 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1751 /* 2: Interleave Structure */
1753 struct acpi_nfit_interleave {
1754 struct acpi_nfit_header header;
1755 u16 interleave_index;
1756 u16 reserved; /* Reserved, must be zero */
1759 u32 line_offset[]; /* Variable length */
1762 /* 3: SMBIOS Management Information Structure */
1764 struct acpi_nfit_smbios {
1765 struct acpi_nfit_header header;
1766 u32 reserved; /* Reserved, must be zero */
1767 u8 data[]; /* Variable length */
1770 /* 4: NVDIMM Control Region Structure */
1772 struct acpi_nfit_control_region {
1773 struct acpi_nfit_header header;
1778 u16 subsystem_vendor_id;
1779 u16 subsystem_device_id;
1780 u16 subsystem_revision_id;
1782 u8 manufacturing_location;
1783 u16 manufacturing_date;
1784 u8 reserved[2]; /* Reserved, must be zero */
1794 u8 reserved1[6]; /* Reserved, must be zero */
1799 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1801 /* valid_fields bits */
1803 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1805 /* 5: NVDIMM Block Data Window Region Structure */
1807 struct acpi_nfit_data_region {
1808 struct acpi_nfit_header header;
1817 /* 6: Flush Hint Address Structure */
1819 struct acpi_nfit_flush_address {
1820 struct acpi_nfit_header header;
1823 u8 reserved[6]; /* Reserved, must be zero */
1824 u64 hint_address[]; /* Variable length */
1827 /* 7: Platform Capabilities Structure */
1829 struct acpi_nfit_capabilities {
1830 struct acpi_nfit_header header;
1831 u8 highest_capability;
1832 u8 reserved[3]; /* Reserved, must be zero */
1837 /* Capabilities Flags */
1839 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1840 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1841 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1844 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1846 struct nfit_device_handle {
1850 /* Device handle construction and extraction macros */
1852 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1853 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1854 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1855 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1856 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1858 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1859 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1860 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1861 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1862 #define ACPI_NFIT_NODE_ID_OFFSET 16
1864 /* Macro to construct a NFIT/NVDIMM device handle */
1866 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1868 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1869 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1870 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1871 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1873 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1875 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1876 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1878 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1879 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1881 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1882 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1884 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1885 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1887 #define ACPI_NFIT_GET_NODE_ID(handle) \
1888 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1890 /*******************************************************************************
1892 * NHLT - Non HD Audio Link Table
1894 * Conforms to: Intel Smart Sound Technology NHLT Specification
1895 * Version 0.8.1, January 2020.
1897 ******************************************************************************/
1901 struct acpi_table_nhlt {
1902 struct acpi_table_header header; /* Common ACPI table header */
1906 struct acpi_nhlt_endpoint {
1907 u32 descriptor_length;
1919 /* Types for link_type field above */
1921 #define ACPI_NHLT_RESERVED_HD_AUDIO 0
1922 #define ACPI_NHLT_RESERVED_DSP 1
1923 #define ACPI_NHLT_PDM 2
1924 #define ACPI_NHLT_SSP 3
1925 #define ACPI_NHLT_RESERVED_SLIMBUS 4
1926 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1927 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1929 /* All other values above are reserved */
1931 /* Values for device_id field above */
1933 #define ACPI_NHLT_PDM_DMIC 0xAE20
1934 #define ACPI_NHLT_BT_SIDEBAND 0xAE30
1935 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1937 /* Values for device_type field above */
1941 #define ACPI_NHLT_LINK_BT_SIDEBAND 0
1942 #define ACPI_NHLT_LINK_FM 1
1943 #define ACPI_NHLT_LINK_MODEM 2
1945 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1949 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1950 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1952 /* Values for Direction field above */
1954 #define ACPI_NHLT_DIR_RENDER 0
1955 #define ACPI_NHLT_DIR_CAPTURE 1
1956 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1957 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1958 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1960 struct acpi_nhlt_device_specific_config {
1961 u32 capabilities_size;
1966 struct acpi_nhlt_device_specific_config_a {
1967 u32 capabilities_size;
1973 /* Values for Config Type above */
1975 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00
1976 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01
1977 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03
1978 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */
1980 struct acpi_nhlt_device_specific_config_b {
1981 u32 capabilities_size;
1984 struct acpi_nhlt_device_specific_config_c {
1985 u32 capabilities_size;
1989 struct acpi_nhlt_render_device_specific_config {
1990 u32 capabilities_size;
1994 struct acpi_nhlt_wave_extensible {
1997 u32 samples_per_sec;
1998 u32 avg_bytes_per_sec;
2000 u16 bits_per_sample;
2001 u16 extra_format_size;
2002 u16 valid_bits_per_sample;
2004 u8 sub_format_guid[16];
2007 /* Values for channel_mask above */
2009 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
2010 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
2011 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
2012 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8
2013 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10
2014 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
2015 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
2016 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
2017 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100
2018 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
2019 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
2020 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800
2021 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
2022 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
2023 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
2024 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
2025 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
2026 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
2028 struct acpi_nhlt_format_config {
2029 struct acpi_nhlt_wave_extensible format;
2030 u32 capability_size;
2034 struct acpi_nhlt_formats_config {
2038 struct acpi_nhlt_device_specific_hdr {
2043 /* Types for config_type above */
2045 #define ACPI_NHLT_GENERIC 0
2046 #define ACPI_NHLT_MIC 1
2047 #define ACPI_NHLT_RENDER 3
2049 struct acpi_nhlt_mic_device_specific_config {
2050 struct acpi_nhlt_device_specific_hdr device_config;
2054 /* Values for array_type_ext above */
2056 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */
2057 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A
2058 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B
2059 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
2060 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D
2061 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
2062 #define ACPI_NHLT_VENDOR_DEFINED 0x0F
2063 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F
2064 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10
2066 #define ACPI_NHLT_NO_EXTENSION 0x0
2067 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4)
2069 struct acpi_nhlt_vendor_mic_count {
2070 u8 microphone_count;
2073 struct acpi_nhlt_vendor_mic_config {
2076 u16 speaker_position_distance; /* mm */
2077 u16 horizontal_offset; /* mm */
2078 u16 vertical_offset; /* mm */
2079 u8 frequency_low_band; /* 5*Hz */
2080 u8 frequency_high_band; /* 500*Hz */
2081 u16 direction_angle; /* -180 - + 180 */
2082 u16 elevation_angle; /* -180 - + 180 */
2083 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */
2084 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */
2085 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */
2086 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */
2089 /* Values for Type field above */
2091 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0
2092 #define ACPI_NHLT_MIC_SUBCARDIOID 1
2093 #define ACPI_NHLT_MIC_CARDIOID 2
2094 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3
2095 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4
2096 #define ACPI_NHLT_MIC_8_SHAPED 5
2097 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */
2098 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7
2099 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */
2101 /* Values for Panel field above */
2103 #define ACPI_NHLT_MIC_POSITION_TOP 0
2104 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1
2105 #define ACPI_NHLT_MIC_POSITION_LEFT 2
2106 #define ACPI_NHLT_MIC_POSITION_RIGHT 3
2107 #define ACPI_NHLT_MIC_POSITION_FRONT 4
2108 #define ACPI_NHLT_MIC_POSITION_BACK 5
2109 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */
2111 struct acpi_nhlt_vendor_mic_device_specific_config {
2112 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
2113 u8 number_of_microphones;
2114 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */
2117 /* Microphone SNR and Sensitivity extension */
2119 struct acpi_nhlt_mic_snr_sensitivity_extension {
2124 /* Render device with feedback */
2126 struct acpi_nhlt_render_feedback_device_specific_config {
2127 u8 feedback_virtual_slot; /* Render slot in case of capture */
2128 u16 feedback_channels; /* Informative only */
2129 u16 feedback_valid_bits_per_sample;
2132 /* Non documented structures */
2134 struct acpi_nhlt_device_info_count {
2138 struct acpi_nhlt_device_info {
2140 u8 device_instance_id;
2144 /*******************************************************************************
2146 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2147 * Version 2 (ACPI 6.2)
2149 ******************************************************************************/
2151 struct acpi_table_pcct {
2152 struct acpi_table_header header; /* Common ACPI table header */
2157 /* Values for Flags field above */
2159 #define ACPI_PCCT_DOORBELL 1
2161 /* Values for subtable type in struct acpi_subtable_header */
2163 enum acpi_pcct_type {
2164 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2165 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2166 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2167 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2168 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2169 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2170 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2174 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
2177 /* 0: Generic Communications Subspace */
2179 struct acpi_pcct_subspace {
2180 struct acpi_subtable_header header;
2184 struct acpi_generic_address doorbell_register;
2188 u32 max_access_rate;
2189 u16 min_turnaround_time;
2192 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2194 struct acpi_pcct_hw_reduced {
2195 struct acpi_subtable_header header;
2196 u32 platform_interrupt;
2201 struct acpi_generic_address doorbell_register;
2205 u32 max_access_rate;
2206 u16 min_turnaround_time;
2209 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2211 struct acpi_pcct_hw_reduced_type2 {
2212 struct acpi_subtable_header header;
2213 u32 platform_interrupt;
2218 struct acpi_generic_address doorbell_register;
2222 u32 max_access_rate;
2223 u16 min_turnaround_time;
2224 struct acpi_generic_address platform_ack_register;
2225 u64 ack_preserve_mask;
2229 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2231 struct acpi_pcct_ext_pcc_master {
2232 struct acpi_subtable_header header;
2233 u32 platform_interrupt;
2238 struct acpi_generic_address doorbell_register;
2242 u32 max_access_rate;
2243 u32 min_turnaround_time;
2244 struct acpi_generic_address platform_ack_register;
2245 u64 ack_preserve_mask;
2248 struct acpi_generic_address cmd_complete_register;
2249 u64 cmd_complete_mask;
2250 struct acpi_generic_address cmd_update_register;
2251 u64 cmd_update_preserve_mask;
2252 u64 cmd_update_set_mask;
2253 struct acpi_generic_address error_status_register;
2254 u64 error_status_mask;
2257 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2259 struct acpi_pcct_ext_pcc_slave {
2260 struct acpi_subtable_header header;
2261 u32 platform_interrupt;
2266 struct acpi_generic_address doorbell_register;
2270 u32 max_access_rate;
2271 u32 min_turnaround_time;
2272 struct acpi_generic_address platform_ack_register;
2273 u64 ack_preserve_mask;
2276 struct acpi_generic_address cmd_complete_register;
2277 u64 cmd_complete_mask;
2278 struct acpi_generic_address cmd_update_register;
2279 u64 cmd_update_preserve_mask;
2280 u64 cmd_update_set_mask;
2281 struct acpi_generic_address error_status_register;
2282 u64 error_status_mask;
2285 /* 5: HW Registers based Communications Subspace */
2287 struct acpi_pcct_hw_reg {
2288 struct acpi_subtable_header header;
2292 struct acpi_generic_address doorbell_register;
2293 u64 doorbell_preserve;
2295 struct acpi_generic_address cmd_complete_register;
2296 u64 cmd_complete_mask;
2297 struct acpi_generic_address error_status_register;
2298 u64 error_status_mask;
2299 u32 nominal_latency;
2300 u32 min_turnaround_time;
2303 /* Values for doorbell flags above */
2305 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
2306 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2309 * PCC memory structures (not part of the ACPI table)
2312 /* Shared Memory Region */
2314 struct acpi_pcct_shared_memory {
2320 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2322 struct acpi_pcct_ext_pcc_shared_memory {
2329 /*******************************************************************************
2331 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2334 ******************************************************************************/
2336 struct acpi_table_pdtt {
2337 struct acpi_table_header header; /* Common ACPI table header */
2344 * PDTT Communication Channel Identifier Structure.
2345 * The number of these structures is defined by trigger_count above,
2346 * starting at array_offset.
2348 struct acpi_pdtt_channel {
2353 /* Flags for above */
2355 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
2356 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2357 #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2359 /*******************************************************************************
2361 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2364 ******************************************************************************/
2366 struct acpi_table_phat {
2367 struct acpi_table_header header; /* Common ACPI table header */
2370 /* Common header for PHAT subtables that follow main table */
2372 struct acpi_phat_header {
2378 /* Values for Type field above */
2380 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2381 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2382 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2385 * PHAT subtables, correspond to Type in struct acpi_phat_header
2388 /* 0: Firmware Version Data Record */
2390 struct acpi_phat_version_data {
2391 struct acpi_phat_header header;
2396 struct acpi_phat_version_element {
2402 /* 1: Firmware Health Data Record */
2404 struct acpi_phat_health_data {
2405 struct acpi_phat_header header;
2409 u32 device_specific_offset; /* Zero if no Device-specific data */
2412 /* Values for Health field above */
2414 #define ACPI_PHAT_ERRORS_FOUND 0
2415 #define ACPI_PHAT_NO_ERRORS 1
2416 #define ACPI_PHAT_UNKNOWN_ERRORS 2
2417 #define ACPI_PHAT_ADVISORY 3
2419 /*******************************************************************************
2421 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2424 ******************************************************************************/
2426 struct acpi_table_pmtt {
2427 struct acpi_table_header header; /* Common ACPI table header */
2428 u32 memory_device_count;
2430 * Immediately followed by:
2431 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2435 /* Common header for PMTT subtables that follow main table */
2437 struct acpi_pmtt_header {
2443 u32 memory_device_count; /* Zero means no memory device structs follow */
2445 * Immediately followed by:
2446 * u8 type_specific_data[]
2447 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2451 /* Values for Type field above */
2453 #define ACPI_PMTT_TYPE_SOCKET 0
2454 #define ACPI_PMTT_TYPE_CONTROLLER 1
2455 #define ACPI_PMTT_TYPE_DIMM 2
2456 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2457 #define ACPI_PMTT_TYPE_VENDOR 0xFF
2459 /* Values for Flags field above */
2461 #define ACPI_PMTT_TOP_LEVEL 0x0001
2462 #define ACPI_PMTT_PHYSICAL 0x0002
2463 #define ACPI_PMTT_MEMORY_TYPE 0x000C
2466 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2469 /* 0: Socket Structure */
2471 struct acpi_pmtt_socket {
2472 struct acpi_pmtt_header header;
2477 * Immediately followed by:
2478 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2481 /* 1: Memory Controller subtable */
2483 struct acpi_pmtt_controller {
2484 struct acpi_pmtt_header header;
2489 * Immediately followed by:
2490 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2493 /* 2: Physical Component Identifier (DIMM) */
2495 struct acpi_pmtt_physical_component {
2496 struct acpi_pmtt_header header;
2500 /* 0xFF: Vendor Specific Data */
2502 struct acpi_pmtt_vendor_specific {
2503 struct acpi_pmtt_header header;
2507 * Immediately followed by:
2508 * u8 vendor_specific_data[];
2509 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2513 /*******************************************************************************
2515 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2518 ******************************************************************************/
2520 struct acpi_table_pptt {
2521 struct acpi_table_header header; /* Common ACPI table header */
2524 /* Values for Type field above */
2526 enum acpi_pptt_type {
2527 ACPI_PPTT_TYPE_PROCESSOR = 0,
2528 ACPI_PPTT_TYPE_CACHE = 1,
2529 ACPI_PPTT_TYPE_ID = 2,
2530 ACPI_PPTT_TYPE_RESERVED = 3
2533 /* 0: Processor Hierarchy Node Structure */
2535 struct acpi_pptt_processor {
2536 struct acpi_subtable_header header;
2540 u32 acpi_processor_id;
2541 u32 number_of_priv_resources;
2546 #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2547 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2548 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2549 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2550 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2552 /* 1: Cache Type Structure */
2554 struct acpi_pptt_cache {
2555 struct acpi_subtable_header header;
2558 u32 next_level_of_cache;
2566 /* 1: Cache Type Structure for PPTT version 3 */
2568 struct acpi_pptt_cache_v1 {
2574 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2575 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2576 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2577 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2578 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2579 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2580 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2581 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2583 /* Masks for Attributes */
2585 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2586 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2587 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2589 /* Attributes describing cache */
2590 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2591 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2592 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2593 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2595 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2596 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2597 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2598 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2600 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2601 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2603 /* 2: ID Structure */
2605 struct acpi_pptt_id {
2606 struct acpi_subtable_header header;
2616 /*******************************************************************************
2618 * PRMT - Platform Runtime Mechanism Table
2621 ******************************************************************************/
2623 struct acpi_table_prmt {
2624 struct acpi_table_header header; /* Common ACPI table header */
2627 struct acpi_table_prmt_header {
2628 u8 platform_guid[16];
2629 u32 module_info_offset;
2630 u32 module_info_count;
2633 struct acpi_prmt_module_header {
2638 struct acpi_prmt_module_info {
2644 u16 handler_info_count;
2645 u32 handler_info_offset;
2646 u64 mmio_list_pointer;
2649 struct acpi_prmt_handler_info {
2652 u8 handler_guid[16];
2653 u64 handler_address;
2654 u64 static_data_buffer_address;
2655 u64 acpi_param_buffer_address;
2658 /*******************************************************************************
2660 * RASF - RAS Feature Table (ACPI 5.0)
2663 ******************************************************************************/
2665 struct acpi_table_rasf {
2666 struct acpi_table_header header; /* Common ACPI table header */
2670 /* RASF Platform Communication Channel Shared Memory Region */
2672 struct acpi_rasf_shared_memory {
2677 u8 capabilities[16];
2678 u8 set_capabilities[16];
2679 u16 num_parameter_blocks;
2680 u32 set_capabilities_status;
2683 /* RASF Parameter Block Structure Header */
2685 struct acpi_rasf_parameter_block {
2691 /* RASF Parameter Block Structure for PATROL_SCRUB */
2693 struct acpi_rasf_patrol_scrub_parameter {
2694 struct acpi_rasf_parameter_block header;
2695 u16 patrol_scrub_command;
2696 u64 requested_address_range[2];
2697 u64 actual_address_range[2];
2702 /* Masks for Flags and Speed fields above */
2704 #define ACPI_RASF_SCRUBBER_RUNNING 1
2705 #define ACPI_RASF_SPEED (7<<1)
2706 #define ACPI_RASF_SPEED_SLOW (0<<1)
2707 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
2708 #define ACPI_RASF_SPEED_FAST (7<<1)
2710 /* Channel Commands */
2712 enum acpi_rasf_commands {
2713 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2716 /* Platform RAS Capabilities */
2718 enum acpi_rasf_capabiliities {
2719 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2720 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2723 /* Patrol Scrub Commands */
2725 enum acpi_rasf_patrol_scrub_commands {
2726 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2727 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2728 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2731 /* Channel Command flags */
2733 #define ACPI_RASF_GENERATE_SCI (1<<15)
2737 enum acpi_rasf_status {
2738 ACPI_RASF_SUCCESS = 0,
2739 ACPI_RASF_NOT_VALID = 1,
2740 ACPI_RASF_NOT_SUPPORTED = 2,
2742 ACPI_RASF_FAILED = 4,
2743 ACPI_RASF_ABORTED = 5,
2744 ACPI_RASF_INVALID_DATA = 6
2749 #define ACPI_RASF_COMMAND_COMPLETE (1)
2750 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2751 #define ACPI_RASF_ERROR (1<<2)
2752 #define ACPI_RASF_STATUS (0x1F<<3)
2754 /*******************************************************************************
2756 * RGRT - Regulatory Graphics Resource Table
2759 * Conforms to "ACPI RGRT" available at:
2760 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2762 ******************************************************************************/
2764 struct acpi_table_rgrt {
2765 struct acpi_table_header header; /* Common ACPI table header */
2772 /* image_type values */
2774 enum acpi_rgrt_image_type {
2775 ACPI_RGRT_TYPE_RESERVED0 = 0,
2776 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2777 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2780 /*******************************************************************************
2782 * RHCT - RISC-V Hart Capabilities Table
2785 ******************************************************************************/
2787 struct acpi_table_rhct {
2788 struct acpi_table_header header; /* Common ACPI table header */
2789 u32 flags; /* RHCT flags */
2797 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
2801 struct acpi_rhct_node_header {
2807 /* Values for RHCT subtable Type above */
2809 enum acpi_rhct_node_type {
2810 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
2811 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
2812 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
2813 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
2814 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
2818 * RHCT node specific subtables
2821 /* ISA string node structure */
2822 struct acpi_rhct_isa_string {
2827 struct acpi_rhct_cmo_node {
2828 u8 reserved; /* Must be zero */
2829 u8 cbom_size; /* CBOM size in powerof 2 */
2830 u8 cbop_size; /* CBOP size in powerof 2 */
2831 u8 cboz_size; /* CBOZ size in powerof 2 */
2834 struct acpi_rhct_mmu_node {
2835 u8 reserved; /* Must be zero */
2836 u8 mmu_type; /* Virtual Address Scheme */
2839 enum acpi_rhct_mmu_type {
2840 ACPI_RHCT_MMU_TYPE_SV39 = 0,
2841 ACPI_RHCT_MMU_TYPE_SV48 = 1,
2842 ACPI_RHCT_MMU_TYPE_SV57 = 2
2845 /* Hart Info node structure */
2846 struct acpi_rhct_hart_info {
2848 u32 uid; /* ACPI processor UID */
2851 /*******************************************************************************
2853 * SBST - Smart Battery Specification Table
2856 ******************************************************************************/
2858 struct acpi_table_sbst {
2859 struct acpi_table_header header; /* Common ACPI table header */
2865 /*******************************************************************************
2867 * SDEI - Software Delegated Exception Interface Descriptor Table
2869 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2870 * May 8th, 2017. Copyright 2017 ARM Ltd.
2872 ******************************************************************************/
2874 struct acpi_table_sdei {
2875 struct acpi_table_header header; /* Common ACPI table header */
2878 /*******************************************************************************
2880 * SDEV - Secure Devices Table (ACPI 6.2)
2883 ******************************************************************************/
2885 struct acpi_table_sdev {
2886 struct acpi_table_header header; /* Common ACPI table header */
2889 struct acpi_sdev_header {
2895 /* Values for subtable type above */
2897 enum acpi_sdev_type {
2898 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2899 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2900 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2903 /* Values for flags above */
2905 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2906 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2912 /* 0: Namespace Device Based Secure Device Structure */
2914 struct acpi_sdev_namespace {
2915 struct acpi_sdev_header header;
2916 u16 device_id_offset;
2917 u16 device_id_length;
2918 u16 vendor_data_offset;
2919 u16 vendor_data_length;
2922 struct acpi_sdev_secure_component {
2923 u16 secure_component_offset;
2924 u16 secure_component_length;
2928 * SDEV sub-subtables ("Components") for above
2930 struct acpi_sdev_component {
2931 struct acpi_sdev_header header;
2934 /* Values for sub-subtable type above */
2936 enum acpi_sac_type {
2937 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2938 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2941 struct acpi_sdev_id_component {
2942 struct acpi_sdev_header header;
2943 u16 hardware_id_offset;
2944 u16 hardware_id_length;
2945 u16 subsystem_id_offset;
2946 u16 subsystem_id_length;
2947 u16 hardware_revision;
2948 u8 hardware_rev_present;
2949 u8 class_code_present;
2952 u8 pci_programming_xface;
2955 struct acpi_sdev_mem_component {
2956 struct acpi_sdev_header header;
2958 u64 memory_base_address;
2962 /* 1: PCIe Endpoint Device Based Device Structure */
2964 struct acpi_sdev_pcie {
2965 struct acpi_sdev_header header;
2970 u16 vendor_data_offset;
2971 u16 vendor_data_length;
2974 /* 1a: PCIe Endpoint path entry */
2976 struct acpi_sdev_pcie_path {
2981 /*******************************************************************************
2983 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2984 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2985 * Trust Domain Extensions (Intel TDX)".
2988 ******************************************************************************/
2990 struct acpi_table_svkl {
2991 struct acpi_table_header header; /* Common ACPI table header */
2995 struct acpi_svkl_key {
3002 enum acpi_svkl_type {
3003 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3004 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3007 enum acpi_svkl_format {
3008 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3009 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3012 /*******************************************************************************
3014 * TDEL - TD-Event Log
3015 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3016 * Trust Domain Extensions (Intel TDX)".
3019 ******************************************************************************/
3021 struct acpi_table_tdel {
3022 struct acpi_table_header header; /* Common ACPI table header */
3024 u64 log_area_minimum_length;
3025 u64 log_area_start_address;
3028 /* Reset to default packing */
3032 #endif /* __ACTBL2_H__ */