1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
4 * VIA VT1720 (Envy24PT)
6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
7 * 2002 James Stafford <jstafford@ampltd.com>
8 * 2003 Takashi Iwai <tiwai@suse.de>
11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/slab.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <sound/core.h>
19 #include <sound/info.h>
20 #include <sound/rawmidi.h>
21 #include <sound/initval.h>
23 #include <sound/asoundef.h>
28 /* lowlevel routines */
32 #include "vt1720_mobo.h"
34 #include "prodigy192.h"
35 #include "prodigy_hifi.h"
44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
45 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
46 MODULE_LICENSE("GPL");
48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
49 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
50 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
51 static char *model[SNDRV_CARDS];
53 module_param_array(index, int, NULL, 0444);
54 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
55 module_param_array(id, charp, NULL, 0444);
56 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
57 module_param_array(enable, bool, NULL, 0444);
58 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
59 module_param_array(model, charp, NULL, 0444);
60 MODULE_PARM_DESC(model, "Use the given board model.");
63 /* Both VT1720 and VT1724 have the same PCI IDs */
64 static const struct pci_device_id snd_vt1724_ids[] = {
65 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
69 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
72 static int PRO_RATE_LOCKED;
73 static int PRO_RATE_RESET = 1;
74 static unsigned int PRO_RATE_DEFAULT = 44100;
76 static const char * const ext_clock_names[1] = { "IEC958 In" };
83 * default rates, default clock routines
86 /* check whether the clock mode is spdif-in */
87 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
89 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
93 * locking rate makes sense only for internal clock mode
95 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
97 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
104 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
106 unsigned char old_cmd;
108 for (tm = 0; tm < 0x10000; tm++) {
109 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
110 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
112 if (!(old_cmd & VT1724_AC97_READY))
116 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
120 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
123 for (tm = 0; tm < 0x10000; tm++)
124 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
126 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
130 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
134 struct snd_ice1712 *ice = ac97->private_data;
135 unsigned char old_cmd;
137 old_cmd = snd_vt1724_ac97_ready(ice);
138 old_cmd &= ~VT1724_AC97_ID_MASK;
139 old_cmd |= ac97->num;
140 outb(reg, ICEMT1724(ice, AC97_INDEX));
141 outw(val, ICEMT1724(ice, AC97_DATA));
142 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
143 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
146 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
148 struct snd_ice1712 *ice = ac97->private_data;
149 unsigned char old_cmd;
151 old_cmd = snd_vt1724_ac97_ready(ice);
152 old_cmd &= ~VT1724_AC97_ID_MASK;
153 old_cmd |= ac97->num;
154 outb(reg, ICEMT1724(ice, AC97_INDEX));
155 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
156 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
158 return inw(ICEMT1724(ice, AC97_DATA));
166 /* set gpio direction 0 = read, 1 = write */
167 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
169 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
170 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
173 /* get gpio direction 0 = read, 1 = write */
174 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
176 return inl(ICEREG1724(ice, GPIO_DIRECTION));
179 /* set the gpio mask (0 = writable) */
180 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
182 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
183 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
184 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
185 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
188 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
192 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
195 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
199 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
201 outw(data, ICEREG1724(ice, GPIO_DATA));
203 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
204 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
207 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
211 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
214 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
222 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
226 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
227 inb(ICEREG1724(ice, MPU_DATA));
230 static inline struct snd_rawmidi_substream *
231 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
233 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
234 struct snd_rawmidi_substream, list);
237 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
239 static void vt1724_midi_write(struct snd_ice1712 *ice)
241 struct snd_rawmidi_substream *s;
245 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
246 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
248 count = snd_rawmidi_transmit(s, buffer, count);
249 for (i = 0; i < count; ++i)
250 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
252 /* mask irq when all bytes have been transmitted.
253 * enabled again in output_trigger when the new data comes in.
255 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
256 !snd_rawmidi_transmit_empty(s));
259 static void vt1724_midi_read(struct snd_ice1712 *ice)
261 struct snd_rawmidi_substream *s;
265 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
266 count = inb(ICEREG1724(ice, MPU_RXFIFO));
268 count = min(count, 32);
269 for (i = 0; i < count; ++i)
270 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
271 snd_rawmidi_receive(s, buffer, count);
275 /* call with ice->reg_lock */
276 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
278 u8 mask = inb(ICEREG1724(ice, IRQMASK));
283 outb(mask, ICEREG1724(ice, IRQMASK));
286 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
289 struct snd_ice1712 *ice = substream->rmidi->private_data;
291 spin_lock_irq(&ice->reg_lock);
292 enable_midi_irq(ice, flag, enable);
293 spin_unlock_irq(&ice->reg_lock);
296 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
301 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
306 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
308 struct snd_ice1712 *ice = s->rmidi->private_data;
311 spin_lock_irqsave(&ice->reg_lock, flags);
313 ice->midi_output = 1;
314 vt1724_midi_write(ice);
316 ice->midi_output = 0;
317 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
319 spin_unlock_irqrestore(&ice->reg_lock, flags);
322 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
324 struct snd_ice1712 *ice = s->rmidi->private_data;
325 unsigned long timeout;
327 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
328 /* 32 bytes should be transmitted in less than about 12 ms */
329 timeout = jiffies + msecs_to_jiffies(15);
331 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
333 schedule_timeout_uninterruptible(1);
334 } while (time_after(timeout, jiffies));
337 static const struct snd_rawmidi_ops vt1724_midi_output_ops = {
338 .open = vt1724_midi_output_open,
339 .close = vt1724_midi_output_close,
340 .trigger = vt1724_midi_output_trigger,
341 .drain = vt1724_midi_output_drain,
344 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
346 vt1724_midi_clear_rx(s->rmidi->private_data);
347 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
351 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
353 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
357 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
359 struct snd_ice1712 *ice = s->rmidi->private_data;
362 spin_lock_irqsave(&ice->reg_lock, flags);
365 vt1724_midi_read(ice);
369 spin_unlock_irqrestore(&ice->reg_lock, flags);
372 static const struct snd_rawmidi_ops vt1724_midi_input_ops = {
373 .open = vt1724_midi_input_open,
374 .close = vt1724_midi_input_close,
375 .trigger = vt1724_midi_input_trigger,
383 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
385 struct snd_ice1712 *ice = dev_id;
386 unsigned char status;
387 unsigned char status_mask =
388 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
393 status = inb(ICEREG1724(ice, IRQSTAT));
394 status &= status_mask;
397 spin_lock(&ice->reg_lock);
398 if (++timeout > 10) {
399 status = inb(ICEREG1724(ice, IRQSTAT));
400 dev_err(ice->card->dev,
401 "Too long irq loop, status = 0x%x\n", status);
402 if (status & VT1724_IRQ_MPU_TX) {
403 dev_err(ice->card->dev, "Disabling MPU_TX\n");
404 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
406 spin_unlock(&ice->reg_lock);
410 if (status & VT1724_IRQ_MPU_TX) {
411 if (ice->midi_output)
412 vt1724_midi_write(ice);
414 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
415 /* Due to mysterical reasons, MPU_TX is always
416 * generated (and can't be cleared) when a PCM
417 * playback is going. So let's ignore at the
420 status_mask &= ~VT1724_IRQ_MPU_TX;
422 if (status & VT1724_IRQ_MPU_RX) {
424 vt1724_midi_read(ice);
426 vt1724_midi_clear_rx(ice);
429 outb(status, ICEREG1724(ice, IRQSTAT));
430 spin_unlock(&ice->reg_lock);
431 if (status & VT1724_IRQ_MTPCM) {
434 * PCM assignment are:
435 * Playback DMA0 (M/C) = playback_pro_substream
436 * Playback DMA1 = playback_con_substream_ds[0]
437 * Playback DMA2 = playback_con_substream_ds[1]
438 * Playback DMA3 = playback_con_substream_ds[2]
439 * Playback DMA4 (SPDIF) = playback_con_substream
440 * Record DMA0 = capture_pro_substream
441 * Record DMA1 = capture_con_substream
443 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
444 if (mtstat & VT1724_MULTI_PDMA0) {
445 if (ice->playback_pro_substream)
446 snd_pcm_period_elapsed(ice->playback_pro_substream);
448 if (mtstat & VT1724_MULTI_RDMA0) {
449 if (ice->capture_pro_substream)
450 snd_pcm_period_elapsed(ice->capture_pro_substream);
452 if (mtstat & VT1724_MULTI_PDMA1) {
453 if (ice->playback_con_substream_ds[0])
454 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
456 if (mtstat & VT1724_MULTI_PDMA2) {
457 if (ice->playback_con_substream_ds[1])
458 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
460 if (mtstat & VT1724_MULTI_PDMA3) {
461 if (ice->playback_con_substream_ds[2])
462 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
464 if (mtstat & VT1724_MULTI_PDMA4) {
465 if (ice->playback_con_substream)
466 snd_pcm_period_elapsed(ice->playback_con_substream);
468 if (mtstat & VT1724_MULTI_RDMA1) {
469 if (ice->capture_con_substream)
470 snd_pcm_period_elapsed(ice->capture_con_substream);
472 /* ack anyway to avoid freeze */
473 outb(mtstat, ICEMT1724(ice, IRQ));
474 /* ought to really handle this properly */
475 if (mtstat & VT1724_MULTI_FIFO_ERR) {
476 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
477 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
478 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
479 /* If I don't do this, I get machine lockup due to continual interrupts */
484 return IRQ_RETVAL(handled);
488 * PCM code - professional part (multitrack)
491 static const unsigned int rates[] = {
492 8000, 9600, 11025, 12000, 16000, 22050, 24000,
493 32000, 44100, 48000, 64000, 88200, 96000,
497 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
498 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
503 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
504 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
509 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
510 .count = ARRAY_SIZE(rates),
515 struct vt1724_pcm_reg {
516 unsigned int addr; /* ADDR register offset */
517 unsigned int size; /* SIZE register offset */
518 unsigned int count; /* COUNT register offset */
519 unsigned int start; /* start & pause bit */
522 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
524 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
527 struct snd_pcm_substream *s;
530 snd_pcm_group_for_each_entry(s, substream) {
531 if (snd_pcm_substream_chip(s) == ice) {
532 const struct vt1724_pcm_reg *reg;
533 reg = s->runtime->private_data;
535 snd_pcm_trigger_done(s, substream);
540 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
541 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
542 spin_lock(&ice->reg_lock);
543 old = inb(ICEMT1724(ice, DMA_PAUSE));
544 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
548 outb(old, ICEMT1724(ice, DMA_PAUSE));
549 spin_unlock(&ice->reg_lock);
552 case SNDRV_PCM_TRIGGER_START:
553 case SNDRV_PCM_TRIGGER_STOP:
554 case SNDRV_PCM_TRIGGER_SUSPEND:
555 spin_lock(&ice->reg_lock);
556 old = inb(ICEMT1724(ice, DMA_CONTROL));
557 if (cmd == SNDRV_PCM_TRIGGER_START)
561 outb(old, ICEMT1724(ice, DMA_CONTROL));
562 spin_unlock(&ice->reg_lock);
565 case SNDRV_PCM_TRIGGER_RESUME:
566 /* apps will have to restart stream */
578 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
579 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
580 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
581 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
583 static const unsigned int stdclock_rate_list[16] = {
584 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
585 22050, 11025, 88200, 176400, 0, 192000, 64000
588 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
590 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
593 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
596 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
597 if (stdclock_rate_list[i] == rate) {
598 outb(i, ICEMT1724(ice, RATE));
604 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
607 unsigned char val, old;
609 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
610 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
612 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
614 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
616 outb(val, ICEMT1724(ice, I2S_FORMAT));
617 /* master clock changed */
621 /* no change in master clock */
625 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
629 unsigned char mclk_change;
630 unsigned int i, old_rate;
631 bool call_set_rate = false;
633 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
636 spin_lock_irqsave(&ice->reg_lock, flags);
637 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
638 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
639 /* running? we cannot change the rate now... */
640 spin_unlock_irqrestore(&ice->reg_lock, flags);
641 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
643 if (!force && is_pro_rate_locked(ice)) {
644 /* comparing required and current rate - makes sense for
645 * internal clock only */
646 spin_unlock_irqrestore(&ice->reg_lock, flags);
647 return (rate == ice->cur_rate) ? 0 : -EBUSY;
650 if (force || !ice->is_spdif_master(ice)) {
651 /* force means the rate was switched by ucontrol, otherwise
652 * setting clock rate for internal clock mode */
653 old_rate = ice->get_rate(ice);
654 if (force || (old_rate != rate))
655 call_set_rate = true;
656 else if (rate == ice->cur_rate) {
657 spin_unlock_irqrestore(&ice->reg_lock, flags);
662 ice->cur_rate = rate;
663 spin_unlock_irqrestore(&ice->reg_lock, flags);
666 ice->set_rate(ice, rate);
668 /* setting master clock */
669 mclk_change = ice->set_mclk(ice, rate);
671 if (mclk_change && ice->gpio.i2s_mclk_changed)
672 ice->gpio.i2s_mclk_changed(ice);
673 if (ice->gpio.set_pro_rate)
674 ice->gpio.set_pro_rate(ice, rate);
677 for (i = 0; i < ice->akm_codecs; i++) {
678 if (ice->akm[i].ops.set_rate_val)
679 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
681 if (ice->spdif.ops.setup_rate)
682 ice->spdif.ops.setup_rate(ice, rate);
687 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
688 struct snd_pcm_hw_params *hw_params)
690 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
693 chs = params_channels(hw_params);
694 mutex_lock(&ice->open_mutex);
695 /* mark surround channels */
696 if (substream == ice->playback_pro_substream) {
697 /* PDMA0 can be multi-channel up to 8 */
699 for (i = 0; i < chs; i++) {
700 if (ice->pcm_reserved[i] &&
701 ice->pcm_reserved[i] != substream) {
702 mutex_unlock(&ice->open_mutex);
705 ice->pcm_reserved[i] = substream;
708 if (ice->pcm_reserved[i] == substream)
709 ice->pcm_reserved[i] = NULL;
712 for (i = 0; i < 3; i++) {
713 /* check individual playback stream */
714 if (ice->playback_con_substream_ds[i] == substream) {
715 if (ice->pcm_reserved[i] &&
716 ice->pcm_reserved[i] != substream) {
717 mutex_unlock(&ice->open_mutex);
720 ice->pcm_reserved[i] = substream;
725 mutex_unlock(&ice->open_mutex);
727 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
730 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
732 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
735 mutex_lock(&ice->open_mutex);
736 /* unmark surround channels */
737 for (i = 0; i < 3; i++)
738 if (ice->pcm_reserved[i] == substream)
739 ice->pcm_reserved[i] = NULL;
740 mutex_unlock(&ice->open_mutex);
744 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
746 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
750 spin_lock_irq(&ice->reg_lock);
751 val = (8 - substream->runtime->channels) >> 1;
752 outb(val, ICEMT1724(ice, BURST));
754 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
756 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
757 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
758 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
759 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
760 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
761 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
762 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
763 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
765 spin_unlock_irq(&ice->reg_lock);
768 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, "
769 "buffer = 0x%x, period = 0x%x\n",
770 substream->runtime->channels,
771 (unsigned int)substream->runtime->dma_addr,
772 snd_pcm_lib_buffer_bytes(substream),
773 snd_pcm_lib_period_bytes(substream));
778 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
780 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
783 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
785 #if 0 /* read PLAYBACK_ADDR */
786 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
787 if (ptr < substream->runtime->dma_addr) {
788 dev_dbg(ice->card->dev, "invalid negative ptr\n");
791 ptr -= substream->runtime->dma_addr;
792 ptr = bytes_to_frames(substream->runtime, ptr);
793 if (ptr >= substream->runtime->buffer_size) {
794 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
795 (int)ptr, (int)substream->runtime->period_size);
798 #else /* read PLAYBACK_SIZE */
799 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
800 ptr = (ptr + 1) << 2;
801 ptr = bytes_to_frames(substream->runtime, ptr);
804 else if (ptr <= substream->runtime->buffer_size)
805 ptr = substream->runtime->buffer_size - ptr;
807 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
808 (int)ptr, (int)substream->runtime->buffer_size);
815 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
818 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
820 spin_lock_irq(&ice->reg_lock);
821 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
822 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
823 ice->profi_port + reg->size);
824 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
825 ice->profi_port + reg->count);
826 spin_unlock_irq(&ice->reg_lock);
830 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
832 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
833 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
836 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
838 #if 0 /* use ADDR register */
839 ptr = inl(ice->profi_port + reg->addr);
840 ptr -= substream->runtime->dma_addr;
841 return bytes_to_frames(substream->runtime, ptr);
842 #else /* use SIZE register */
843 ptr = inw(ice->profi_port + reg->size);
844 ptr = (ptr + 1) << 2;
845 ptr = bytes_to_frames(substream->runtime, ptr);
848 else if (ptr <= substream->runtime->buffer_size)
849 ptr = substream->runtime->buffer_size - ptr;
851 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
852 (int)ptr, (int)substream->runtime->buffer_size);
859 static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
860 .addr = VT1724_MT_PLAYBACK_ADDR,
861 .size = VT1724_MT_PLAYBACK_SIZE,
862 .count = VT1724_MT_PLAYBACK_COUNT,
863 .start = VT1724_PDMA0_START,
866 static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
867 .addr = VT1724_MT_PDMA4_ADDR,
868 .size = VT1724_MT_PDMA4_SIZE,
869 .count = VT1724_MT_PDMA4_COUNT,
870 .start = VT1724_PDMA4_START,
873 static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
874 .addr = VT1724_MT_CAPTURE_ADDR,
875 .size = VT1724_MT_CAPTURE_SIZE,
876 .count = VT1724_MT_CAPTURE_COUNT,
877 .start = VT1724_RDMA0_START,
880 static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
881 .addr = VT1724_MT_RDMA1_ADDR,
882 .size = VT1724_MT_RDMA1_SIZE,
883 .count = VT1724_MT_RDMA1_COUNT,
884 .start = VT1724_RDMA1_START,
887 #define vt1724_playback_pro_reg vt1724_pdma0_reg
888 #define vt1724_playback_spdif_reg vt1724_pdma4_reg
889 #define vt1724_capture_pro_reg vt1724_rdma0_reg
890 #define vt1724_capture_spdif_reg vt1724_rdma1_reg
892 static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
893 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
894 SNDRV_PCM_INFO_BLOCK_TRANSFER |
895 SNDRV_PCM_INFO_MMAP_VALID |
896 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
897 .formats = SNDRV_PCM_FMTBIT_S32_LE,
898 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
903 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
904 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
905 .period_bytes_max = (1UL << 21),
910 static const struct snd_pcm_hardware snd_vt1724_spdif = {
911 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
912 SNDRV_PCM_INFO_BLOCK_TRANSFER |
913 SNDRV_PCM_INFO_MMAP_VALID |
914 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
915 .formats = SNDRV_PCM_FMTBIT_S32_LE,
916 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
917 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
918 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
919 SNDRV_PCM_RATE_192000),
924 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
925 .period_bytes_min = 2 * 4 * 2,
926 .period_bytes_max = (1UL << 18),
931 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
932 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
933 SNDRV_PCM_INFO_BLOCK_TRANSFER |
934 SNDRV_PCM_INFO_MMAP_VALID |
935 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
936 .formats = SNDRV_PCM_FMTBIT_S32_LE,
937 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
942 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
943 .period_bytes_min = 2 * 4 * 2,
944 .period_bytes_max = (1UL << 18),
950 * set rate constraints
952 static void set_std_hw_rates(struct snd_ice1712 *ice)
954 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
956 /* VT1720 doesn't support more than 96kHz */
957 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
958 ice->hw_rates = &hw_constraints_rates_192;
960 ice->hw_rates = &hw_constraints_rates_96;
963 ice->hw_rates = &hw_constraints_rates_48;
967 static int set_rate_constraints(struct snd_ice1712 *ice,
968 struct snd_pcm_substream *substream)
970 struct snd_pcm_runtime *runtime = substream->runtime;
972 runtime->hw.rate_min = ice->hw_rates->list[0];
973 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
974 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
975 return snd_pcm_hw_constraint_list(runtime, 0,
976 SNDRV_PCM_HW_PARAM_RATE,
980 /* if the card has the internal rate locked (is_pro_locked), limit runtime
981 hw rates to the current internal rate only.
983 static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
985 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
986 struct snd_pcm_runtime *runtime = substream->runtime;
988 if (is_pro_rate_locked(ice)) {
989 rate = ice->get_rate(ice);
990 if (rate >= runtime->hw.rate_min
991 && rate <= runtime->hw.rate_max) {
992 runtime->hw.rate_min = rate;
993 runtime->hw.rate_max = rate;
999 /* multi-channel playback needs alignment 8x32bit regardless of the channels
1002 #define VT1724_BUFFER_ALIGN 0x20
1004 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1006 struct snd_pcm_runtime *runtime = substream->runtime;
1007 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1008 int chs, num_indeps;
1010 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1011 ice->playback_pro_substream = substream;
1012 runtime->hw = snd_vt1724_playback_pro;
1013 snd_pcm_set_sync(substream);
1014 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1015 set_rate_constraints(ice, substream);
1016 mutex_lock(&ice->open_mutex);
1017 /* calculate the currently available channels */
1018 num_indeps = ice->num_total_dacs / 2 - 1;
1019 for (chs = 0; chs < num_indeps; chs++) {
1020 if (ice->pcm_reserved[chs])
1023 chs = (chs + 1) * 2;
1024 runtime->hw.channels_max = chs;
1025 if (chs > 2) /* channels must be even */
1026 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1027 mutex_unlock(&ice->open_mutex);
1028 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1029 VT1724_BUFFER_ALIGN);
1030 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1031 VT1724_BUFFER_ALIGN);
1032 constrain_rate_if_locked(substream);
1034 ice->pro_open(ice, substream);
1038 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1040 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1041 struct snd_pcm_runtime *runtime = substream->runtime;
1043 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1044 ice->capture_pro_substream = substream;
1045 runtime->hw = snd_vt1724_2ch_stereo;
1046 snd_pcm_set_sync(substream);
1047 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1048 set_rate_constraints(ice, substream);
1049 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1050 VT1724_BUFFER_ALIGN);
1051 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1052 VT1724_BUFFER_ALIGN);
1053 constrain_rate_if_locked(substream);
1055 ice->pro_open(ice, substream);
1059 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1061 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1064 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1065 ice->playback_pro_substream = NULL;
1070 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1072 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1075 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1076 ice->capture_pro_substream = NULL;
1080 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1081 .open = snd_vt1724_playback_pro_open,
1082 .close = snd_vt1724_playback_pro_close,
1083 .hw_params = snd_vt1724_pcm_hw_params,
1084 .hw_free = snd_vt1724_pcm_hw_free,
1085 .prepare = snd_vt1724_playback_pro_prepare,
1086 .trigger = snd_vt1724_pcm_trigger,
1087 .pointer = snd_vt1724_playback_pro_pointer,
1090 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1091 .open = snd_vt1724_capture_pro_open,
1092 .close = snd_vt1724_capture_pro_close,
1093 .hw_params = snd_vt1724_pcm_hw_params,
1094 .hw_free = snd_vt1724_pcm_hw_free,
1095 .prepare = snd_vt1724_pcm_prepare,
1096 .trigger = snd_vt1724_pcm_trigger,
1097 .pointer = snd_vt1724_pcm_pointer,
1100 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1102 struct snd_pcm *pcm;
1105 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
1106 VT1724_CFG_ADC_NONE)
1110 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
1114 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1116 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1117 &snd_vt1724_capture_pro_ops);
1119 pcm->private_data = ice;
1120 pcm->info_flags = 0;
1121 strcpy(pcm->name, "ICE1724");
1123 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1124 &ice->pci->dev, 256*1024, 256*1024);
1136 /* update spdif control bits; call with reg_lock */
1137 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1139 unsigned char cbit, disabled;
1141 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1142 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1143 if (cbit != disabled)
1144 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1145 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1146 if (cbit != disabled)
1147 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1148 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1151 /* update SPDIF control bits according to the given rate */
1152 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1154 unsigned int val, nval;
1155 unsigned long flags;
1157 spin_lock_irqsave(&ice->reg_lock, flags);
1158 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1162 case 48000: nval |= 2 << 12; break;
1163 case 32000: nval |= 3 << 12; break;
1164 case 88200: nval |= 4 << 12; break;
1165 case 96000: nval |= 5 << 12; break;
1166 case 192000: nval |= 6 << 12; break;
1167 case 176400: nval |= 7 << 12; break;
1170 update_spdif_bits(ice, nval);
1171 spin_unlock_irqrestore(&ice->reg_lock, flags);
1174 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1176 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1177 if (!ice->force_pdma4)
1178 update_spdif_rate(ice, substream->runtime->rate);
1179 return snd_vt1724_pcm_prepare(substream);
1182 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1184 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1185 struct snd_pcm_runtime *runtime = substream->runtime;
1187 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1188 ice->playback_con_substream = substream;
1189 if (ice->force_pdma4) {
1190 runtime->hw = snd_vt1724_2ch_stereo;
1191 set_rate_constraints(ice, substream);
1193 runtime->hw = snd_vt1724_spdif;
1194 snd_pcm_set_sync(substream);
1195 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1196 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1197 VT1724_BUFFER_ALIGN);
1198 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1199 VT1724_BUFFER_ALIGN);
1200 constrain_rate_if_locked(substream);
1201 if (ice->spdif.ops.open)
1202 ice->spdif.ops.open(ice, substream);
1206 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1211 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1212 ice->playback_con_substream = NULL;
1213 if (ice->spdif.ops.close)
1214 ice->spdif.ops.close(ice, substream);
1219 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1221 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1222 struct snd_pcm_runtime *runtime = substream->runtime;
1224 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1225 ice->capture_con_substream = substream;
1226 if (ice->force_rdma1) {
1227 runtime->hw = snd_vt1724_2ch_stereo;
1228 set_rate_constraints(ice, substream);
1230 runtime->hw = snd_vt1724_spdif;
1231 snd_pcm_set_sync(substream);
1232 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1233 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1234 VT1724_BUFFER_ALIGN);
1235 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1236 VT1724_BUFFER_ALIGN);
1237 constrain_rate_if_locked(substream);
1238 if (ice->spdif.ops.open)
1239 ice->spdif.ops.open(ice, substream);
1243 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1245 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1248 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1249 ice->capture_con_substream = NULL;
1250 if (ice->spdif.ops.close)
1251 ice->spdif.ops.close(ice, substream);
1256 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1257 .open = snd_vt1724_playback_spdif_open,
1258 .close = snd_vt1724_playback_spdif_close,
1259 .hw_params = snd_vt1724_pcm_hw_params,
1260 .hw_free = snd_vt1724_pcm_hw_free,
1261 .prepare = snd_vt1724_playback_spdif_prepare,
1262 .trigger = snd_vt1724_pcm_trigger,
1263 .pointer = snd_vt1724_pcm_pointer,
1266 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1267 .open = snd_vt1724_capture_spdif_open,
1268 .close = snd_vt1724_capture_spdif_close,
1269 .hw_params = snd_vt1724_pcm_hw_params,
1270 .hw_free = snd_vt1724_pcm_hw_free,
1271 .prepare = snd_vt1724_pcm_prepare,
1272 .trigger = snd_vt1724_pcm_trigger,
1273 .pointer = snd_vt1724_pcm_pointer,
1277 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1280 struct snd_pcm *pcm;
1284 if (ice->force_pdma4 ||
1285 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1290 if (ice->force_rdma1 ||
1291 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1297 return 0; /* no spdif device */
1299 if (ice->force_pdma4 || ice->force_rdma1)
1300 name = "ICE1724 Secondary";
1302 name = "ICE1724 IEC958";
1303 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1308 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1309 &snd_vt1724_playback_spdif_ops);
1311 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1312 &snd_vt1724_capture_spdif_ops);
1314 pcm->private_data = ice;
1315 pcm->info_flags = 0;
1316 strcpy(pcm->name, name);
1318 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1319 &ice->pci->dev, 256*1024, 256*1024);
1328 * independent surround PCMs
1331 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1333 .addr = VT1724_MT_PDMA1_ADDR,
1334 .size = VT1724_MT_PDMA1_SIZE,
1335 .count = VT1724_MT_PDMA1_COUNT,
1336 .start = VT1724_PDMA1_START,
1339 .addr = VT1724_MT_PDMA2_ADDR,
1340 .size = VT1724_MT_PDMA2_SIZE,
1341 .count = VT1724_MT_PDMA2_COUNT,
1342 .start = VT1724_PDMA2_START,
1345 .addr = VT1724_MT_PDMA3_ADDR,
1346 .size = VT1724_MT_PDMA3_SIZE,
1347 .count = VT1724_MT_PDMA3_COUNT,
1348 .start = VT1724_PDMA3_START,
1352 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1354 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1357 spin_lock_irq(&ice->reg_lock);
1358 val = 3 - substream->number;
1359 if (inb(ICEMT1724(ice, BURST)) < val)
1360 outb(val, ICEMT1724(ice, BURST));
1361 spin_unlock_irq(&ice->reg_lock);
1362 return snd_vt1724_pcm_prepare(substream);
1365 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1367 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1368 struct snd_pcm_runtime *runtime = substream->runtime;
1370 mutex_lock(&ice->open_mutex);
1371 /* already used by PDMA0? */
1372 if (ice->pcm_reserved[substream->number]) {
1373 mutex_unlock(&ice->open_mutex);
1374 return -EBUSY; /* FIXME: should handle blocking mode properly */
1376 mutex_unlock(&ice->open_mutex);
1377 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1378 ice->playback_con_substream_ds[substream->number] = substream;
1379 runtime->hw = snd_vt1724_2ch_stereo;
1380 snd_pcm_set_sync(substream);
1381 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1382 set_rate_constraints(ice, substream);
1386 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1388 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1391 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1392 ice->playback_con_substream_ds[substream->number] = NULL;
1393 ice->pcm_reserved[substream->number] = NULL;
1398 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1399 .open = snd_vt1724_playback_indep_open,
1400 .close = snd_vt1724_playback_indep_close,
1401 .hw_params = snd_vt1724_pcm_hw_params,
1402 .hw_free = snd_vt1724_pcm_hw_free,
1403 .prepare = snd_vt1724_playback_indep_prepare,
1404 .trigger = snd_vt1724_pcm_trigger,
1405 .pointer = snd_vt1724_pcm_pointer,
1409 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1411 struct snd_pcm *pcm;
1415 play = ice->num_total_dacs / 2 - 1;
1419 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1423 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1424 &snd_vt1724_playback_indep_ops);
1426 pcm->private_data = ice;
1427 pcm->info_flags = 0;
1428 strcpy(pcm->name, "ICE1724 Surround PCM");
1430 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1431 &ice->pci->dev, 256*1024, 256*1024);
1443 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1447 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1448 struct snd_ac97_bus *pbus;
1449 struct snd_ac97_template ac97;
1450 static const struct snd_ac97_bus_ops ops = {
1451 .write = snd_vt1724_ac97_write,
1452 .read = snd_vt1724_ac97_read,
1456 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1457 mdelay(5); /* FIXME */
1458 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1460 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1463 memset(&ac97, 0, sizeof(ac97));
1464 ac97.private_data = ice;
1465 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1467 dev_warn(ice->card->dev,
1468 "cannot initialize pro ac97, skipped\n");
1472 /* I2S mixer only */
1473 strcat(ice->card->mixername, "ICE1724 - multitrack");
1481 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1483 return (unsigned int)ice->eeprom.data[idx] | \
1484 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1485 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1488 static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1489 struct snd_info_buffer *buffer)
1491 struct snd_ice1712 *ice = entry->private_data;
1494 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1495 snd_iprintf(buffer, "EEPROM:\n");
1497 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1498 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1499 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1500 snd_iprintf(buffer, " System Config : 0x%x\n",
1501 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1502 snd_iprintf(buffer, " ACLink : 0x%x\n",
1503 ice->eeprom.data[ICE_EEP2_ACLINK]);
1504 snd_iprintf(buffer, " I2S : 0x%x\n",
1505 ice->eeprom.data[ICE_EEP2_I2S]);
1506 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1507 ice->eeprom.data[ICE_EEP2_SPDIF]);
1508 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1509 ice->eeprom.gpiodir);
1510 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1511 ice->eeprom.gpiomask);
1512 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1513 ice->eeprom.gpiostate);
1514 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1515 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1516 idx, ice->eeprom.data[idx]);
1518 snd_iprintf(buffer, "\nRegisters:\n");
1520 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1521 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1522 for (idx = 0x0; idx < 0x20 ; idx++)
1523 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1524 idx, inb(ice->port+idx));
1525 for (idx = 0x0; idx < 0x30 ; idx++)
1526 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1527 idx, inb(ice->profi_port+idx));
1530 static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
1532 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read);
1539 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1540 struct snd_ctl_elem_info *uinfo)
1542 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1543 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1547 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1550 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1552 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1556 static const struct snd_kcontrol_new snd_vt1724_eeprom = {
1557 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1558 .name = "ICE1724 EEPROM",
1559 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1560 .info = snd_vt1724_eeprom_info,
1561 .get = snd_vt1724_eeprom_get
1566 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1567 struct snd_ctl_elem_info *uinfo)
1569 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1574 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1576 unsigned int val, rbits;
1578 val = diga->status[0] & 0x03; /* professional, non-audio */
1581 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1582 IEC958_AES0_PRO_EMPHASIS_5015)
1584 rbits = (diga->status[4] >> 3) & 0x0f;
1587 case 2: val |= 5 << 12; break; /* 96k */
1588 case 3: val |= 6 << 12; break; /* 192k */
1589 case 10: val |= 4 << 12; break; /* 88.2k */
1590 case 11: val |= 7 << 12; break; /* 176.4k */
1593 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1594 case IEC958_AES0_PRO_FS_44100:
1596 case IEC958_AES0_PRO_FS_32000:
1606 val |= diga->status[1] & 0x04; /* copyright */
1607 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1608 IEC958_AES0_CON_EMPHASIS_5015)
1610 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1611 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1616 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1618 memset(diga->status, 0, sizeof(diga->status));
1619 diga->status[0] = val & 0x03; /* professional, non-audio */
1622 if (val & (1U << 3))
1623 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1624 switch ((val >> 12) & 0x7) {
1628 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1631 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1636 diga->status[0] |= val & (1U << 2); /* copyright */
1637 if (val & (1U << 3))
1638 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1639 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1640 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1644 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1645 struct snd_ctl_elem_value *ucontrol)
1647 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1649 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1650 decode_spdif_bits(&ucontrol->value.iec958, val);
1654 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1655 struct snd_ctl_elem_value *ucontrol)
1657 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1658 unsigned int val, old;
1660 val = encode_spdif_bits(&ucontrol->value.iec958);
1661 spin_lock_irq(&ice->reg_lock);
1662 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1664 update_spdif_bits(ice, val);
1665 spin_unlock_irq(&ice->reg_lock);
1669 static const struct snd_kcontrol_new snd_vt1724_spdif_default =
1671 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1672 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1673 .info = snd_vt1724_spdif_info,
1674 .get = snd_vt1724_spdif_default_get,
1675 .put = snd_vt1724_spdif_default_put
1678 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
1681 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1682 IEC958_AES0_PROFESSIONAL |
1683 IEC958_AES0_CON_NOT_COPYRIGHT |
1684 IEC958_AES0_CON_EMPHASIS;
1685 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1686 IEC958_AES1_CON_CATEGORY;
1687 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1691 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1692 struct snd_ctl_elem_value *ucontrol)
1694 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1695 IEC958_AES0_PROFESSIONAL |
1696 IEC958_AES0_PRO_FS |
1697 IEC958_AES0_PRO_EMPHASIS;
1701 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc =
1703 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1704 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1705 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1706 .info = snd_vt1724_spdif_info,
1707 .get = snd_vt1724_spdif_maskc_get,
1710 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp =
1712 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1713 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1714 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1715 .info = snd_vt1724_spdif_info,
1716 .get = snd_vt1724_spdif_maskp_get,
1719 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1721 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1722 struct snd_ctl_elem_value *ucontrol)
1724 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1725 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1726 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1730 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
1733 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1734 unsigned char old, val;
1736 spin_lock_irq(&ice->reg_lock);
1737 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1738 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1739 if (ucontrol->value.integer.value[0])
1740 val |= VT1724_CFG_SPDIF_OUT_EN;
1742 outb(val, ICEREG1724(ice, SPDIF_CFG));
1743 spin_unlock_irq(&ice->reg_lock);
1747 static const struct snd_kcontrol_new snd_vt1724_spdif_switch =
1749 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1750 /* FIXME: the following conflict with IEC958 Playback Route */
1751 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1752 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1753 .info = snd_vt1724_spdif_sw_info,
1754 .get = snd_vt1724_spdif_sw_get,
1755 .put = snd_vt1724_spdif_sw_put
1759 #if 0 /* NOT USED YET */
1761 * GPIO access from extern
1764 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1766 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1767 struct snd_ctl_elem_value *ucontrol)
1769 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1770 int shift = kcontrol->private_value & 0xff;
1771 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1773 snd_ice1712_save_gpio_status(ice);
1774 ucontrol->value.integer.value[0] =
1775 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1776 snd_ice1712_restore_gpio_status(ice);
1780 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1781 struct snd_ctl_elem_value *ucontrol)
1783 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1784 int shift = kcontrol->private_value & 0xff;
1785 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1786 unsigned int val, nval;
1788 if (kcontrol->private_value & (1 << 31))
1790 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1791 snd_ice1712_save_gpio_status(ice);
1792 val = snd_ice1712_gpio_read(ice);
1793 nval |= val & ~(1 << shift);
1795 snd_ice1712_gpio_write(ice, nval);
1796 snd_ice1712_restore_gpio_status(ice);
1799 #endif /* NOT USED YET */
1804 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_info *uinfo)
1807 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1808 int hw_rates_count = ice->hw_rates->count;
1809 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1812 /* internal clocks */
1813 uinfo->value.enumerated.items = hw_rates_count;
1814 /* external clocks */
1815 if (ice->force_rdma1 ||
1816 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
1817 uinfo->value.enumerated.items += ice->ext_clock_count;
1818 /* upper limit - keep at top */
1819 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1820 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1821 if (uinfo->value.enumerated.item >= hw_rates_count)
1822 /* ext_clock items */
1823 strcpy(uinfo->value.enumerated.name,
1824 ice->ext_clock_names[
1825 uinfo->value.enumerated.item - hw_rates_count]);
1827 /* int clock items */
1828 sprintf(uinfo->value.enumerated.name, "%d",
1829 ice->hw_rates->list[uinfo->value.enumerated.item]);
1833 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1834 struct snd_ctl_elem_value *ucontrol)
1836 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1837 unsigned int i, rate;
1839 spin_lock_irq(&ice->reg_lock);
1840 if (ice->is_spdif_master(ice)) {
1841 ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1842 ice->get_spdif_master_type(ice);
1844 rate = ice->get_rate(ice);
1845 ucontrol->value.enumerated.item[0] = 0;
1846 for (i = 0; i < ice->hw_rates->count; i++) {
1847 if (ice->hw_rates->list[i] == rate) {
1848 ucontrol->value.enumerated.item[0] = i;
1853 spin_unlock_irq(&ice->reg_lock);
1857 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1859 /* standard external clock - only single type - SPDIF IN */
1863 /* setting clock to external - SPDIF */
1864 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1867 unsigned char i2s_oval;
1868 oval = inb(ICEMT1724(ice, RATE));
1869 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1871 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1872 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1877 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1878 struct snd_ctl_elem_value *ucontrol)
1880 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1881 unsigned int old_rate, new_rate;
1882 unsigned int item = ucontrol->value.enumerated.item[0];
1883 unsigned int first_ext_clock = ice->hw_rates->count;
1885 if (item > first_ext_clock + ice->ext_clock_count - 1)
1888 /* if rate = 0 => external clock */
1889 spin_lock_irq(&ice->reg_lock);
1890 if (ice->is_spdif_master(ice))
1893 old_rate = ice->get_rate(ice);
1894 if (item >= first_ext_clock) {
1895 /* switching to external clock */
1896 ice->set_spdif_clock(ice, item - first_ext_clock);
1899 /* internal on-card clock */
1900 new_rate = ice->hw_rates->list[item];
1901 ice->pro_rate_default = new_rate;
1902 spin_unlock_irq(&ice->reg_lock);
1903 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1904 spin_lock_irq(&ice->reg_lock);
1906 spin_unlock_irq(&ice->reg_lock);
1908 /* the first switch to the ext. clock mode? */
1909 if (old_rate != new_rate && !new_rate) {
1910 /* notify akm chips as well */
1912 if (ice->gpio.set_pro_rate)
1913 ice->gpio.set_pro_rate(ice, 0);
1914 for (i = 0; i < ice->akm_codecs; i++) {
1915 if (ice->akm[i].ops.set_rate_val)
1916 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1919 return old_rate != new_rate;
1922 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = {
1923 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1924 .name = "Multi Track Internal Clock",
1925 .info = snd_vt1724_pro_internal_clock_info,
1926 .get = snd_vt1724_pro_internal_clock_get,
1927 .put = snd_vt1724_pro_internal_clock_put
1930 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1932 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1933 struct snd_ctl_elem_value *ucontrol)
1935 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1939 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1940 struct snd_ctl_elem_value *ucontrol)
1942 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1943 int change = 0, nval;
1945 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1946 spin_lock_irq(&ice->reg_lock);
1947 change = PRO_RATE_LOCKED != nval;
1948 PRO_RATE_LOCKED = nval;
1949 spin_unlock_irq(&ice->reg_lock);
1953 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = {
1954 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1955 .name = "Multi Track Rate Locking",
1956 .info = snd_vt1724_pro_rate_locking_info,
1957 .get = snd_vt1724_pro_rate_locking_get,
1958 .put = snd_vt1724_pro_rate_locking_put
1961 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1963 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1966 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1970 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1971 struct snd_ctl_elem_value *ucontrol)
1973 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1974 int change = 0, nval;
1976 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1977 spin_lock_irq(&ice->reg_lock);
1978 change = PRO_RATE_RESET != nval;
1979 PRO_RATE_RESET = nval;
1980 spin_unlock_irq(&ice->reg_lock);
1984 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = {
1985 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1986 .name = "Multi Track Rate Reset",
1987 .info = snd_vt1724_pro_rate_reset_info,
1988 .get = snd_vt1724_pro_rate_reset_get,
1989 .put = snd_vt1724_pro_rate_reset_put
1996 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1997 struct snd_ctl_elem_info *uinfo)
1999 static const char * const texts[] = {
2001 "H/W In 0", "H/W In 1", /* 1-2 */
2002 "IEC958 In L", "IEC958 In R", /* 3-4 */
2005 return snd_ctl_enum_info(uinfo, 1, 5, texts);
2008 static inline int analog_route_shift(int idx)
2010 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
2013 static inline int digital_route_shift(int idx)
2018 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
2021 unsigned char eitem;
2022 static const unsigned char xlate[8] = {
2023 0, 255, 1, 2, 255, 255, 3, 4,
2026 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2028 val &= 7; /* we now have 3 bits per output */
2037 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2040 unsigned int old_val, nval;
2042 static const unsigned char xroute[8] = {
2044 2, /* PSDIN0 Left */
2045 3, /* PSDIN0 Right */
2047 7, /* SPDIN Right */
2050 nval = xroute[val % 5];
2051 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2052 val &= ~(0x07 << shift);
2053 val |= nval << shift;
2054 change = val != old_val;
2056 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2060 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2061 struct snd_ctl_elem_value *ucontrol)
2063 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2064 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2065 ucontrol->value.enumerated.item[0] =
2066 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2070 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2071 struct snd_ctl_elem_value *ucontrol)
2073 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2074 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2075 return snd_ice1724_put_route_val(ice,
2076 ucontrol->value.enumerated.item[0],
2077 analog_route_shift(idx));
2080 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2081 struct snd_ctl_elem_value *ucontrol)
2083 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2084 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2085 ucontrol->value.enumerated.item[0] =
2086 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2090 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2091 struct snd_ctl_elem_value *ucontrol)
2093 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2094 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2095 return snd_ice1724_put_route_val(ice,
2096 ucontrol->value.enumerated.item[0],
2097 digital_route_shift(idx));
2100 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route =
2102 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2103 .name = "H/W Playback Route",
2104 .info = snd_vt1724_pro_route_info,
2105 .get = snd_vt1724_pro_route_analog_get,
2106 .put = snd_vt1724_pro_route_analog_put,
2109 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = {
2110 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2111 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2112 .info = snd_vt1724_pro_route_info,
2113 .get = snd_vt1724_pro_route_spdif_get,
2114 .put = snd_vt1724_pro_route_spdif_put,
2119 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2120 struct snd_ctl_elem_info *uinfo)
2122 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2123 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2124 uinfo->value.integer.min = 0;
2125 uinfo->value.integer.max = 255;
2129 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2130 struct snd_ctl_elem_value *ucontrol)
2132 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2135 spin_lock_irq(&ice->reg_lock);
2136 for (idx = 0; idx < 22; idx++) {
2137 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2138 ucontrol->value.integer.value[idx] =
2139 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2141 spin_unlock_irq(&ice->reg_lock);
2145 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = {
2146 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2147 .name = "Multi Track Peak",
2148 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2149 .info = snd_vt1724_pro_peak_info,
2150 .get = snd_vt1724_pro_peak_get
2154 ooAoo cards with no controls
2156 static const unsigned char ooaoo_sq210_eeprom[] = {
2157 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC,
2159 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
2160 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */
2161 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */
2162 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */
2163 [ICE_EEP2_GPIO_DIR1] = 0x00,
2164 [ICE_EEP2_GPIO_DIR2] = 0x00,
2165 [ICE_EEP2_GPIO_MASK] = 0xff,
2166 [ICE_EEP2_GPIO_MASK1] = 0xff,
2167 [ICE_EEP2_GPIO_MASK2] = 0xff,
2169 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */
2170 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW
2171 and GPIO15 always zero */
2172 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
2176 static const struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = {
2178 .name = "ooAoo SQ210a",
2180 .eeprom_size = sizeof(ooaoo_sq210_eeprom),
2181 .eeprom_data = ooaoo_sq210_eeprom,
2183 { } /* terminator */
2186 static const struct snd_ice1712_card_info *card_tables[] = {
2187 snd_vt1724_revo_cards,
2188 snd_vt1724_amp_cards,
2189 snd_vt1724_aureon_cards,
2190 snd_vt1720_mobo_cards,
2191 snd_vt1720_pontis_cards,
2192 snd_vt1724_prodigy_hifi_cards,
2193 snd_vt1724_prodigy192_cards,
2194 snd_vt1724_juli_cards,
2195 snd_vt1724_maya44_cards,
2196 snd_vt1724_phase_cards,
2197 snd_vt1724_wtm_cards,
2198 snd_vt1724_se_cards,
2199 snd_vt1724_qtet_cards,
2200 snd_vt1724_ooaoo_cards,
2201 snd_vt1724_psc724_cards,
2209 static void wait_i2c_busy(struct snd_ice1712 *ice)
2212 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2215 dev_err(ice->card->dev, "i2c busy timeout\n");
2218 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2219 unsigned char dev, unsigned char addr)
2223 mutex_lock(&ice->i2c_mutex);
2225 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2226 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2228 val = inb(ICEREG1724(ice, I2C_DATA));
2229 mutex_unlock(&ice->i2c_mutex);
2231 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2236 void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2237 unsigned char dev, unsigned char addr, unsigned char data)
2239 mutex_lock(&ice->i2c_mutex);
2242 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2244 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2245 outb(data, ICEREG1724(ice, I2C_DATA));
2246 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2248 mutex_unlock(&ice->i2c_mutex);
2251 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2252 const char *modelname)
2254 const int dev = 0xa0; /* EEPROM device address */
2255 unsigned int i, size;
2256 const struct snd_ice1712_card_info * const *tbl, *c;
2258 if (!modelname || !*modelname) {
2259 ice->eeprom.subvendor = 0;
2260 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2261 ice->eeprom.subvendor =
2262 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2263 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2264 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2265 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2266 if (ice->eeprom.subvendor == 0 ||
2267 ice->eeprom.subvendor == (unsigned int)-1) {
2268 /* invalid subvendor from EEPROM, try the PCI
2269 * subststem ID instead
2272 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2274 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2275 ice->eeprom.subvendor =
2276 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2277 if (ice->eeprom.subvendor == 0 ||
2278 ice->eeprom.subvendor == (unsigned int)-1) {
2279 dev_err(ice->card->dev,
2280 "No valid ID is found\n");
2285 for (tbl = card_tables; *tbl; tbl++) {
2286 for (c = *tbl; c->name; c++) {
2287 if (modelname && c->model &&
2288 !strcmp(modelname, c->model)) {
2289 dev_info(ice->card->dev,
2290 "Using board model %s\n",
2292 ice->eeprom.subvendor = c->subvendor;
2293 } else if (c->subvendor != ice->eeprom.subvendor)
2296 if (!c->eeprom_size || !c->eeprom_data)
2298 /* if the EEPROM is given by the driver, use it */
2299 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2300 ice->eeprom.version = 2;
2301 ice->eeprom.size = c->eeprom_size + 6;
2302 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2306 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2307 ice->eeprom.subvendor);
2308 #ifdef CONFIG_PM_SLEEP
2309 /* assume AC97-only card which can suspend without additional code */
2310 ice->pm_suspend_enabled = 1;
2314 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2315 if (ice->eeprom.size < 6)
2316 ice->eeprom.size = 32;
2317 else if (ice->eeprom.size > 32) {
2318 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
2322 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2323 if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
2324 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
2325 ice->eeprom.version);
2326 size = ice->eeprom.size - 6;
2327 for (i = 0; i < size; i++)
2328 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2331 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2332 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2333 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2340 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2342 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2343 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2345 outb(0, ICEREG1724(ice, CONTROL));
2346 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2350 static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2352 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2353 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2354 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2355 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2357 ice->gpio.write_mask = ice->eeprom.gpiomask;
2358 ice->gpio.direction = ice->eeprom.gpiodir;
2359 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2360 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2361 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2363 outb(0, ICEREG1724(ice, POWERDOWN));
2365 /* MPU_RX and TX irq masks are cleared later dynamically */
2366 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2368 /* don't handle FIFO overrun/underruns (just yet),
2369 * since they cause machine lockups
2371 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2376 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2379 struct snd_kcontrol *kctl;
2381 if (snd_BUG_ON(!ice->pcm))
2384 if (!ice->own_routing) {
2385 err = snd_ctl_add(ice->card,
2386 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2391 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2395 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2398 kctl->id.device = ice->pcm->device;
2399 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2402 kctl->id.device = ice->pcm->device;
2403 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2406 kctl->id.device = ice->pcm->device;
2407 #if 0 /* use default only */
2408 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2411 kctl->id.device = ice->pcm->device;
2412 ice->spdif.stream_ctl = kctl;
2418 static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
2422 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2425 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2429 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2432 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2436 if (!ice->own_routing && ice->num_total_dacs > 0) {
2437 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
2438 tmp.count = ice->num_total_dacs;
2439 if (ice->vt1720 && tmp.count > 2)
2441 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2446 return snd_ctl_add(ice->card,
2447 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2450 static void snd_vt1724_free(struct snd_card *card)
2452 struct snd_ice1712 *ice = card->private_data;
2454 /* mask all interrupts */
2455 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2456 outb(0xff, ICEREG1724(ice, IRQMASK));
2458 snd_ice1712_akm4xxx_free(ice);
2461 static int snd_vt1724_create(struct snd_card *card,
2462 struct pci_dev *pci,
2463 const char *modelname)
2465 struct snd_ice1712 *ice = card->private_data;
2468 /* enable PCI device */
2469 err = pcim_enable_device(pci);
2474 spin_lock_init(&ice->reg_lock);
2475 mutex_init(&ice->gpio_mutex);
2476 mutex_init(&ice->open_mutex);
2477 mutex_init(&ice->i2c_mutex);
2478 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2479 ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2480 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2481 ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2482 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2483 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2487 pci_set_master(pci);
2488 snd_vt1724_proc_init(ice);
2490 err = pci_request_regions(pci, "ICE1724");
2493 ice->port = pci_resource_start(pci, 0);
2494 ice->profi_port = pci_resource_start(pci, 1);
2496 if (devm_request_irq(&pci->dev, pci->irq, snd_vt1724_interrupt,
2497 IRQF_SHARED, KBUILD_MODNAME, ice)) {
2498 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2502 ice->irq = pci->irq;
2503 card->sync_irq = ice->irq;
2504 card->private_free = snd_vt1724_free;
2506 snd_vt1724_chip_reset(ice);
2507 if (snd_vt1724_read_eeprom(ice, modelname) < 0)
2509 if (snd_vt1724_chip_init(ice) < 0)
2522 static int __snd_vt1724_probe(struct pci_dev *pci,
2523 const struct pci_device_id *pci_id)
2526 struct snd_card *card;
2527 struct snd_ice1712 *ice;
2528 int pcm_dev = 0, err;
2529 const struct snd_ice1712_card_info *c;
2531 if (dev >= SNDRV_CARDS)
2538 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2539 sizeof(*ice), &card);
2542 ice = card->private_data;
2544 strcpy(card->driver, "ICE1724");
2545 strcpy(card->shortname, "ICEnsemble ICE1724");
2547 err = snd_vt1724_create(card, pci, model[dev]);
2551 /* field init before calling chip_init */
2552 ice->ext_clock_count = 0;
2556 strcpy(card->shortname, c->name);
2557 if (c->driver) /* specific driver? */
2558 strcpy(card->driver, c->driver);
2560 err = c->chip_init(ice);
2567 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2568 * ICE1712 has only one for both (mixed up).
2570 * Confusingly the analog PCM is named "professional" here because it
2571 * was called so in ice1712 driver, and vt1724 driver is derived from
2574 ice->pro_rate_default = PRO_RATE_DEFAULT;
2575 if (!ice->is_spdif_master)
2576 ice->is_spdif_master = stdclock_is_spdif_master;
2578 ice->get_rate = stdclock_get_rate;
2580 ice->set_rate = stdclock_set_rate;
2582 ice->set_mclk = stdclock_set_mclk;
2583 if (!ice->set_spdif_clock)
2584 ice->set_spdif_clock = stdclock_set_spdif_clock;
2585 if (!ice->get_spdif_master_type)
2586 ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2587 if (!ice->ext_clock_names)
2588 ice->ext_clock_names = ext_clock_names;
2589 if (!ice->ext_clock_count)
2590 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2593 set_std_hw_rates(ice);
2595 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2599 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2603 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2607 err = snd_vt1724_ac97_mixer(ice);
2611 err = snd_vt1724_build_controls(ice);
2615 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2616 err = snd_vt1724_spdif_build_controls(ice);
2621 if (c && c->build_controls) {
2622 err = c->build_controls(ice);
2627 if (!c || !c->no_mpu401) {
2628 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2629 struct snd_rawmidi *rmidi;
2631 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2634 ice->rmidi[0] = rmidi;
2635 rmidi->private_data = ice;
2636 strcpy(rmidi->name, "ICE1724 MIDI");
2637 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2638 SNDRV_RAWMIDI_INFO_INPUT |
2639 SNDRV_RAWMIDI_INFO_DUPLEX;
2640 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2641 &vt1724_midi_output_ops);
2642 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2643 &vt1724_midi_input_ops);
2645 /* set watermarks */
2646 outb(VT1724_MPU_RX_FIFO | 0x1,
2647 ICEREG1724(ice, MPU_FIFO_WM));
2648 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2650 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2654 sprintf(card->longname, "%s at 0x%lx, irq %i",
2655 card->shortname, ice->port, ice->irq);
2657 err = snd_card_register(card);
2660 pci_set_drvdata(pci, card);
2665 static int snd_vt1724_probe(struct pci_dev *pci,
2666 const struct pci_device_id *pci_id)
2668 return snd_card_free_on_error(&pci->dev, __snd_vt1724_probe(pci, pci_id));
2671 #ifdef CONFIG_PM_SLEEP
2672 static int snd_vt1724_suspend(struct device *dev)
2674 struct snd_card *card = dev_get_drvdata(dev);
2675 struct snd_ice1712 *ice = card->private_data;
2677 if (!ice->pm_suspend_enabled)
2680 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2682 snd_ac97_suspend(ice->ac97);
2684 spin_lock_irq(&ice->reg_lock);
2685 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2686 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2687 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2688 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2689 spin_unlock_irq(&ice->reg_lock);
2691 if (ice->pm_suspend)
2692 ice->pm_suspend(ice);
2696 static int snd_vt1724_resume(struct device *dev)
2698 struct snd_card *card = dev_get_drvdata(dev);
2699 struct snd_ice1712 *ice = card->private_data;
2701 if (!ice->pm_suspend_enabled)
2704 snd_vt1724_chip_reset(ice);
2706 if (snd_vt1724_chip_init(ice) < 0) {
2707 snd_card_disconnect(card);
2712 ice->pm_resume(ice);
2714 if (ice->pm_saved_is_spdif_master) {
2715 /* switching to external clock via SPDIF */
2716 ice->set_spdif_clock(ice, 0);
2718 /* internal on-card clock */
2721 rate = ice->cur_rate;
2723 rate = ice->pro_rate_default;
2724 snd_vt1724_set_pro_rate(ice, rate, 1);
2727 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2729 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2730 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2732 snd_ac97_resume(ice->ac97);
2734 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2738 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
2739 #define SND_VT1724_PM_OPS &snd_vt1724_pm
2741 #define SND_VT1724_PM_OPS NULL
2742 #endif /* CONFIG_PM_SLEEP */
2744 static struct pci_driver vt1724_driver = {
2745 .name = KBUILD_MODNAME,
2746 .id_table = snd_vt1724_ids,
2747 .probe = snd_vt1724_probe,
2749 .pm = SND_VT1724_PM_OPS,
2753 module_pci_driver(vt1724_driver);