2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3 * Copyright (C) 2004 Arcom Control Systems
4 * Copyright (C) 2008 Pengutronix
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/delay.h>
21 #include <linux/jiffies.h>
22 #include <linux/errno.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-pca.h>
26 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
27 printk(KERN_DEBUG fmt, ## args); } while (0)
28 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
29 printk(KERN_DEBUG fmt, ## args); } while (0)
30 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
31 printk(KERN_DEBUG fmt, ## args); } while (0)
35 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
36 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
38 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
39 #define pca_clock(adap) adap->i2c_clock
40 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
41 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
42 #define pca_wait(adap) adap->wait_for_completion(adap->data)
44 static void pca_reset(struct i2c_algo_pca_data *adap)
46 if (adap->chip == I2C_PCA_CHIP_9665) {
47 /* Ignore the reset function from the module,
48 * we can use the parallel bus reset.
50 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
51 pca_outw(adap, I2C_PCA_IND, 0xA5);
52 pca_outw(adap, I2C_PCA_IND, 0x5A);
55 * After a reset we need to re-apply any configuration
56 * (calculated in pca_init) to get the bus in a working state.
58 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE);
59 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode);
60 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
61 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow);
62 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
63 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi);
65 pca_set_con(adap, I2C_PCA_CON_ENSIO);
67 adap->reset_chip(adap->data);
68 pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq);
73 * Generate a start condition on the i2c bus.
75 * returns after the start condition has occurred
77 static int pca_start(struct i2c_algo_pca_data *adap)
79 int sta = pca_get_con(adap);
81 sta |= I2C_PCA_CON_STA;
82 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
83 pca_set_con(adap, sta);
84 return pca_wait(adap);
88 * Generate a repeated start condition on the i2c bus
90 * return after the repeated start condition has occurred
92 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
94 int sta = pca_get_con(adap);
95 DEB2("=== REPEATED START\n");
96 sta |= I2C_PCA_CON_STA;
97 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
98 pca_set_con(adap, sta);
99 return pca_wait(adap);
103 * Generate a stop condition on the i2c bus
105 * returns after the stop condition has been generated
107 * STOPs do not generate an interrupt or set the SI flag, since the
108 * part returns the idle state (0xf8). Hence we don't need to
111 static void pca_stop(struct i2c_algo_pca_data *adap)
113 int sta = pca_get_con(adap);
115 sta |= I2C_PCA_CON_STO;
116 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
117 pca_set_con(adap, sta);
121 * Send the slave address and R/W bit
123 * returns after the address has been sent
125 static int pca_address(struct i2c_algo_pca_data *adap,
128 int sta = pca_get_con(adap);
129 int addr = i2c_8bit_addr_from_msg(msg);
131 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
132 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
134 pca_outw(adap, I2C_PCA_DAT, addr);
136 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
137 pca_set_con(adap, sta);
139 return pca_wait(adap);
145 * Returns after the byte has been transmitted
147 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
150 int sta = pca_get_con(adap);
151 DEB2("=== WRITE %#04x\n", b);
152 pca_outw(adap, I2C_PCA_DAT, b);
154 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
155 pca_set_con(adap, sta);
157 return pca_wait(adap);
163 * returns immediately.
165 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
168 *b = pca_inw(adap, I2C_PCA_DAT);
169 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
173 * Setup ACK or NACK for next received byte and wait for it to arrive.
175 * Returns after next byte has arrived.
177 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
180 int sta = pca_get_con(adap);
182 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
185 sta |= I2C_PCA_CON_AA;
187 pca_set_con(adap, sta);
188 return pca_wait(adap);
191 static int pca_xfer(struct i2c_adapter *i2c_adap,
192 struct i2c_msg *msgs,
195 struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
196 struct i2c_msg *msg = NULL;
202 unsigned long timeout = jiffies + i2c_adap->timeout;
204 while ((state = pca_status(adap)) != 0xf8) {
205 if (time_before(jiffies, timeout)) {
208 dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
214 DEB1("{{{ XFER %d messages\n", num);
216 if (i2c_debug >= 2) {
217 for (curmsg = 0; curmsg < num; curmsg++) {
221 addr = (0x7f & msg->addr) ;
223 if (msg->flags & I2C_M_RD)
224 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
225 curmsg, msg->len, addr, (addr << 1) | 1);
227 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
228 curmsg, msg->len, addr, addr << 1,
229 msg->len == 0 ? "" : ", ");
230 for (i = 0; i < msg->len; i++)
231 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
239 while (curmsg < num) {
240 state = pca_status(adap);
242 DEB3("STATE is 0x%02x\n", state);
246 case 0xf8: /* On reset or stop the bus is idle */
247 completed = pca_start(adap);
250 case 0x08: /* A START condition has been transmitted */
251 case 0x10: /* A repeated start condition has been transmitted */
252 completed = pca_address(adap, msg);
255 case 0x18: /* SLA+W has been transmitted; ACK has been received */
256 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
257 if (numbytes < msg->len) {
258 completed = pca_tx_byte(adap,
263 curmsg++; numbytes = 0;
267 completed = pca_repeated_start(adap);
270 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
271 DEB2("NOT ACK received after SLA+W\n");
276 case 0x40: /* SLA+R has been transmitted; ACK has been received */
277 completed = pca_rx_ack(adap, msg->len > 1);
280 case 0x50: /* Data bytes has been received; ACK has been returned */
281 if (numbytes < msg->len) {
282 pca_rx_byte(adap, &msg->buf[numbytes], 1);
284 completed = pca_rx_ack(adap,
285 numbytes < msg->len - 1);
288 curmsg++; numbytes = 0;
292 completed = pca_repeated_start(adap);
295 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
296 DEB2("NOT ACK received after SLA+R\n");
301 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
302 DEB2("NOT ACK received after data byte\n");
306 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
307 DEB2("Arbitration lost\n");
309 * The PCA9564 data sheet (2006-09-01) says "A
310 * START condition will be transmitted when the
311 * bus becomes free (STOP or SCL and SDA high)"
312 * when the STA bit is set (p. 11).
314 * In case this won't work, try pca_reset()
320 case 0x58: /* Data byte has been received; NOT ACK has been returned */
321 if (numbytes == msg->len - 1) {
322 pca_rx_byte(adap, &msg->buf[numbytes], 0);
323 curmsg++; numbytes = 0;
327 completed = pca_repeated_start(adap);
329 DEB2("NOT ACK sent after data byte received. "
330 "Not final byte. numbytes %d. len %d\n",
336 case 0x70: /* Bus error - SDA stuck low */
337 DEB2("BUS ERROR - SDA Stuck low\n");
340 case 0x78: /* Bus error - SCL stuck low (PCA9665) */
341 case 0x90: /* Bus error - SCL stuck low (PCA9564) */
342 DEB2("BUS ERROR - SCL Stuck low\n");
345 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
346 DEB2("BUS ERROR - Illegal START or STOP\n");
350 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
360 DEB1("}}} transferred %d/%d messages. "
361 "status is %#04x. control is %#04x\n",
362 curmsg, num, pca_status(adap),
367 static u32 pca_func(struct i2c_adapter *adap)
369 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
372 static const struct i2c_algorithm pca_algo = {
373 .master_xfer = pca_xfer,
374 .functionality = pca_func,
377 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
379 struct i2c_algo_pca_data *pca_data = adap->algo_data;
380 /* The trick here is to check if there is an indirect register
381 * available. If there is one, we will read the value we first
382 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
383 * we wrote on I2C_PCA_ADR
385 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
386 pca_outw(pca_data, I2C_PCA_IND, 0xAA);
387 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
388 pca_outw(pca_data, I2C_PCA_IND, 0x00);
389 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
390 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
391 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
392 pca_data->chip = I2C_PCA_CHIP_9665;
394 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
395 pca_data->chip = I2C_PCA_CHIP_9564;
397 return pca_data->chip;
400 static int pca_init(struct i2c_adapter *adap)
402 struct i2c_algo_pca_data *pca_data = adap->algo_data;
404 adap->algo = &pca_algo;
406 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
407 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
410 if (pca_data->i2c_clock > 7) {
411 switch (pca_data->i2c_clock) {
413 pca_data->i2c_clock = I2C_PCA_CON_330kHz;
416 pca_data->i2c_clock = I2C_PCA_CON_288kHz;
419 pca_data->i2c_clock = I2C_PCA_CON_217kHz;
422 pca_data->i2c_clock = I2C_PCA_CON_146kHz;
425 pca_data->i2c_clock = I2C_PCA_CON_88kHz;
428 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
431 pca_data->i2c_clock = I2C_PCA_CON_44kHz;
434 pca_data->i2c_clock = I2C_PCA_CON_36kHz;
438 "%s: Invalid I2C clock speed selected."
439 " Using default 59kHz.\n", adap->name);
440 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
443 printk(KERN_WARNING "%s: "
444 "Choosing the clock frequency based on "
445 "index is deprecated."
446 " Use the nominal frequency.\n", adap->name);
449 clock = pca_clock(pca_data);
450 printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
451 adap->name, freqs[clock]);
453 /* Store settings as these will be needed when the PCA chip is reset */
454 pca_data->bus_settings.clock_freq = clock;
461 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
462 int min_tlow, min_thi;
463 /* These values are the maximum raise and fall values allowed
464 * by the I2C operation mode (Standard, Fast or Fast+)
465 * They are used (added) below to calculate the clock dividers
466 * of PCA9665. Note that they are slightly different of the
467 * real maximum, to allow the change on mode exactly on the
468 * maximum clock rate for each mode
472 if (pca_data->i2c_clock > 1265800) {
473 printk(KERN_WARNING "%s: I2C clock speed too high."
474 " Using 1265.8kHz.\n", adap->name);
475 pca_data->i2c_clock = 1265800;
478 if (pca_data->i2c_clock < 60300) {
479 printk(KERN_WARNING "%s: I2C clock speed too low."
480 " Using 60.3kHz.\n", adap->name);
481 pca_data->i2c_clock = 60300;
484 /* To avoid integer overflow, use clock/100 for calculations */
485 clock = pca_clock(pca_data) / 100;
487 if (pca_data->i2c_clock > 1000000) {
488 mode = I2C_PCA_MODE_TURBO;
491 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
492 } else if (pca_data->i2c_clock > 400000) {
493 mode = I2C_PCA_MODE_FASTP;
496 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
497 } else if (pca_data->i2c_clock > 100000) {
498 mode = I2C_PCA_MODE_FAST;
501 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
503 mode = I2C_PCA_MODE_STD;
506 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
509 /* The minimum clock that respects the thi/tlow = 134/157 is
510 * 64800 Hz. Below that, we have to fix the tlow to 255 and
511 * calculate the thi factor.
515 thi = 1000000 - clock * raise_fall_time;
516 thi /= (I2C_PCA_OSC_PER * clock) - tlow;
518 tlow = (1000000 - clock * raise_fall_time) * min_tlow;
519 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
520 thi = tlow * min_thi / min_tlow;
523 /* Store settings as these will be needed when the PCA chip is reset */
524 pca_data->bus_settings.mode = mode;
525 pca_data->bus_settings.tlow = tlow;
526 pca_data->bus_settings.thi = thi;
531 "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
533 udelay(500); /* 500 us for oscillator to stabilise */
539 * registering functions to load algorithms at runtime
541 int i2c_pca_add_bus(struct i2c_adapter *adap)
545 rval = pca_init(adap);
549 return i2c_add_adapter(adap);
551 EXPORT_SYMBOL(i2c_pca_add_bus);
553 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
557 rval = pca_init(adap);
561 return i2c_add_numbered_adapter(adap);
563 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
565 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
566 "Wolfram Sang <w.sang@pengutronix.de>");
567 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
568 MODULE_LICENSE("GPL");
570 module_param(i2c_debug, int, 0);