1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2016 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
7 #include <linux/circ_buf.h>
8 #include <linux/coresight.h>
9 #include <linux/perf_event.h>
10 #include <linux/slab.h>
11 #include "coresight-priv.h"
12 #include "coresight-tmc.h"
14 static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
16 CS_UNLOCK(drvdata->base);
18 /* Wait for TMCSReady bit to be set */
19 tmc_wait_for_tmcready(drvdata);
21 writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
22 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
23 TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
24 TMC_FFCR_TRIGON_TRIGIN,
25 drvdata->base + TMC_FFCR);
27 writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
28 tmc_enable_hw(drvdata);
30 CS_LOCK(drvdata->base);
33 static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
39 /* Check if the buffer wrapped around. */
40 lost = readl_relaxed(drvdata->base + TMC_STS) & TMC_STS_FULL;
44 for (i = 0; i < drvdata->memwidth; i++) {
45 read_data = readl_relaxed(drvdata->base + TMC_RRD);
46 if (read_data == 0xFFFFFFFF)
48 memcpy(bufp, &read_data, 4);
55 coresight_insert_barrier_packet(drvdata->buf);
59 static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
61 CS_UNLOCK(drvdata->base);
63 tmc_flush_and_stop(drvdata);
65 * When operating in sysFS mode the content of the buffer needs to be
66 * read before the TMC is disabled.
68 if (drvdata->mode == CS_MODE_SYSFS)
69 tmc_etb_dump_hw(drvdata);
70 tmc_disable_hw(drvdata);
72 CS_LOCK(drvdata->base);
75 static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
77 CS_UNLOCK(drvdata->base);
79 /* Wait for TMCSReady bit to be set */
80 tmc_wait_for_tmcready(drvdata);
82 writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE);
83 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI,
84 drvdata->base + TMC_FFCR);
85 writel_relaxed(0x0, drvdata->base + TMC_BUFWM);
86 tmc_enable_hw(drvdata);
88 CS_LOCK(drvdata->base);
91 static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
93 CS_UNLOCK(drvdata->base);
95 tmc_flush_and_stop(drvdata);
96 tmc_disable_hw(drvdata);
98 CS_LOCK(drvdata->base);
102 * Return the available trace data in the buffer from @pos, with
103 * a maximum limit of @len, updating the @bufpp on where to
106 ssize_t tmc_etb_get_sysfs_trace(struct tmc_drvdata *drvdata,
107 loff_t pos, size_t len, char **bufpp)
109 ssize_t actual = len;
111 /* Adjust the len to available size @pos */
112 if (pos + actual > drvdata->len)
113 actual = drvdata->len - pos;
115 *bufpp = drvdata->buf + pos;
119 static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev)
125 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
128 * If we don't have a buffer release the lock and allocate memory.
129 * Otherwise keep the lock and move along.
131 spin_lock_irqsave(&drvdata->spinlock, flags);
133 spin_unlock_irqrestore(&drvdata->spinlock, flags);
135 /* Allocating the memory here while outside of the spinlock */
136 buf = kzalloc(drvdata->size, GFP_KERNEL);
140 /* Let's try again */
141 spin_lock_irqsave(&drvdata->spinlock, flags);
144 if (drvdata->reading) {
150 * In sysFS mode we can have multiple writers per sink. Since this
151 * sink is already enabled no memory is needed and the HW need not be
154 if (drvdata->mode == CS_MODE_SYSFS)
158 * If drvdata::buf isn't NULL, memory was allocated for a previous
159 * trace run but wasn't read. If so simply zero-out the memory.
160 * Otherwise use the memory allocated above.
162 * The memory is freed when users read the buffer using the
163 * /dev/xyz.{etf|etb} interface. See tmc_read_unprepare_etf() for
167 memset(drvdata->buf, 0, drvdata->size);
173 drvdata->mode = CS_MODE_SYSFS;
174 tmc_etb_enable_hw(drvdata);
176 spin_unlock_irqrestore(&drvdata->spinlock, flags);
178 /* Free memory outside the spinlock if need be */
185 static int tmc_enable_etf_sink_perf(struct coresight_device *csdev)
189 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
191 spin_lock_irqsave(&drvdata->spinlock, flags);
192 if (drvdata->reading) {
198 * In Perf mode there can be only one writer per sink. There
199 * is also no need to continue if the ETB/ETR is already operated
202 if (drvdata->mode != CS_MODE_DISABLED) {
207 drvdata->mode = CS_MODE_PERF;
208 tmc_etb_enable_hw(drvdata);
210 spin_unlock_irqrestore(&drvdata->spinlock, flags);
215 static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
218 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
222 ret = tmc_enable_etf_sink_sysfs(csdev);
225 ret = tmc_enable_etf_sink_perf(csdev);
227 /* We shouldn't be here */
236 dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n");
240 static void tmc_disable_etf_sink(struct coresight_device *csdev)
243 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
245 spin_lock_irqsave(&drvdata->spinlock, flags);
246 if (drvdata->reading) {
247 spin_unlock_irqrestore(&drvdata->spinlock, flags);
251 /* Disable the TMC only if it needs to */
252 if (drvdata->mode != CS_MODE_DISABLED) {
253 tmc_etb_disable_hw(drvdata);
254 drvdata->mode = CS_MODE_DISABLED;
257 spin_unlock_irqrestore(&drvdata->spinlock, flags);
259 dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n");
262 static int tmc_enable_etf_link(struct coresight_device *csdev,
263 int inport, int outport)
266 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
268 spin_lock_irqsave(&drvdata->spinlock, flags);
269 if (drvdata->reading) {
270 spin_unlock_irqrestore(&drvdata->spinlock, flags);
274 tmc_etf_enable_hw(drvdata);
275 drvdata->mode = CS_MODE_SYSFS;
276 spin_unlock_irqrestore(&drvdata->spinlock, flags);
278 dev_info(drvdata->dev, "TMC-ETF enabled\n");
282 static void tmc_disable_etf_link(struct coresight_device *csdev,
283 int inport, int outport)
286 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
288 spin_lock_irqsave(&drvdata->spinlock, flags);
289 if (drvdata->reading) {
290 spin_unlock_irqrestore(&drvdata->spinlock, flags);
294 tmc_etf_disable_hw(drvdata);
295 drvdata->mode = CS_MODE_DISABLED;
296 spin_unlock_irqrestore(&drvdata->spinlock, flags);
298 dev_info(drvdata->dev, "TMC-ETF disabled\n");
301 static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu,
302 void **pages, int nr_pages, bool overwrite)
305 struct cs_buffers *buf;
307 node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_node(cpu);
309 /* Allocate memory structure for interaction with Perf */
310 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
314 buf->snapshot = overwrite;
315 buf->nr_pages = nr_pages;
316 buf->data_pages = pages;
321 static void tmc_free_etf_buffer(void *config)
323 struct cs_buffers *buf = config;
328 static int tmc_set_etf_buffer(struct coresight_device *csdev,
329 struct perf_output_handle *handle,
334 struct cs_buffers *buf = sink_config;
336 /* wrap head around to the amount of space we have */
337 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
339 /* find the page to write to */
340 buf->cur = head / PAGE_SIZE;
342 /* and offset within that page */
343 buf->offset = head % PAGE_SIZE;
345 local_set(&buf->data_size, 0);
350 static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
351 struct perf_output_handle *handle,
355 struct cs_buffers *buf = sink_config;
359 * In snapshot mode ->data_size holds the new address of the
360 * ring buffer's head. The size itself is the whole address
361 * range since we want the latest information.
364 handle->head = local_xchg(&buf->data_size,
365 buf->nr_pages << PAGE_SHIFT);
367 * Tell the tracer PMU how much we got in this run and if
368 * something went wrong along the way. Nobody else can use
369 * this cs_buffers instance until we are done. As such
370 * resetting parameters here and squaring off with the ring
371 * buffer API in the tracer PMU is fine.
373 size = local_xchg(&buf->data_size, 0);
379 static void tmc_update_etf_buffer(struct coresight_device *csdev,
380 struct perf_output_handle *handle,
387 u64 read_ptr, write_ptr;
389 unsigned long offset;
390 struct cs_buffers *buf = sink_config;
391 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
396 /* This shouldn't happen */
397 if (WARN_ON_ONCE(drvdata->mode != CS_MODE_PERF))
400 CS_UNLOCK(drvdata->base);
402 tmc_flush_and_stop(drvdata);
404 read_ptr = tmc_read_rrp(drvdata);
405 write_ptr = tmc_read_rwp(drvdata);
408 * Get a hold of the status register and see if a wrap around
409 * has occurred. If so adjust things accordingly.
411 status = readl_relaxed(drvdata->base + TMC_STS);
412 if (status & TMC_STS_FULL) {
414 to_read = drvdata->size;
416 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->size);
420 * The TMC RAM buffer may be bigger than the space available in the
421 * perf ring buffer (handle->size). If so advance the RRP so that we
422 * get the latest trace data.
424 if (to_read > handle->size) {
428 * The value written to RRP must be byte-address aligned to
429 * the width of the trace memory databus _and_ to a frame
430 * boundary (16 byte), whichever is the biggest. For example,
431 * for 32-bit, 64-bit and 128-bit wide trace memory, the four
432 * LSBs must be 0s. For 256-bit wide trace memory, the five
435 switch (drvdata->memwidth) {
436 case TMC_MEM_INTF_WIDTH_32BITS:
437 case TMC_MEM_INTF_WIDTH_64BITS:
438 case TMC_MEM_INTF_WIDTH_128BITS:
439 mask = GENMASK(31, 4);
441 case TMC_MEM_INTF_WIDTH_256BITS:
442 mask = GENMASK(31, 5);
447 * Make sure the new size is aligned in accordance with the
448 * requirement explained above.
450 to_read = handle->size & mask;
451 /* Move the RAM read pointer up */
452 read_ptr = (write_ptr + drvdata->size) - to_read;
453 /* Make sure we are still within our limits */
454 if (read_ptr > (drvdata->size - 1))
455 read_ptr -= drvdata->size;
457 tmc_write_rrp(drvdata, read_ptr);
462 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
465 offset = buf->offset;
466 barrier = barrier_pkt;
468 /* for every byte to read */
469 for (i = 0; i < to_read; i += 4) {
470 buf_ptr = buf->data_pages[cur] + offset;
471 *buf_ptr = readl_relaxed(drvdata->base + TMC_RRD);
473 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) {
479 if (offset >= PAGE_SIZE) {
482 /* wrap around at the end of the buffer */
483 cur &= buf->nr_pages - 1;
488 * In snapshot mode all we have to do is communicate to
489 * perf_aux_output_end() the address of the current head. In full
490 * trace mode the same function expects a size to move rb->aux_head
494 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
496 local_add(to_read, &buf->data_size);
498 CS_LOCK(drvdata->base);
501 static const struct coresight_ops_sink tmc_etf_sink_ops = {
502 .enable = tmc_enable_etf_sink,
503 .disable = tmc_disable_etf_sink,
504 .alloc_buffer = tmc_alloc_etf_buffer,
505 .free_buffer = tmc_free_etf_buffer,
506 .set_buffer = tmc_set_etf_buffer,
507 .reset_buffer = tmc_reset_etf_buffer,
508 .update_buffer = tmc_update_etf_buffer,
511 static const struct coresight_ops_link tmc_etf_link_ops = {
512 .enable = tmc_enable_etf_link,
513 .disable = tmc_disable_etf_link,
516 const struct coresight_ops tmc_etb_cs_ops = {
517 .sink_ops = &tmc_etf_sink_ops,
520 const struct coresight_ops tmc_etf_cs_ops = {
521 .sink_ops = &tmc_etf_sink_ops,
522 .link_ops = &tmc_etf_link_ops,
525 int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
531 /* config types are set a boot time and never change */
532 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
533 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
536 spin_lock_irqsave(&drvdata->spinlock, flags);
538 if (drvdata->reading) {
543 /* There is no point in reading a TMC in HW FIFO mode */
544 mode = readl_relaxed(drvdata->base + TMC_MODE);
545 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
550 /* Don't interfere if operated from Perf */
551 if (drvdata->mode == CS_MODE_PERF) {
556 /* If drvdata::buf is NULL the trace data has been read already */
557 if (drvdata->buf == NULL) {
562 /* Disable the TMC if need be */
563 if (drvdata->mode == CS_MODE_SYSFS)
564 tmc_etb_disable_hw(drvdata);
566 drvdata->reading = true;
568 spin_unlock_irqrestore(&drvdata->spinlock, flags);
573 int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
579 /* config types are set a boot time and never change */
580 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
581 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
584 spin_lock_irqsave(&drvdata->spinlock, flags);
586 /* Re-enable the TMC if need be */
587 if (drvdata->mode == CS_MODE_SYSFS) {
588 /* There is no point in reading a TMC in HW FIFO mode */
589 mode = readl_relaxed(drvdata->base + TMC_MODE);
590 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
591 spin_unlock_irqrestore(&drvdata->spinlock, flags);
595 * The trace run will continue with the same allocated trace
596 * buffer. As such zero-out the buffer so that we don't end
597 * up with stale data.
599 * Since the tracer is still enabled drvdata::buf
602 memset(drvdata->buf, 0, drvdata->size);
603 tmc_etb_enable_hw(drvdata);
606 * The ETB/ETF is not tracing and the buffer was just read.
607 * As such prepare to free the trace buffer.
613 drvdata->reading = false;
614 spin_unlock_irqrestore(&drvdata->spinlock, flags);
617 * Free allocated memory outside of the spinlock. There is no need
618 * to assert the validity of 'buf' since calling kfree(NULL) is safe.