1 /* This file is subject to the terms and conditions of the GNU General Public
2 * License. See the file "COPYING" in the main directory of this archive
5 * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
6 * Copyright 1999 SuSE GmbH (Philipp Rumpf)
7 * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
8 * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
9 * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
10 * Copyright (C) 2004 Kyle McMartin <kyle@debian.org>
12 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
15 #include <asm/asm-offsets.h>
19 #include <asm/assembly.h>
20 #include <asm/pgtable.h>
22 #include <linux/linkage.h>
23 #include <linux/init.h>
38 .import init_thread_union,data
39 .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
41 .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
42 .import $global$ /* forward declaration */
43 #endif /*!CONFIG_64BIT*/
44 ENTRY(parisc_kernel_start)
48 /* Make sure sr4-sr7 are set to zero for the kernel address space */
54 /* Clear BSS (shouldn't the boot loader do this?) */
56 .import __bss_start,data
57 .import __bss_stop,data
59 load32 PA(__bss_start),%r3
60 load32 PA(__bss_stop),%r4
62 cmpb,<<,n %r3,%r4,$bss_loop
65 /* Save away the arguments the boot loader passed in (32 bit args) */
66 load32 PA(boot_args),%r1
72 #if !defined(CONFIG_64BIT) && defined(CONFIG_PA20)
73 /* This 32-bit kernel was compiled for PA2.0 CPUs. Check current CPU
74 * and halt kernel if we detect a PA1.x CPU. */
80 comib,<>,n 0,%r10,$cpu_ok
83 ldi msg1_end-msg1,%arg1
87 load32 PA(init_stack),%sp
88 #define MEM_CONS 0x3A0
89 ldw MEM_CONS+32(%r0),%arg0 // HPA
90 ldi ENTRY_IO_COUT,%arg1
91 ldw MEM_CONS+36(%r0),%arg2 // SPA
92 ldw MEM_CONS+8(%r0),%arg3 // layers
93 load32 PA(__bss_start),%r1
94 stw %r1,-52(%sp) // arg4
95 stw %r0,-56(%sp) // arg5
96 stw %r10,-60(%sp) // arg6 = ptr to text
97 stw %r11,-64(%sp) // arg7 = len
98 stw %r0,-68(%sp) // arg8
99 load32 PA(.iodc_panic_ret), %rp
100 ldw MEM_CONS+40(%r0),%r1 // ENTRY_IODC
103 b . /* wait endless with ... */
104 or %r10,%r10,%r10 /* qemu idle sleep */
105 msg1: .ascii "Can't boot kernel which was built for PA8x00 CPUs on this machine.\r\n"
113 /* Initialize startup VM. Just map first 16/32 MB of memory */
114 load32 PA(swapper_pg_dir),%r4
115 mtctl %r4,%cr24 /* Initialize kernel root pointer */
116 mtctl %r4,%cr25 /* Initialize user root pointer */
118 #if CONFIG_PGTABLE_LEVELS == 3
121 shrd %r5,PxD_VALUE_SHIFT,%r3
122 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
123 stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
124 ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
126 /* 2-level page table, so pmd == pgd */
127 ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
130 /* Fill in pmd with enough pte directories */
132 SHRREG %r1,PxD_VALUE_SHIFT,%r3
133 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
135 ldi ASM_PT_INITIAL,%r1
139 ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
141 #if CONFIG_PGTABLE_LEVELS == 3
142 ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
144 ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
148 /* Now initialize the PTEs themselves. We use RWX for
149 * everything ... it will get remapped correctly later */
150 ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
151 load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
155 STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
156 ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
157 addib,> -1,%r11,$pgt_fill_loop
160 /* Load the return address...er...crash 'n burn */
163 /* And the RFI Target address too */
164 load32 start_parisc,%r11
166 /* And the initial task pointer */
167 load32 init_thread_union,%r6
170 /* And the stack pointer too */
171 ldo THREAD_SZ_ALGN(%r6),%sp
173 #if defined(CONFIG_64BIT) && defined(CONFIG_FUNCTION_TRACER)
175 /* initialize mcount FPTR */
176 /* Get the global data pointer */
178 load32 PA(_mcount), %r10
183 /* Get PDCE_PROC for monarch CPU. */
184 #define MEM_PDC_LO 0x388
185 #define MEM_PDC_HI 0x35C
186 ldw MEM_PDC_LO(%r0),%r3
187 ldw MEM_PDC_HI(%r0),%r10
188 depd %r10, 31, 32, %r3 /* move to upper word */
193 /* Set the smp rendezvous address into page zero.
194 ** It would be safer to do this in init_smp_config() but
195 ** it's just way easier to deal with here because
196 ** of 64-bit function ptrs and the address is local to this file.
198 load32 PA(smp_slave_stext),%r10
199 stw %r10,0x10(%r0) /* MEM_RENDEZ */
200 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
206 ** Code Common to both Monarch and Slave processors.
210 ** %r11 must contain RFI target address.
211 ** %r25/%r26 args to pass to target function
212 ** %r2 in case rfi target decides it didn't like something
215 ** %r3 PDCE_PROC address
216 ** %r11 RFI target address
218 ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
224 /* Clear PDC entry point - we won't use it */
225 stw %r0,0x10(%r0) /* MEM_RENDEZ */
226 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
227 #endif /*CONFIG_SMP*/
232 /* Save the rfi target address */
233 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
235 std %r11, TASK_PT_GR11(%r10)
236 /* Switch to wide mode Superdome doesn't support narrow PDC
239 1: mfia %rp /* clear upper part of pcoq */
245 /* Set Wide mode as the "Default" (eg for traps)
246 ** First trap occurs *right* after (or part of) rfi for slave CPUs.
247 ** Someday, palo might not do this for the Monarch either.
250 mfctl %cr30,%r6 /* PCX-W2 firmware bug */
252 ldo PDC_PSW(%r0),%arg0 /* 21 */
253 ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
254 ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
255 load32 PA(stext_pdc_ret), %rp
260 mtctl %r6,%cr30 /* restore task thread info */
262 /* restore rfi target address*/
263 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
265 ldd TASK_PT_GR11(%r10), %r11
269 /* PARANOID: clear user scratch/user space SR's */
275 /* Initialize Protection Registers */
281 /* Initialize the global data pointer */
284 /* Set up our interrupt table. HPMCs might not work after this!
286 * We need to install the correct iva for PA1.1 or PA2.0. The
287 * following short sequence of instructions can determine this
288 * (without being illegal on a PA1.1 machine).
296 comib,<>,n 0,%r10,$is_pa20
297 ldil L%PA(fault_vector_11),%r10
299 ldo R%PA(fault_vector_11)(%r10),%r10
302 .level PA_ASM_LEVEL /* restore 1.1 || 2.0w */
303 #endif /*!CONFIG_64BIT*/
304 load32 PA(fault_vector_20),%r10
309 b aligned_rfi /* Prepare to RFI! Man all the cannons! */
316 copy %r3, %arg0 /* PDCE_PROC for smp_callin() */
318 rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
319 /* Don't need NOPs, have 8 compliant insn before rfi */
321 mtctl %r0,%cr17 /* Clear IIASQ tail */
322 mtctl %r0,%cr17 /* Clear IIASQ head */
324 /* Load RFI target into PC queue */
325 mtctl %r11,%cr18 /* IIAOQ head */
327 mtctl %r11,%cr18 /* IIAOQ tail */
329 load32 KERNEL_PSW,%r10
332 /* Jump through hyperspace to Virt Mode */
340 .import smp_init_current_idle_task,data
341 .import smp_callin,code
347 break 1,1 /* Break if returned from start_secondary */
351 #endif /*!CONFIG_64BIT*/
353 /***************************************************************************
354 * smp_slave_stext is executed by all non-monarch Processors when the Monarch
355 * pokes the slave CPUs in smp.c:smp_boot_cpus().
357 * Once here, registers values are initialized in order to branch to virtual
358 * mode. Once all available/eligible CPUs are in virtual mode, all are
359 * released and start out by executing their own idle task.
360 *****************************************************************************/
366 ** Initialize Space registers
373 /* Initialize the SP - monarch sets up smp_init_current_idle_task */
374 load32 PA(smp_init_current_idle_task),%sp
375 LDREG 0(%sp),%sp /* load task address */
377 LDREG TASK_THREAD_INFO(%sp),%sp
378 mtctl %sp,%cr30 /* store in cr30 */
379 ldo THREAD_SZ_ALGN(%sp),%sp
381 /* point CPU to kernel page tables */
382 load32 PA(swapper_pg_dir),%r4
383 mtctl %r4,%cr24 /* Initialize kernel root pointer */
384 mtctl %r4,%cr25 /* Initialize user root pointer */
387 /* Setup PDCE_PROC entry */
390 /* Load RFI *return* address in case smp_callin bails */
391 load32 smp_callin_rtn,%r2
394 /* Load RFI target address. */
395 load32 smp_callin,%r11
397 /* ok...common code can handle the rest */
402 #endif /* CONFIG_SMP */
404 ENDPROC(parisc_kernel_start)
407 .section .data..read_mostly
410 .export $global$,data
412 .type $global$,@object
416 #endif /*!CONFIG_64BIT*/